From b43581c2ffceda54537bad7cffe2f9647646e739 Mon Sep 17 00:00:00 2001 From: Steven Dan Date: Tue, 12 May 2026 11:17:20 +0800 Subject: [PATCH] add libs --- lib_gpio/.gitignore | 21 + lib_gpio/CHANGELOG.rst | 44 + lib_gpio/Jenkinsfile | 55 + lib_gpio/LICENSE.rst | 84 + lib_gpio/README.rst | 39 + .../examples/app_gpio_flashing_leds/.cproject | 528 ++++ .../examples/app_gpio_flashing_leds/.project | 75 + .../app_gpio_flashing_leds/LICENSE.rst | 84 + .../examples/app_gpio_flashing_leds/Makefile | 26 + .../app_gpio_flashing_leds/src/main.xc | 29 + .../examples/app_gpio_flashing_leds/wscript | 14 + lib_gpio/lib_gpio/.cproject | 492 ++++ lib_gpio/lib_gpio/.project | 75 + lib_gpio/lib_gpio/api/gpio.h | 157 + lib_gpio/lib_gpio/doc/rst/images/Makefile | 19 + .../doc/rst/images/input_gpio_task_diag.odg | Bin 0 -> 14140 bytes .../doc/rst/images/input_gpio_task_diag.pdf | Bin 0 -> 20353 bytes .../lib_gpio/doc/rst/images/n_bit_input.odg | Bin 0 -> 11066 bytes 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new file mode 100644 index 0000000..565eda2 --- /dev/null +++ b/lib_gpio/.gitignore @@ -0,0 +1,21 @@ +.*.swp +**/.build*/* +**/bin/* +*.o +*.xe +*.vcd +*.s +*.xi +*.i +*.a +**/_build/ +**/run_*.log +**/pdf/* +*.pyc +test_results.csv +**/.venv/** + +# waf build files +.lock-waf_* +.waf-*/ +build/ diff --git a/lib_gpio/CHANGELOG.rst b/lib_gpio/CHANGELOG.rst new file mode 100644 index 0000000..67ee84c --- /dev/null +++ b/lib_gpio/CHANGELOG.rst @@ -0,0 +1,44 @@ +GPIO library change log +======================= + +2.2.0 +----- + + * CHANGED: Update tests to support tools 15.x.x + +2.1.0 +----- + + * CHANGED: Use XMOS Public Licence Version 1 + +2.0.1 +----- + + * CHANGED: Pin Python package versions + * REMOVED: not necessary cpanfile + +2.0.0 +----- + + * CHANGED: Build files updated to support new "xcommon" behaviour in xwaf. + +1.1.0 +----- + + * CHANGE: Minor documentation clarifications + * CHANGE: Update to dependency (lib_xassert moved to 3.0.0) + +1.0.1 +----- + + * CHANGE: Update to source code license and copyright + +1.0.0 +----- + + * Initial version + + * Changes to dependencies: + + - lib_xassert: Added dependency 2.0.0 + diff --git a/lib_gpio/Jenkinsfile b/lib_gpio/Jenkinsfile new file mode 100644 index 0000000..cb88594 --- /dev/null +++ b/lib_gpio/Jenkinsfile @@ -0,0 +1,55 @@ +@Library('xmos_jenkins_shared_library@v0.32.0') _ + +getApproval() + +pipeline { + agent { + label 'x86_64&&linux' + } + environment { + REPO = 'lib_gpio' + VIEW = getViewName(REPO) + } + options { + skipDefaultCheckout() + } + stages { + stage('Get view') { + steps { + xcorePrepareSandbox("${VIEW}", "${REPO}") + } + } + + stage('Library checks') { + steps { + xcoreLibraryChecks("${REPO}") + } + } + stage('Tests') { + steps { + runXmostest("${REPO}", 'tests') + } + } + stage('xCORE builds') { + steps { + dir("${REPO}") { + xcoreAllAppsBuild('examples') + dir("${REPO}") { + runXdoc('doc') + } + } + + // Archive all the generated .pdf docs + archiveArtifacts artifacts: "${REPO}/**/pdf/*.pdf", fingerprint: true, allowEmptyArchive: true + } + } + } + post { + success { + updateViewfiles() + } + cleanup { + xcoreCleanSandbox() + } + } +} diff --git a/lib_gpio/LICENSE.rst b/lib_gpio/LICENSE.rst new file mode 100644 index 0000000..ca48f20 --- /dev/null +++ b/lib_gpio/LICENSE.rst @@ -0,0 +1,84 @@ +******************************* +XMOS PUBLIC LICENCE: Version 1 +******************************* + +Subject to the conditions and limitations below, permission is hereby granted by XMOS LIMITED (“XMOS”), free of charge, to any person or entity obtaining a copy of the XMOS Software. + +**1. Definitions** + +**“Applicable Patent Rights”** means: (a) where XMOS is the grantor of the rights, (i) claims of patents that are now or in future owned by or assigned to XMOS and (ii) that cover subject matter contained in the Software, but only to the extent it is necessary to use, reproduce or distribute the Software without infringement; and (b) where you are the grantor of the rights, (i) claims of patents that are now or in future owned by or assigned to you and (ii) that cover the subject matter contained in your Derivatives, taken alone or in combination with the Software. + +**“Compiled Code”** means any compiled, binary, machine readable or executable version of the Source Code. + +**“Contributor”** means any person or entity that creates or contributes to the creation of Derivatives. + +**“Derivatives”** means any addition to, deletion from and/or change to the substance, structure of the Software, any previous Derivatives, the combination of the Derivatives and the Software and/or any respective portions thereof. + +**“Source Code”** means the human readable code that is suitable for making modifications but excluding any Compiled Code. + +**“Software”** means the software and associated documentation files which XMOS makes available and which contain a notice identifying the software as original XMOS software and referring to the software being subject to the terms of this XMOS Public Licence. + +This Licence refers to XMOS Software and does not relate to any XMOS hardware or devices which are protected by intellectual property rights (including patent and trade marks) which may be sold to you under a separate agreement. + + +**2. Licence** + +**Permitted Uses, Conditions and Restrictions.** Subject to the conditions below, XMOS grants you a worldwide, royalty free, non-exclusive licence, to the extent of any Patent Rights to do the following: + +2.1 **Unmodified Software.** You may use, copy, display, publish, distribute and make available unmodified copies of the Software: + +2.1.1 for personal or academic, non-commercial purposes; or + +2.1.2 for commercial purposes provided the Software is at all times used on a device designed, licensed or developed by XMOS and, provided that in each instance (2.1.1 and 2.1.2): + +(a) you must retain and reproduce in all copies of the Software the copyright and proprietary notices and disclaimers of XMOS as they appear in the Software, and keep intact all notices and disclaimers in the Software files that refer to this Licence; and + +(b) you must include a copy of this Licence with every copy of the Software and documentation you publish, distribute and make available and you may not offer or impose any terms on such Software that alter or restrict this Licence or the intent of such Licence, except as permitted below (Additional Terms). + +The licence above does not include any Compiled Code which XMOS may make available under a separate support and licence agreement. + +2.2 **Derivatives.** You may create and modify Derivatives and use, copy, display, publish, distribute and make available Derivatives: + +2.2.1 for personal or academic, non-commercial purposes; or + +2.2.2 for commercial purposes, provided the Derivatives are at all times used on a device designed, licensed or developed by XMOS and, provided that in each instance (2.2.1 and 2.2.2): + +(a) you must comply with the terms of clause 2.1 with respect to the Derivatives; + +(b) you must copy (to the extent it doesn’t already exist) the notice below in each file of the Derivatives, and ensure all the modified files carry prominent notices stating that you have changed the files and the date of any change; and + +(c) if you sublicence, distribute or otherwise make the Software and/or the Derivatives available for commercial purposes, you must provide that the Software and Derivatives are at all times used on a device designed, licensed or developed by XMOS. + +Without limitation to these terms and clause 3 below, the Source Code and Compiled Code to your Derivatives may at your discretion (but without obligation) be released, copied, displayed, published, distributed and made available; and if you elect to do so, it must be under the terms of this Licence including the terms of the licence at clauses 2.2.1, 2.2.2 and clause 3 below. + +2.3 **Distribution of Executable Versions.** If you distribute or make available Derivatives, you must include a prominent notice in the code itself as well as in all related documentation, stating that the Source Code of the Software from which the Derivatives are based is available under the terms of this Licence, with information on how and where to obtain such Source Code. + +**3. Your Grant of Rights.** In consideration and as a condition to this Licence, you grant to any person or entity receiving or distributing any Derivatives, a non-exclusive, royalty free, perpetual, irrevocable license under your Applicable Patent Rights and all other intellectual property rights owned or controlled by you, to use, copy, display, publish, distribute and make available your Derivatives of the same scope and extent as XMOS’s licence under clause 2.2 above. + +**4. Combined Products.** You may create a combined product by combining Software, Derivatives and other code not covered by this Licence as a single application or product. In such instance, you must comply with the requirements of this Licence for any portion of the Software and/or Derivatives. + +**5. Additional Terms.** You may choose to offer, and to charge a fee for, warranty, support, indemnity or liability obligations and/or other rights consistent with the term of this Licence (“Additional Terms”) to any legitimate recipients of the Software and/or Derivatives. The terms on which you provide such Additional Terms are on your sole responsibility and you shall indemnify, defend and hold XMOS harmless against any claims asserted against XMOS. + +**6. New Versions.** XMOS may publish revised and/or new versions of this Licence from time to time to accommodate changes to the Licence terms, new versions, updates and bug fixes of the Software. Each version will be given a distinguishing version number. Once Software has been published under a particular version of this Licence, you may continue to use it under the terms of that version. You may also choose to use the latest version of the Software under any subsequent version published by XMOS. Only XMOS shall have the right to modify these terms. + +**7. IPR and Ownership** +Any rights, including all intellectual property rights and all trademarks not expressly granted herein are reserved in full by the authors or copyright holders. Any requests for additional permissions by XMOS including any rights to use XMOS trademarks, should be made (without obligation) to XMOS at **support@xmos.com** + +Nothing herein shall limit any rights that XMOS is otherwise entitled to under the doctrines of patent exhaustion, implied license, or legal estoppel. Neither the name of the authors, the copyright holders or any contributors may be used to endorse or promote any Derivatives from this Software without specific written permission. Any attempt to deal with the Software which does not comply with this Licence shall be void and shall automatically terminate any rights granted under this licence (including any licence of any intellectual property rights granted herein). +Subject to the licences granted under this Licence any Contributor retains all rights, title and interest in and to any Derivatives made by Contributor subject to the underlying rights of XMOS in the Software. XMOS shall retain all rights, title and interest in the Software and any Derivatives made by XMOS (“XMOS Derivatives”). XMOS Derivatives will not automatically be subject to this Licence and XMOS shall be entitled to licence such rights on any terms (without obligation) as it sees fit. + +**8. Termination** + +8.1 This Licence will automatically terminate immediately, without notice to you, if: + +(a) you fail to comply with the terms of this Licence; and/or + +(b) you directly or indirectly commence any action for patent or intellectual property right infringement against XMOS, or any parent, group, affiliate or subsidiary of XMOS; provided XMOS did not first commence an action or patent infringement against you in that instance; and/or + +(c) the terms of this Licence are held by any court of competent jurisdiction to be unenforceable in whole or in part. + +**9. Critical Applications.** Unless XMOS has agreed in writing with you an agreement specifically governing use of the Goods in military, aerospace, automotive or medically related functions (collectively and individually hereinafter referred to as "Special Use"), any permitted use of the Software excludes Special Use. Notwithstanding any agreement between XMOS and you for Special Use, Special Use shall be at your own risk, and you shall fully indemnify XMOS against any damages, losses, costs and claims (direct and indirect) arising out of any Special Use. + +**10. NO WARRANTY OR SUPPORT.** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL XMOS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, WARRANTY, CIVIL TORT (INCLUDING NEGLIGENCE), PRODUCTS LIABILITY OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE INCLUDING GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF SUCH PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND NOT WITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE. IN SOME JURISDICTIONS PARTIES ARE UNABLE TO LIMIT LIABILTY IN THIS WAY, IF THIS APPLIES TO YOUR JURISDICTION THIS LIABILITY CLAUSE ABOVE MAY NOT APPLY. NOTWITHSTANDING THE ABOVE, IN NO EVENT SHALL XMOS’s TOTAL LIABILITY TO YOU FOR ALL DAMAGES, LOSS OR OTHERWISE EXCEED $50. + +**11. Governing Law and Jurisdiction.** This Licence constitutes the entire agreement between the parties with respect to the subject matter hereof. The Licence shall be governed by the laws of England and the conflict of laws and UN Convention on Contracts for the International Sale of Goods, shall not apply. diff --git a/lib_gpio/README.rst b/lib_gpio/README.rst new file mode 100644 index 0000000..f6c65b8 --- /dev/null +++ b/lib_gpio/README.rst @@ -0,0 +1,39 @@ +GPIO Library +============ + +Overview +-------- + +The XMOS GPIO library allows you to access xCORE ports as low-speed GPIO. + +Although xCORE ports can be directly accessed via the xC programming +language this library allows more flexible usage. In particular, it +allows splitting a multi-pin output/input port to be able to use +the individual pins independently. It also allows accessing ports +across separate XMOS tiles or separate XMOS chips. + +Features +........ + + * Abstract interface to GPIO functionality of XMOS ports + * Allow control of individual bits of multi-bit ports + * Allow access to ports across tiles + +Operating modes +............... + + * Multi-bit output for individual access to the pins of a multi-bit output port + * Multi-bit input for individual access to the pins of a multi-bit input port + * Multi-bit input for individual access to the pins of a multi-bit + input port allowing the application to react to events on those pins + +Software version and dependencies +................................. + +The CHANGELOG contains information about the current and previous versions. +For a list of direct dependencies, look for DEPENDENT_MODULES in lib_gpio/module_build_info. + +Related application notes +......................... + +Currently there are none. diff --git a/lib_gpio/examples/app_gpio_flashing_leds/.cproject b/lib_gpio/examples/app_gpio_flashing_leds/.cproject new file mode 100644 index 0000000..d0a86d3 --- /dev/null +++ b/lib_gpio/examples/app_gpio_flashing_leds/.cproject @@ -0,0 +1,528 @@ + + + + + + + + + + + + + + + + + + + xmake + + all + true + true + true + + + xmake + + clean + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib_gpio/examples/app_gpio_flashing_leds/.project b/lib_gpio/examples/app_gpio_flashing_leds/.project new file mode 100644 index 0000000..9f60a51 --- /dev/null +++ b/lib_gpio/examples/app_gpio_flashing_leds/.project @@ -0,0 +1,75 @@ + + + gpio_flashing_leds + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\|\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + CONFIG=Debug + + + org.eclipse.cdt.make.core.buildCommand + xmake + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.xmos.cdt.core.XdeProjectNature + + diff --git a/lib_gpio/examples/app_gpio_flashing_leds/LICENSE.rst b/lib_gpio/examples/app_gpio_flashing_leds/LICENSE.rst new file mode 100644 index 0000000..ca48f20 --- /dev/null +++ b/lib_gpio/examples/app_gpio_flashing_leds/LICENSE.rst @@ -0,0 +1,84 @@ +******************************* +XMOS PUBLIC LICENCE: Version 1 +******************************* + +Subject to the conditions and limitations below, permission is hereby granted by XMOS LIMITED (“XMOS”), free of charge, to any person or entity obtaining a copy of the XMOS Software. + +**1. Definitions** + +**“Applicable Patent Rights”** means: (a) where XMOS is the grantor of the rights, (i) claims of patents that are now or in future owned by or assigned to XMOS and (ii) that cover subject matter contained in the Software, but only to the extent it is necessary to use, reproduce or distribute the Software without infringement; and (b) where you are the grantor of the rights, (i) claims of patents that are now or in future owned by or assigned to you and (ii) that cover the subject matter contained in your Derivatives, taken alone or in combination with the Software. + +**“Compiled Code”** means any compiled, binary, machine readable or executable version of the Source Code. + +**“Contributor”** means any person or entity that creates or contributes to the creation of Derivatives. + +**“Derivatives”** means any addition to, deletion from and/or change to the substance, structure of the Software, any previous Derivatives, the combination of the Derivatives and the Software and/or any respective portions thereof. + +**“Source Code”** means the human readable code that is suitable for making modifications but excluding any Compiled Code. + +**“Software”** means the software and associated documentation files which XMOS makes available and which contain a notice identifying the software as original XMOS software and referring to the software being subject to the terms of this XMOS Public Licence. + +This Licence refers to XMOS Software and does not relate to any XMOS hardware or devices which are protected by intellectual property rights (including patent and trade marks) which may be sold to you under a separate agreement. + + +**2. Licence** + +**Permitted Uses, Conditions and Restrictions.** Subject to the conditions below, XMOS grants you a worldwide, royalty free, non-exclusive licence, to the extent of any Patent Rights to do the following: + +2.1 **Unmodified Software.** You may use, copy, display, publish, distribute and make available unmodified copies of the Software: + +2.1.1 for personal or academic, non-commercial purposes; or + +2.1.2 for commercial purposes provided the Software is at all times used on a device designed, licensed or developed by XMOS and, provided that in each instance (2.1.1 and 2.1.2): + +(a) you must retain and reproduce in all copies of the Software the copyright and proprietary notices and disclaimers of XMOS as they appear in the Software, and keep intact all notices and disclaimers in the Software files that refer to this Licence; and + +(b) you must include a copy of this Licence with every copy of the Software and documentation you publish, distribute and make available and you may not offer or impose any terms on such Software that alter or restrict this Licence or the intent of such Licence, except as permitted below (Additional Terms). + +The licence above does not include any Compiled Code which XMOS may make available under a separate support and licence agreement. + +2.2 **Derivatives.** You may create and modify Derivatives and use, copy, display, publish, distribute and make available Derivatives: + +2.2.1 for personal or academic, non-commercial purposes; or + +2.2.2 for commercial purposes, provided the Derivatives are at all times used on a device designed, licensed or developed by XMOS and, provided that in each instance (2.2.1 and 2.2.2): + +(a) you must comply with the terms of clause 2.1 with respect to the Derivatives; + +(b) you must copy (to the extent it doesn’t already exist) the notice below in each file of the Derivatives, and ensure all the modified files carry prominent notices stating that you have changed the files and the date of any change; and + +(c) if you sublicence, distribute or otherwise make the Software and/or the Derivatives available for commercial purposes, you must provide that the Software and Derivatives are at all times used on a device designed, licensed or developed by XMOS. + +Without limitation to these terms and clause 3 below, the Source Code and Compiled Code to your Derivatives may at your discretion (but without obligation) be released, copied, displayed, published, distributed and made available; and if you elect to do so, it must be under the terms of this Licence including the terms of the licence at clauses 2.2.1, 2.2.2 and clause 3 below. + +2.3 **Distribution of Executable Versions.** If you distribute or make available Derivatives, you must include a prominent notice in the code itself as well as in all related documentation, stating that the Source Code of the Software from which the Derivatives are based is available under the terms of this Licence, with information on how and where to obtain such Source Code. + +**3. Your Grant of Rights.** In consideration and as a condition to this Licence, you grant to any person or entity receiving or distributing any Derivatives, a non-exclusive, royalty free, perpetual, irrevocable license under your Applicable Patent Rights and all other intellectual property rights owned or controlled by you, to use, copy, display, publish, distribute and make available your Derivatives of the same scope and extent as XMOS’s licence under clause 2.2 above. + +**4. Combined Products.** You may create a combined product by combining Software, Derivatives and other code not covered by this Licence as a single application or product. In such instance, you must comply with the requirements of this Licence for any portion of the Software and/or Derivatives. + +**5. Additional Terms.** You may choose to offer, and to charge a fee for, warranty, support, indemnity or liability obligations and/or other rights consistent with the term of this Licence (“Additional Terms”) to any legitimate recipients of the Software and/or Derivatives. The terms on which you provide such Additional Terms are on your sole responsibility and you shall indemnify, defend and hold XMOS harmless against any claims asserted against XMOS. + +**6. New Versions.** XMOS may publish revised and/or new versions of this Licence from time to time to accommodate changes to the Licence terms, new versions, updates and bug fixes of the Software. Each version will be given a distinguishing version number. Once Software has been published under a particular version of this Licence, you may continue to use it under the terms of that version. You may also choose to use the latest version of the Software under any subsequent version published by XMOS. Only XMOS shall have the right to modify these terms. + +**7. IPR and Ownership** +Any rights, including all intellectual property rights and all trademarks not expressly granted herein are reserved in full by the authors or copyright holders. Any requests for additional permissions by XMOS including any rights to use XMOS trademarks, should be made (without obligation) to XMOS at **support@xmos.com** + +Nothing herein shall limit any rights that XMOS is otherwise entitled to under the doctrines of patent exhaustion, implied license, or legal estoppel. Neither the name of the authors, the copyright holders or any contributors may be used to endorse or promote any Derivatives from this Software without specific written permission. Any attempt to deal with the Software which does not comply with this Licence shall be void and shall automatically terminate any rights granted under this licence (including any licence of any intellectual property rights granted herein). +Subject to the licences granted under this Licence any Contributor retains all rights, title and interest in and to any Derivatives made by Contributor subject to the underlying rights of XMOS in the Software. XMOS shall retain all rights, title and interest in the Software and any Derivatives made by XMOS (“XMOS Derivatives”). XMOS Derivatives will not automatically be subject to this Licence and XMOS shall be entitled to licence such rights on any terms (without obligation) as it sees fit. + +**8. Termination** + +8.1 This Licence will automatically terminate immediately, without notice to you, if: + +(a) you fail to comply with the terms of this Licence; and/or + +(b) you directly or indirectly commence any action for patent or intellectual property right infringement against XMOS, or any parent, group, affiliate or subsidiary of XMOS; provided XMOS did not first commence an action or patent infringement against you in that instance; and/or + +(c) the terms of this Licence are held by any court of competent jurisdiction to be unenforceable in whole or in part. + +**9. Critical Applications.** Unless XMOS has agreed in writing with you an agreement specifically governing use of the Goods in military, aerospace, automotive or medically related functions (collectively and individually hereinafter referred to as "Special Use"), any permitted use of the Software excludes Special Use. Notwithstanding any agreement between XMOS and you for Special Use, Special Use shall be at your own risk, and you shall fully indemnify XMOS against any damages, losses, costs and claims (direct and indirect) arising out of any Special Use. + +**10. NO WARRANTY OR SUPPORT.** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL XMOS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, WARRANTY, CIVIL TORT (INCLUDING NEGLIGENCE), PRODUCTS LIABILITY OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE INCLUDING GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF SUCH PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES AND NOT WITHSTANDING THE FAILURE OF ESSENTIAL PURPOSE. IN SOME JURISDICTIONS PARTIES ARE UNABLE TO LIMIT LIABILTY IN THIS WAY, IF THIS APPLIES TO YOUR JURISDICTION THIS LIABILITY CLAUSE ABOVE MAY NOT APPLY. NOTWITHSTANDING THE ABOVE, IN NO EVENT SHALL XMOS’s TOTAL LIABILITY TO YOU FOR ALL DAMAGES, LOSS OR OTHERWISE EXCEED $50. + +**11. Governing Law and Jurisdiction.** This Licence constitutes the entire agreement between the parties with respect to the subject matter hereof. The Licence shall be governed by the laws of England and the conflict of laws and UN Convention on Contracts for the International Sale of Goods, shall not apply. diff --git a/lib_gpio/examples/app_gpio_flashing_leds/Makefile b/lib_gpio/examples/app_gpio_flashing_leds/Makefile new file mode 100644 index 0000000..773d1a3 --- /dev/null +++ b/lib_gpio/examples/app_gpio_flashing_leds/Makefile @@ -0,0 +1,26 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name +APP_NAME = gpio_flashing_leds + +# The USED_MODULES variable lists other module used by the application. +USED_MODULES = lib_gpio + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. +XCC_FLAGS = -O2 -g + +# The XCORE_ARM_PROJECT variable, if set to 1, configures this +# project to create both xCORE and ARM binaries. +XCORE_ARM_PROJECT = 0 + +XMOS_MAKE_PATH ?= ../.. +-include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_gpio/examples/app_gpio_flashing_leds/src/main.xc b/lib_gpio/examples/app_gpio_flashing_leds/src/main.xc new file mode 100644 index 0000000..5a2c185 --- /dev/null +++ b/lib_gpio/examples/app_gpio_flashing_leds/src/main.xc @@ -0,0 +1,29 @@ +// Copyright 2014-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#include +#include + +port p_led1 = XS1_PORT_1A; +port p_led2 = XS1_PORT_1B; + +void flash_leds(client output_gpio_if led1, client output_gpio_if led2) +{ + while (1) { + led1.output(1); + led2.output(0); + delay_milliseconds(200); + led1.output(0); + led2.output(1); + delay_milliseconds(200); + } +} + +int main() { + interface output_gpio_if i_led1[1], i_led2[1]; + par { + output_gpio(i_led1, 1, p_led1, null); + output_gpio(i_led2, 1, p_led2, null); + flash_leds(i_led1[0], i_led2[0]); + } + return 0; +} diff --git a/lib_gpio/examples/app_gpio_flashing_leds/wscript b/lib_gpio/examples/app_gpio_flashing_leds/wscript new file mode 100644 index 0000000..2121c33 --- /dev/null +++ b/lib_gpio/examples/app_gpio_flashing_leds/wscript @@ -0,0 +1,14 @@ +def options(opt): + opt.load('xwaf.xcommon') + +def configure(conf): + conf.load('xwaf.xcommon') + +def build(bld): + bld.do_xcommon() + +def dist(ctx): + ctx.load('xwaf.xcommon') + +def distcheck(ctx): + ctx.load('xwaf.xcommon') diff --git a/lib_gpio/lib_gpio/.cproject b/lib_gpio/lib_gpio/.cproject new file mode 100644 index 0000000..dace2e2 --- /dev/null +++ b/lib_gpio/lib_gpio/.cproject @@ -0,0 +1,492 @@ + + + + + + + + + + + + + + + + + + + xmake + -f .makefile + all + true + true + true + + + xmake + -f .makefile + clean + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib_gpio/lib_gpio/.project b/lib_gpio/lib_gpio/.project new file mode 100644 index 0000000..14d4cda --- /dev/null +++ b/lib_gpio/lib_gpio/.project @@ -0,0 +1,75 @@ + + + lib_gpio + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\|\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + CONFIG=Debug + + + org.eclipse.cdt.make.core.buildCommand + xmake + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.xmos.cdt.core.XdeProjectNature + + diff --git a/lib_gpio/lib_gpio/api/gpio.h b/lib_gpio/lib_gpio/api/gpio.h new file mode 100644 index 0000000..1fc94b2 --- /dev/null +++ b/lib_gpio/lib_gpio/api/gpio.h @@ -0,0 +1,157 @@ +// Copyright 2014-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef __gpio_h__ +#define __gpio_h__ +#include +#include + +#ifdef __XC__ + +typedef uint16_t gpio_time_t; + +/** This interface provides access to a GPIO that can perform input + operations only. All GPIOs are single bit. */ +typedef interface input_gpio_if +{ + /** Perform an input on a GPIO + * + * \returns The value input from the port in the least significant bit. + * The rest of the value will be zero extended. + */ + unsigned input(void); + + /** Perform an input on a GPIO and get a timestamp + * + * \param timestamp This pass-by-reference parameter will be set + * to the time the value was input. This timestamp + * is the 16-bit port timer value. The port timer is + * driven at the rate of the port clock. + * + * \returns The value input from the port in the least significant bit. + * The rest of the value will be zero extended. + */ + unsigned input_and_timestamp(gpio_time_t ×tamp); + + /** Request an event when the pin is a certain value. + * + * This function will cause a notification to occur when the pins + * match the specified value. + * + * \param val The least significant bit represents the 1-bit value to match. + */ + [[clears_notification]] + void event_when_pins_eq(unsigned val); + + /** A pin event has occurred. + * + * This notification will occur when a pin event has occurred. + * Events can be requested using the event_when_pins_eq() call. + */ + [[notification]] + slave void event(void); + +} input_gpio_if; + +/** This interface provides access to a GPIO that can perform output + operations only. All GPIOs are single bit. */ +typedef interface output_gpio_if +{ + /** Perform an output on a GPIO. + * + * \param data The value to be output. The least significant bit + * represents the 1-bit value to be output. + */ + void output(unsigned data); + + /** Perform an output on a GPIO and get a timestamp of when the output + * occurs. + * + * \param data The value to be output. The least significant bit + * represents the 1-bit value to be output. + * + * \returns The time the value was input. This timestamp + * is the 16-bit port timer value. The port timer is driven + * at the rate of the port clock. + */ + gpio_time_t output_and_timestamp(unsigned data); +} output_gpio_if; + + +/** Task that splits a multi-bit port into several 1-bit GPIO interfaces. + * + * This component allows other tasks to access the individual bits of + * a multi-bit output port. + * + * \param i The array of interfaces to connect to other tasks. + * \param n The number of interfaces connected. + * \param p The output port to be split. + * \param pin_map This array maps the connected interfaces to the pin + * of the port. For example, if 3 clients are connected + * to split a 8-bit port and the array {2,5,3} is supplied. + * Then bit 2 will go to interface 0, bit 5 to inteface 1 + * and bit 3 to inteface 2. If null is supplied for this + * argument then the pin map is assumed to be {0,1,2...}. + */ +[[distributable]] +void output_gpio(server output_gpio_if i[n], static const size_t n, out port p, + char (&?pin_map)[n]); + +/** Task that splits a multi-bit input port into several 1-bit GPIO interfaces + * (no events). + * + * This component allows other tasks to access the individual bits of + * a multi-bit input port. It does not support events but is distributable so + * requires no specific logical core to run on. If the event_when_pins_eq() + * function is called then the component will trap. + * + * \param i The array of interfaces to connect to other tasks. + * \param n The number of interfaces connected. + * \param p The input port to be split. + * \param pin_map This array maps the connected interfaces to the pin + * of the port. For example, if 3 clients are connected + * to split a 8-bit port and the array {2,5,3} is supplied. + * Then bit 2 will go to interface 0, bit 5 to inteface 1 + * and bit 3 to inteface 2. If null is supplied for this + * argument then the pin map is assumed to be {0,1,2...}. + */ +[[distributable]] +void input_gpio(server input_gpio_if i[n], static const size_t n, in port p, + char (&?pin_map)[n]); + +/* Task that splits a multi-bit input port into several 1-bit GPIO interfaces + * (with events). + * + * This component allows other tasks to access the individual bits of + * a multi-bit input port. It does support events so requires a logical + * core to run on (but can be combined with other tasks on the same core). + * + * \param i The array of interfaces to connect to other tasks. + * \param n The number of interfaces connected. + * \param p The input port to be split. + * \param pin_map This array maps the connected interfaces to the pin + * of the port. For example, if 3 clients are connected + * to split a 8-bit port and the array {2,5,3} is supplied. + * Then bit 2 will go to interface 0, bit 5 to inteface 1 + * and bit 3 to inteface 2. If null is supplied for this + * argument then the pin map is assumed to be {0,1,2...}. + */ +[[combinable]] +void input_gpio_with_events(server input_gpio_if i[n], + static const size_t n, + in port p, + char (&?pin_map)[n]); + +/** Convert a 1-bit port to a single 1-bit GPIO interface. + * + * This component allows other tasks to access a 1-bit port as a GPIO + * interface. It is more efficient that using input_gpio_with_events() for the + * restricted case where a 1-bit port is used. + * + * \param i The interface to connect to other tasks. + * \param p The input port. + */ +[[combinable]] +void input_gpio_1bit_with_events(server input_gpio_if i, in port p); + +#endif +#endif // __gpio_h__ diff --git a/lib_gpio/lib_gpio/doc/rst/images/Makefile b/lib_gpio/lib_gpio/doc/rst/images/Makefile new file mode 100644 index 0000000..fddcef8 --- /dev/null +++ b/lib_gpio/lib_gpio/doc/rst/images/Makefile @@ -0,0 +1,19 @@ +ODGS = $(wildcard *.odg) +PDFS = $(ODGS:.odg=.pdf) + +all: $(PDFS) + @echo PDFs created + +_uncropped: + mkdir _uncropped + +_uncropped/%.pdf: %.odg | _uncropped + soffice -env:UserInstallation=file:///home/$(USER)/.libreoffice-alt --headless --convert-to pdf $< --outdir _uncropped + +%.pdf: _uncropped/%.pdf + pdfcrop $< $@ + +clean: + -rm $(PDFS) + -rm _uncropped/*.pdf + -rmdir _uncropped diff --git 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z2oER+&_)MN2)eQWHuLob)sNOV5Modg43d>EdP9d?sU*6ICEb!hK}cq1#ug?tGct`x oB-81jV$5K?1z`*H|4nwI|4qI>i{~$^4HyB*7=3+<9hR8C0TFA`. By default the +output GPIO component does not use any logical cores of its +own. It is a *distributed* task which means it will perform its +function on the logical core of the application task connected to +it (provided the application task is on the same tile). + +Input GPIO usage +................ + +There are two types of input GPIO component: those that support events +and those that do not support events. In both cases, +input GPIO components are instantiated as parallel tasks that run in a +``par`` statement. These components connect to the hardware ports of +the xCORE device. The application +can connect via an interface connection using an array of the ``input_gpio_if`` +interface type: + +.. figure:: images/input_gpio_task_diag.* + + Input GPIO task diagram + +For example, the following code instantiates an input GPIO component +for the first 3 pins of a port and connects to it:: + + port p = XS1_PORT_4C; + + int main(void) { + input_gpio_if i_gpio[3]; + par { + input_gpio(i_gpio, 3, p, null); + task1(i_gpio[0], i_gpio[1]); + task2(i_gpio[2]); + } + return 0; + } + +Note that the connection is an array of interfaces, so several tasks +can connect to the same component instance, each controlling +different pins of the port. + +|newpage| + +The application can use the client end of the interface connection to +perform GPIO operations e.g.:: + + void task1(client input_gpio_if gpio1, client input_gpio_if gpio2) + { + ... + val1 = gpio1.input(); + val2 = gpio2.input(); + ... + ... + val1 = gpio1.input(); + val2 = gpio2.input(); + ... + } + +More information on interfaces and tasks can be be found in +the :ref:`XMOS Programming Guide`. By default the +output GPIO component does not use any logical cores of its +own. It is a *distributed* task which means it will perform its +function on the logical core of the application task connected to +it (provided the application task is on the same tile). + +Using events +............ + +The :c:func:`input_gpio_with_events` and +:c:func:`input_gpio_1bit_with_events` functions support the event +based functions of the input GPIO interface:: + + port p = XS1_PORT_4C; + + int main(void) { + input_gpio_if i_gpio[3]; + par { + input_gpio_with_events(i_gpio, 3, p, null); + task1(i_gpio[0], i_gpio[1]); + task2(i_gpio[2]); + } + return 0; + } + +In this case the application can request an event on a pin change and +then select on the event happening e.g.:: + + gpio.event_when_pins_eq(1); + select { + case gpio.event(): + // This event was caused by the pin value being 1 + ... + break; + } + +|newpage| + +Pin maps +........ + +The GPIO tasks all take a ``pin_map`` argument. If this is ``null`` +then the elements of the inteface array will correspond with the a bit +of the port based on the array element index. So the first element of +the array will control bit 0, the second with control bit 1 and so on. + +Alternatively an array can be provided mapping array elements to +pins. For example, the following will map the array indices to pins 3, +2 and 7 of the port:: + + char pin_map[3] = {3, 2, 7}; + + int main() { + ... + par { + output_gpio(i_gpio, 3, p, pin_map); + ... + +Output GPIO API +--------------- + +All GPIO functions can be accessed via the ``gpio.h`` header:: + + #include + +You will also have to add ``lib_gpio`` to the +``USED_MODULES`` field of your application Makefile. + +Output GPIO components +...................... + +.. doxygenfunction:: output_gpio + +|newpage| + +Output GPIO interface +..................... + +.. doxygeninterface:: output_gpio_if + +Input GPIO API +-------------- + +Input GPIO components +...................... + +.. doxygenfunction:: input_gpio +.. doxygenfunction:: input_gpio_with_events + +|newpage| + +.. doxygenfunction:: input_gpio_1bit_with_events + +|newpage| + +Input GPIO interface +.................... + +.. doxygeninterface:: input_gpio_if + + +|appendix| + +Known Issues +------------ + +No known issues. + +.. include:: ../../../CHANGELOG.rst diff --git a/lib_gpio/lib_gpio/doc/rst/xdoc.conf b/lib_gpio/lib_gpio/doc/rst/xdoc.conf new file mode 100644 index 0000000..2cef5f5 --- /dev/null +++ b/lib_gpio/lib_gpio/doc/rst/xdoc.conf @@ -0,0 +1,2 @@ +XMOSNEWSTYLE = 1 +DOXYGEN_DIRS=../../api \ No newline at end of file diff --git a/lib_gpio/lib_gpio/lib_build_info.cmake b/lib_gpio/lib_gpio/lib_build_info.cmake new file mode 100644 index 0000000..2e18051 --- /dev/null +++ b/lib_gpio/lib_gpio/lib_build_info.cmake @@ -0,0 +1,6 @@ +set(LIB_NAME lib_gpio) +set(LIB_VERSION 2.2.0) +set(LIB_INCLUDES api) +set(LIB_COMPILER_FLAGS -Os) + +XMOS_REGISTER_MODULE() diff --git a/lib_gpio/lib_gpio/module_build_info b/lib_gpio/lib_gpio/module_build_info new file mode 100644 index 0000000..182d5bb --- /dev/null +++ b/lib_gpio/lib_gpio/module_build_info @@ -0,0 +1,14 @@ +VERSION = 2.2.0 + +DEPENDENT_MODULES = lib_xassert(>=4.0.0) + +MODULE_XCC_FLAGS = $(XCC_FLAGS) \ + -O3 + +OPTIONAL_HEADERS += + +EXPORT_INCLUDE_DIRS = api + +INCLUDE_DIRS = $(EXPORT_INCLUDE_DIRS) + +SOURCE_DIRS = src diff --git a/lib_gpio/lib_gpio/src/gpio.xc b/lib_gpio/lib_gpio/src/gpio.xc new file mode 100644 index 0000000..c800e06 --- /dev/null +++ b/lib_gpio/lib_gpio/src/gpio.xc @@ -0,0 +1,163 @@ +// Copyright 2014-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#include +#include +#include +#include + +[[distributable]] +void input_gpio(server input_gpio_if i[n], static const size_t n, + in port p, char (&?pin_map)[n]) +{ + char *pmap; + char default_pmap[n]; + if (!isnull(pin_map)) { + pmap = pin_map; + } + else { + pmap = default_pmap; + for (size_t i = 0; i < n; i++) + pmap[i] = i; + } + while (1) { + select { + case i[int j].input() -> unsigned result: + unsigned pos = pmap[j]; + p :> result; + result = (result >> pos) & 1; + break; + case i[int j].input_and_timestamp(gpio_time_t &ts) -> unsigned result: + unsigned pos = pmap[j]; + p :> result @ ts; + result = (result >> pos) & 1; + break; + case i[int j].event_when_pins_eq(unsigned value): + fail("input_gpio task does not support events."); + break; + } + } +} + + +#pragma unsafe arrays +[[combinable]] +void input_gpio_with_events(server input_gpio_if i[n], + static const size_t n, + in port p, + char (&?pin_map)[n]) +{ + char *pmap; + char default_pmap[32]; + if (!isnull(pin_map)) { + pmap = pin_map; + } + else { + pmap = default_pmap; + for (size_t i = 0; i < n; i++) + pmap[i] = i; + } + unsigned pval = 0; + char test_vals[32]; + unsigned waiting = 0; + for (size_t j = 0; j < n; j++) + test_vals[j] = -1; + while (1) { + select { + case i[int j].input() -> unsigned result: + unsigned pos = pmap[j]; + p :> result; + result = (result >> pos) & 1; + break; + case i[int j].input_and_timestamp(gpio_time_t &ts) -> unsigned result: + unsigned pos = pmap[j]; + p :> result @ ts; + result = (result >> pos) & 1; + break; + case i[int j].event_when_pins_eq(unsigned value): + unsigned val; + p :> val; + unsigned pos = pmap[j]; + unsigned bit = (val >> pos) & 1; + if (bit == value) + i[j].event(); + else { + if (test_vals[j] != -1) + waiting++; + test_vals[j] = value; + } + break; + case waiting => p when pinsneq(pval) :> pval: + for (size_t j = 0; j < n; j++) { + unsigned pos = pmap[j]; + unsigned bit = (pval >> pos) & 1; + if (bit == test_vals[j]) { + test_vals[j] = -1; + waiting--; + i[j].event(); + } + } + break; + } + } +} + + + +[[combinable]] +void input_gpio_1bit_with_events(server input_gpio_if i, in port p) +{ + unsigned test_val = -1; + while (1) { + select { + case i.input() -> unsigned result: + p :> result; + break; + case i.input_and_timestamp(gpio_time_t &ts) -> unsigned result: + p :> result @ ts; + break; + case i.event_when_pins_eq(unsigned value): + test_val = value; + break; + case (test_val != -1) => p when pinseq(test_val) :> int: + i.event(); + test_val = -1; + break; + } + } +} + + + +[[distributable]] +void output_gpio(server output_gpio_if i[n], static const size_t n, out port p, + char (&?pin_map)[n]) +{ + char *pmap; + char default_pmap[n]; + if (!isnull(pin_map)) { + pmap = pin_map; + } + else { + pmap = default_pmap; + for (size_t i = 0; i < n; i++) + pmap[i] = i; + } + unsigned current_val = 0; + while (1) { + select { + case i[int j].output(unsigned data): + unsigned pos = pmap[j]; + current_val &= ~(1 << pos); + current_val |= ((data & 1) << pos); + p <: current_val; + break; + + case i[int j].output_and_timestamp(unsigned data) -> gpio_time_t ts: + unsigned pos = pmap[j]; + current_val &= ~(1 << pos); + current_val |= ((data & 1) << pos); + p <: current_val @ ts; + break; + } + } +} diff --git a/lib_gpio/python/setup.py b/lib_gpio/python/setup.py new file mode 100644 index 0000000..1c63daa --- /dev/null +++ b/lib_gpio/python/setup.py @@ -0,0 +1,20 @@ +# Copyright 2020-2024 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import setuptools + +# Another repository might depend on python code defined in this one. The +# procedure to set up a suitable python environment for that repository may +# pip-install this one as editable using this setup.py file. To minimise the +# chance of version conflicts while ensuring a minimal degree of conformity, +# the 3rd-party modules listed here require the same major version and at +# least the same minor version as specified in the requirements.txt file. +# The same modules should appear in the requirements.txt file as given below. +setuptools.setup( + name='lib_gpio', + packages=setuptools.find_packages(), + install_requires=[ + 'flake8~=7.0', + ], + dependency_links=[ + ], +) diff --git a/lib_gpio/requirements.txt b/lib_gpio/requirements.txt new file mode 100644 index 0000000..d65050a --- /dev/null +++ b/lib_gpio/requirements.txt @@ -0,0 +1,34 @@ +# python_version 3.12 +# +# The parse_version_from_requirements() function in the installPipfile.groovy +# file of the Jenkins Shared Library uses the python_version comment to set +# the version of python used. + +# Distributed (released) dependencies +# +# The python modules listed below specify a known working combination required +# by the python code in this repository. The procedure used to set up a +# suitable python environment for it installs the version of each module in +# the list. Using a specific version ensures a controlled infrastructure for +# development, testing and release of this repository. +# +# Another repository might depend on python code defined in this one. The +# procedure to set up a suitable python environment for that repository may +# pip-install this one as editable using this repository's setup.py file. The +# same modules should appear in the setup.py list as given below. + +flake8==7.0.0 + +# Development dependencies +# +# Each link listed below specifies the path to a setup.py file which are +# installed in editable mode with '-e $PATH' (without the quotes). +# +# If python code in this repository depends on python code under development +# in another repository, then an entry for that other respository should +# appear in this list instead of the released dependencies list. +# +# If this repository uses the setup functionality (e.g., script entry points) +# of its own setup.py file, then this list must include an entry for that +# setup.py file, e.g., '-e .' or '-e ./python' (without the quotes). +-e ./python diff --git a/lib_gpio/tests/gpio_basic_checker.py b/lib_gpio/tests/gpio_basic_checker.py new file mode 100644 index 0000000..aef460c --- /dev/null +++ b/lib_gpio/tests/gpio_basic_checker.py @@ -0,0 +1,74 @@ +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest + +class GPIOBasicChecker(xmostest.SimThread): + """ + This simulator thread will read and write to pins. + """ + + def __init__(self, mode, test_port, expected_test_port_data, num_clients, + trigger_port = None): + self._mode = mode + if self._mode != 'input' and self._mode != 'output': + print("ERROR: Checker initialised in unsupported mode %s" % + (self._mode)) + self._test_port = test_port + self._expected_test_port_data = expected_test_port_data + self._num_clients = num_clients + self._trigger_port = trigger_port + + print("Checking %s on port %s with %d clients" % (self._mode, + self._test_port, self._num_clients)) + if self._trigger_port != None: + print("Using port %s as trigger" % (self._trigger_port)) + + def drive_port(self, xsi): + # Check the xCORE is not trying to drive the port + if xsi.is_port_driving(self._test_port): + print("ERROR: xCORE driving port %s which expected to be input only" + % (self._test_port)) + # Drive the port + xsi.drive_port_pins(self._test_port, self._expected_test_port_data) + print("Checker driving port") + + def read_port(self, xsi): + pin_values = [] + for client in range(0, self._num_clients): + pin_values.append(-1) + + correct_pin_count = 0 + while (correct_pin_count < self._num_clients): + # Wait for the xCORE to drive the port + self.wait_for_port_pins_change([self._test_port]) + port_data = xsi.sample_port_pins(self._test_port) + for client in range(0, self._num_clients): + # Check for the updated pin + pin_data = ((port_data >> client) & 1) + if pin_values[client] == -1: + # Not yet seen the correct pin data yet + if pin_data == ((self._expected_test_port_data >> + client) & 1): + pin_values[client] = pin_data + correct_pin_count +=1 + print("Checker has seen correct value on pin %d " % + (client)) + else: # Check valid pin data has not been overwritten + if pin_values[client] != ((self._expected_test_port_data >> + client) & 1): + print("ERROR: Data on pin %d changed unexpected" % + (client)) + print("Checker has seen all pins change") + + # Drive trigger port to allow xCORE program to terminate + xsi.drive_port_pins(self._trigger_port, 1) + print("Checker driving termination trigger") + + def run(self): + if self._mode == 'input': + # xCORE testing 'input' functionality means checker must drive port + self.drive_port(self.xsi) + elif self._mode == 'output': + # xCORE testing 'output' functionality means checker must read port + self.read_port(self.xsi) + print("Checker complete") diff --git a/lib_gpio/tests/gpio_events_checker.py b/lib_gpio/tests/gpio_events_checker.py new file mode 100644 index 0000000..968e5f0 --- /dev/null +++ b/lib_gpio/tests/gpio_events_checker.py @@ -0,0 +1,49 @@ +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest + +class GPIOEventsChecker(xmostest.SimThread): + """ + This simulator thread will write to pins to allow xCORE to event. + """ + + def __init__(self, test_port, expected_test_port_data, num_clients, + trigger_port): + self._test_port = test_port + self._expected_test_port_data = expected_test_port_data + self._num_clients = num_clients + self._trigger_port = trigger_port + + print("Checking events on port %s with %d clients" % (self._test_port, + self._num_clients)) + print("Using port %s as trigger" % (self._trigger_port)) + + def drive_port(self, xsi): + # Check the xCORE is not trying to drive the port + if xsi.is_port_driving(self._test_port): + print("ERROR: xCORE driving port %s which expected to be input only" + % (self._test_port)) + # Drive the test port + xsi.drive_port_pins(self._test_port, self._expected_test_port_data) + print("Checker driving port") + # Flip bits of expected data for second part of test + self._expected_test_port_data = ~self._expected_test_port_data + # Delay driving new data to test port until num_client bits of + # trigger_port go high + expected_trigger_data = 0 + for i in range(0, self._num_clients): + expected_trigger_data = (expected_trigger_data << 1) + 1 + print("Checker expecting 0x%x as trigger data" % (expected_trigger_data)) + while True: + self.wait_for_port_pins_change([self._trigger_port]) + trigger_data = xsi.sample_port_pins(self._trigger_port) + if trigger_data == expected_trigger_data: + print("Checker received correct trigger") + break + # Drive the test port + xsi.drive_port_pins(self._test_port, self._expected_test_port_data) + print("Checker driving port") + + def run(self): + self.drive_port(self.xsi) + print("Checker complete") diff --git a/lib_gpio/tests/gpio_input_1bit_test/Makefile b/lib_gpio/tests/gpio_input_1bit_test/Makefile new file mode 100644 index 0000000..ce7ec21 --- /dev/null +++ b/lib_gpio/tests/gpio_input_1bit_test/Makefile @@ -0,0 +1,36 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +COMMON_FLAGS = -O2 -g -save-temps -DDEBUG_PRINT_ENABLE=1 -report + +XCC_FLAGS_input_basic = $(COMMON_FLAGS) -DEVENTS=0 -DTIMESTAMPS=0 +XCC_FLAGS_input_events = $(COMMON_FLAGS) -DEVENTS=1 -DTIMESTAMPS=0 +XCC_FLAGS_input_timestamps = $(COMMON_FLAGS) -DEVENTS=0 -DTIMESTAMPS=1 + +# The USED_MODULES variable lists other module used by the application. + +USED_MODULES = lib_gpio lib_logging + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_gpio/tests/gpio_input_1bit_test/src/main.xc b/lib_gpio/tests/gpio_input_1bit_test/src/main.xc new file mode 100644 index 0000000..8912c7d --- /dev/null +++ b/lib_gpio/tests/gpio_input_1bit_test/src/main.xc @@ -0,0 +1,105 @@ +// Copyright 2015-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#include +#include +#include +#include +#include "debug_print.h" + +#define NUM_TEST_EVENTS (2) +#define TIMESTAMP_TEST_DELAY_MICROSECONDS (5) +#define TIMESTAMP_TEST_DELAY_CLOCKS (TIMESTAMP_TEST_DELAY_MICROSECONDS * XS1_TIMER_MHZ) +#define TIMESTAMP_TEST_DELAY_SLACK_CLOCKS (100) + +port input_port = XS1_PORT_1A; +port trigger_port = XS1_PORT_4B; + +void read_port_on_event(client input_gpio_if input_port) { + unsigned int completed_events = 0; + unsigned int expected_value = 1; + + /* Setup event that should trigger immediately */ + input_port.event_when_pins_eq(expected_value); + debug_printf("xCORE setup pins eq event\n"); + + while (1) { + select { + case input_port.event(): + debug_printf("xCORE got input port event\n"); + completed_events++; + // Read value on pin to make sure it's correct + unsigned int pin_data = input_port.input(); + if (pin_data != expected_value) { + debug_printf("ERROR: Data 0x%x read does not match expected data 0x%x\n", + pin_data, expected_value); + } + + if (completed_events < NUM_TEST_EVENTS) { + /* Setup event that should trigger later */ + // Flip expected_value each iteration of test + expected_value = !expected_value; + input_port.event_when_pins_eq(expected_value); + debug_printf("xCORE setup pins eq event\n"); + // Trigger simulator to output new expected_value + debug_printf("xCORE driving trigger port\n"); + trigger_port <: 1; + } else { + _exit(0); + } + break; + } + } +} + +void read_port(client input_gpio_if input_port) { + unsigned int pin_data; + unsigned int expected_value = 1; + + if (TIMESTAMPS) { + gpio_time_t ts1, ts2; + pin_data = input_port.input_and_timestamp(ts1); + // Wait known time before second input with timestamp + delay_microseconds(TIMESTAMP_TEST_DELAY_MICROSECONDS); + input_port.input_and_timestamp(ts2); + // Check that the second ts is a later time than the first + if (porttimeafter(ts1, ts2)) { + debug_printf("ERROR: Second timestamp (%d) read appears to be earlier than first (%d)\n", + ts2, ts1); + } + // Sanity check difference between timestamps + if ((ts2 - ts1) < + (TIMESTAMP_TEST_DELAY_CLOCKS - TIMESTAMP_TEST_DELAY_SLACK_CLOCKS)) { + debug_printf("ERROR: Difference between timestamps (%d, %d) read smaller than expected\n", + ts1, ts2); + } + if ((ts2 - ts1) > + (TIMESTAMP_TEST_DELAY_CLOCKS + TIMESTAMP_TEST_DELAY_SLACK_CLOCKS)) { + debug_printf("ERROR: Difference between timestamps (%d, %d) read larger than expected\n", + ts1, ts2); + } + } else { + pin_data = input_port.input(); + } + + if (pin_data != expected_value) { + debug_printf("ERROR: Data 0x%x read does not match expected data 0x%x\n", + pin_data, expected_value); + } else { + debug_printf("xCORE input data correctly\n"); + } + + _exit(0); +} + +int main(void) { + interface input_gpio_if i_input_port; + par { + input_gpio_1bit_with_events(i_input_port, input_port); +#if EVENTS + read_port_on_event(i_input_port); +#else + read_port(i_input_port); +#endif + } + return 0; +} diff --git a/lib_gpio/tests/gpio_input_1bit_test/wscript b/lib_gpio/tests/gpio_input_1bit_test/wscript new file mode 100644 index 0000000..2121c33 --- /dev/null +++ b/lib_gpio/tests/gpio_input_1bit_test/wscript @@ -0,0 +1,14 @@ +def options(opt): + opt.load('xwaf.xcommon') + +def configure(conf): + conf.load('xwaf.xcommon') + +def build(bld): + bld.do_xcommon() + +def dist(ctx): + ctx.load('xwaf.xcommon') + +def distcheck(ctx): + ctx.load('xwaf.xcommon') diff --git a/lib_gpio/tests/gpio_input_basic_test/Makefile b/lib_gpio/tests/gpio_input_basic_test/Makefile new file mode 100644 index 0000000..a4019e5 --- /dev/null +++ b/lib_gpio/tests/gpio_input_basic_test/Makefile @@ -0,0 +1,40 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +COMMON_FLAGS = -O2 -g -save-temps -DDEBUG_PRINT_ENABLE=1 -report + +XCC_FLAGS_input_basic = $(COMMON_FLAGS) -DEVENTS=0 -DTIMESTAMPS=0 -DSUPPLY_PIN_MAP=0 -DCROSSTILE=0 +XCC_FLAGS_input_events = $(COMMON_FLAGS) -DEVENTS=1 -DTIMESTAMPS=0 -DSUPPLY_PIN_MAP=0 -DCROSSTILE=0 +XCC_FLAGS_input_timestamps = $(COMMON_FLAGS) -DEVENTS=0 -DTIMESTAMPS=1 -DSUPPLY_PIN_MAP=0 -DCROSSTILE=0 +XCC_FLAGS_input_events_timestamps = $(COMMON_FLAGS) -DEVENTS=1 -DTIMESTAMPS=1 -DSUPPLY_PIN_MAP=0 -DCROSSTILE=0 +XCC_FLAGS_input_supply_pin_map = $(COMMON_FLAGS) -DEVENTS=0 -DTIMESTAMPS=0 -DSUPPLY_PIN_MAP=1 -DCROSSTILE=0 +XCC_FLAGS_input_crosstile = $(COMMON_FLAGS) -DEVENTS=0 -DTIMESTAMPS=0 -DSUPPLY_PIN_MAP=0 -DCROSSTILE=1 +XCC_FLAGS_input_events_timestamps_supply_pin_map_crosstile = $(COMMON_FLAGS) -DEVENTS=1 -DTIMESTAMPS=1 -DSUPPLY_PIN_MAP=1 -DCROSSTILE=1 + +# The USED_MODULES variable lists other module used by the application. + +USED_MODULES = lib_gpio lib_logging + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_gpio/tests/gpio_input_basic_test/src/main.xc b/lib_gpio/tests/gpio_input_basic_test/src/main.xc new file mode 100644 index 0000000..b548ef9 --- /dev/null +++ b/lib_gpio/tests/gpio_input_basic_test/src/main.xc @@ -0,0 +1,85 @@ +// Copyright 2015-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#include +#include +#include +#include +#include +#include "debug_print.h" + +#ifndef CROSSTILE +#define CROSSTILE 0 +#endif + +#define NUM_CLIENTS (4) +#define TIMESTAMP_TEST_DELAY_MICROSECONDS (5) +#define TIMESTAMP_TEST_DELAY_CLOCKS (TIMESTAMP_TEST_DELAY_MICROSECONDS * XS1_TIMER_MHZ) +#define TIMESTAMP_TEST_DELAY_SLACK_CLOCKS (100 + CROSSTILE?100:0) + +on tile[0] : port input_port = XS1_PORT_4D; + +void read_port(client input_gpio_if input_port, unsigned int client_num) { + unsigned int pin_data; + unsigned int expected_value = (client_num & 1); + if (SUPPLY_PIN_MAP) { + expected_value = !expected_value; + } + + if (TIMESTAMPS) { + gpio_time_t ts1, ts2; + pin_data = input_port.input_and_timestamp(ts1); + // Wait known time before second input with timestamp + delay_microseconds(TIMESTAMP_TEST_DELAY_MICROSECONDS); + input_port.input_and_timestamp(ts2); + // Check that the second ts is a later time than the first + if (porttimeafter(ts1, ts2)) { + debug_printf("ERROR: Second timestamp (%d) read by client %d appears to be earlier than first (%d)\n", + ts2, client_num, ts1); + } + // Sanity check difference between timestamps + if ((ts2 - ts1) < + (TIMESTAMP_TEST_DELAY_CLOCKS - TIMESTAMP_TEST_DELAY_SLACK_CLOCKS)) { + debug_printf("ERROR: Difference between timestamps (%d, %d) read by client %d smaller than expected\n", + ts1, ts2, client_num); + } + if ((ts2 - ts1) > + (TIMESTAMP_TEST_DELAY_CLOCKS + TIMESTAMP_TEST_DELAY_SLACK_CLOCKS)) { + debug_printf("ERROR: Difference between timestamps (%d, %d) read by client %d larger than expected\n", + ts1, ts2, client_num); + } + } else { + pin_data = input_port.input(); + } + + if (pin_data != expected_value) { + debug_printf("ERROR: Data 0x%x read by client %d does not match expected data 0x%x\n", + pin_data, client_num, expected_value); + } else { + debug_printf("xCORE client %d input data correctly\n", client_num); + } + + // Allow other cores to complete + delay_microseconds(5); + _exit(0); +} + +#if SUPPLY_PIN_MAP +static char pin_map[NUM_CLIENTS] = {1, 0, 3, 2}; +#else +#define pin_map null +#endif + +int main(void) { + interface input_gpio_if i_input_port[NUM_CLIENTS]; + par { +#if EVENTS + on tile[0] : input_gpio_with_events(i_input_port, NUM_CLIENTS, input_port, pin_map); +#else + on tile[0] : input_gpio(i_input_port, NUM_CLIENTS, input_port, pin_map); +#endif + par (int i = 0; i < NUM_CLIENTS; i++) { + on tile[CROSSTILE?i%2:0] : read_port(i_input_port[i], i); + } + } + return 0; +} diff --git a/lib_gpio/tests/gpio_input_basic_test/wscript b/lib_gpio/tests/gpio_input_basic_test/wscript new file mode 100644 index 0000000..2121c33 --- /dev/null +++ b/lib_gpio/tests/gpio_input_basic_test/wscript @@ -0,0 +1,14 @@ +def options(opt): + opt.load('xwaf.xcommon') + +def configure(conf): + conf.load('xwaf.xcommon') + +def build(bld): + bld.do_xcommon() + +def dist(ctx): + ctx.load('xwaf.xcommon') + +def distcheck(ctx): + ctx.load('xwaf.xcommon') diff --git a/lib_gpio/tests/gpio_input_events_test/Makefile b/lib_gpio/tests/gpio_input_events_test/Makefile new file mode 100644 index 0000000..a5ea89f --- /dev/null +++ b/lib_gpio/tests/gpio_input_events_test/Makefile @@ -0,0 +1,35 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +COMMON_FLAGS = -O2 -g -save-temps -DDEBUG_PRINT_ENABLE=1 -report -DXASSERT_ENABLE_ASSERTIONS=1 -DXASSERT_ENABLE_DEBUG=1 + +XCC_FLAGS_input_basic = $(COMMON_FLAGS) -DEVENTS=0 +XCC_FLAGS_input_events = $(COMMON_FLAGS) -DEVENTS=1 + +# The USED_MODULES variable lists other module used by the application. + +USED_MODULES = lib_gpio lib_logging + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_gpio/tests/gpio_input_events_test/src/main.xc b/lib_gpio/tests/gpio_input_events_test/src/main.xc new file mode 100644 index 0000000..9e02498 --- /dev/null +++ b/lib_gpio/tests/gpio_input_events_test/src/main.xc @@ -0,0 +1,70 @@ +// Copyright 2015-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#include +#include +#include +#include +#include "debug_print.h" + +#define NUM_CLIENTS (4) +#define NUM_TEST_EVENTS (2) + +port input_port = XS1_PORT_4D; +port trigger_port = XS1_PORT_4B; + +void read_port_on_event(client input_gpio_if input_port, unsigned int client_num, + client output_gpio_if trigger_port) { + unsigned int completed_events = 0; + unsigned int expected_value = (client_num & 1); + + /* Setup event that should trigger immediately */ + input_port.event_when_pins_eq(expected_value); + debug_printf("xCORE client %d setup pins eq event\n", client_num); + + while (1) { + select { + case input_port.event(): + debug_printf("xCORE client %d got input port event\n", client_num); + completed_events++; + // Read value on pin to make sure it's correct + unsigned int pin_data = input_port.input(); + if (pin_data != expected_value) { + debug_printf("ERROR: Data 0x%x read by client %d does not match expected data 0x%x\n", + pin_data, client_num, expected_value); + } + + if (completed_events < NUM_TEST_EVENTS) { + /* Setup event that should trigger later */ + // Flip expected_value each iteration of test + expected_value = !expected_value; + input_port.event_when_pins_eq(expected_value); + debug_printf("xCORE client %d setup pins eq event\n", client_num); + // Trigger simulator to output new expected_value + debug_printf("xCORE client %d driving trigger port\n", client_num); + trigger_port.output(1); + } else { + // Allow other cores to complete + delay_microseconds(5); + _exit(0); + } + break; + } + } +} + +int main(void) { + interface input_gpio_if i_input_port[NUM_CLIENTS]; + interface output_gpio_if i_trigger_port[NUM_CLIENTS]; + par { +#if EVENTS + input_gpio_with_events(i_input_port, NUM_CLIENTS, input_port, null); +#else + input_gpio(i_input_port, NUM_CLIENTS, input_port, null); +#endif + output_gpio(i_trigger_port, NUM_CLIENTS, trigger_port, null); + par (int i = 0; i < NUM_CLIENTS; i++) { + read_port_on_event(i_input_port[i], i, i_trigger_port[i]); + } + } + return 0; +} diff --git a/lib_gpio/tests/gpio_input_events_test/wscript b/lib_gpio/tests/gpio_input_events_test/wscript new file mode 100644 index 0000000..2121c33 --- /dev/null +++ b/lib_gpio/tests/gpio_input_events_test/wscript @@ -0,0 +1,14 @@ +def options(opt): + opt.load('xwaf.xcommon') + +def configure(conf): + conf.load('xwaf.xcommon') + +def build(bld): + bld.do_xcommon() + +def dist(ctx): + ctx.load('xwaf.xcommon') + +def distcheck(ctx): + ctx.load('xwaf.xcommon') diff --git a/lib_gpio/tests/gpio_output_test/Makefile b/lib_gpio/tests/gpio_output_test/Makefile new file mode 100644 index 0000000..d732995 --- /dev/null +++ b/lib_gpio/tests/gpio_output_test/Makefile @@ -0,0 +1,36 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +COMMON_FLAGS = -O2 -g -save-temps -DDEBUG_PRINT_ENABLE=1 -report + +XCC_FLAGS_output_basic = $(COMMON_FLAGS) -DTIMESTAMPS=0 -DSUPPLY_PIN_MAP=0 +XCC_FLAGS_output_timestamps = $(COMMON_FLAGS) -DTIMESTAMPS=1 -DSUPPLY_PIN_MAP=0 +XCC_FLAGS_output_supply_pin_map = $(COMMON_FLAGS) -DTIMESTAMPS=0 -DSUPPLY_PIN_MAP=1 + +# The USED_MODULES variable lists other module used by the application. + +USED_MODULES = lib_gpio lib_logging + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_gpio/tests/gpio_output_test/src/main.xc b/lib_gpio/tests/gpio_output_test/src/main.xc new file mode 100644 index 0000000..0e239d8 --- /dev/null +++ b/lib_gpio/tests/gpio_output_test/src/main.xc @@ -0,0 +1,75 @@ +// Copyright 2015-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#include +#include +#include +#include "debug_print.h" + +#define NUM_CLIENTS (4) +#define TIMESTAMP_TEST_DELAY_MICROSECONDS (5) +#define TIMESTAMP_TEST_DELAY_CLOCKS (TIMESTAMP_TEST_DELAY_MICROSECONDS * XS1_TIMER_MHZ) +#define TIMESTAMP_TEST_DELAY_SLACK_CLOCKS (100) + +port output_port = XS1_PORT_4D; +port trigger_port = XS1_PORT_4B; + +void wait_for_termination_signal() { + debug_printf("xCORE waiting for termination signal\n"); + select { + case trigger_port when pinsneq(0) :> int _: + _exit(0); + break; + } +} + +void drive_port(client output_gpio_if output_port, unsigned int client_num) { + unsigned int expected_pin_data = (client_num & 1); + if (SUPPLY_PIN_MAP) { + expected_pin_data = !expected_pin_data; + } + + if (TIMESTAMPS) { + gpio_time_t ts1, ts2; + debug_printf("xCORE client %d driving port\n", client_num); + ts1 = output_port.output_and_timestamp(expected_pin_data); + // Wait known time before second input with timestamp + delay_microseconds(TIMESTAMP_TEST_DELAY_MICROSECONDS); + ts2 = output_port.output_and_timestamp(expected_pin_data); + // Check that the second ts is a later time than the first + if (porttimeafter(ts1, ts2)) { + debug_printf("ERROR: Second timestamp (%d) received by client %d appears to be earlier than first (%d)\n", + ts2, client_num, ts1); + } + // Sanity check difference between timestamps + if ((ts2 - ts1) < + (TIMESTAMP_TEST_DELAY_CLOCKS - TIMESTAMP_TEST_DELAY_SLACK_CLOCKS)) { + debug_printf("ERROR: Difference between timestamps (%d, %d) received by client %d smaller than expected\n", + ts1, ts2, client_num); + } + if ((ts2 - ts1) > + (TIMESTAMP_TEST_DELAY_CLOCKS + TIMESTAMP_TEST_DELAY_SLACK_CLOCKS)) { + debug_printf("ERROR: Difference between timestamps (%d, %d) received by client %d larger than expected\n", + ts1, ts2, client_num); + } + } else { + debug_printf("xCORE client %d driving port\n", client_num); + output_port.output(expected_pin_data); + } +} + +int main(void) { + interface output_gpio_if i_output_port[NUM_CLIENTS]; +#if SUPPLY_PIN_MAP + char pin_map[NUM_CLIENTS] = {1, 0, 3, 2}; +#else +#define pin_map null +#endif + par { + output_gpio(i_output_port, NUM_CLIENTS, output_port, pin_map); + par (int i = 0; i < NUM_CLIENTS; i++) { + drive_port(i_output_port[i], i); + } + wait_for_termination_signal(); + } + return 0; +} diff --git a/lib_gpio/tests/gpio_output_test/wscript b/lib_gpio/tests/gpio_output_test/wscript new file mode 100644 index 0000000..2121c33 --- /dev/null +++ b/lib_gpio/tests/gpio_output_test/wscript @@ -0,0 +1,14 @@ +def options(opt): + opt.load('xwaf.xcommon') + +def configure(conf): + conf.load('xwaf.xcommon') + +def build(bld): + bld.do_xcommon() + +def dist(ctx): + ctx.load('xwaf.xcommon') + +def distcheck(ctx): + ctx.load('xwaf.xcommon') diff --git a/lib_gpio/tests/input_1bit_basic_test.expected b/lib_gpio/tests/input_1bit_basic_test.expected new file mode 100644 index 0000000..e4d8ffc --- /dev/null +++ b/lib_gpio/tests/input_1bit_basic_test.expected @@ -0,0 +1,3 @@ +Checker driving port +Checker complete +xCORE input data correctly diff --git a/lib_gpio/tests/input_1bit_events_test.expected b/lib_gpio/tests/input_1bit_events_test.expected new file mode 100644 index 0000000..11da1f3 --- /dev/null +++ b/lib_gpio/tests/input_1bit_events_test.expected @@ -0,0 +1,10 @@ +Checker driving port +Checker expecting 0x1 as trigger data +xCORE setup pins eq event +xCORE got input port event +xCORE setup pins eq event +xCORE driving trigger port +Checker received correct trigger +Checker driving port +Checker complete +xCORE got input port event diff --git a/lib_gpio/tests/input_basic_test.expected b/lib_gpio/tests/input_basic_test.expected new file mode 100644 index 0000000..e0b10c8 --- /dev/null +++ b/lib_gpio/tests/input_basic_test.expected @@ -0,0 +1,6 @@ +Checker driving port +Checker complete +xCORE client \d input data correctly +xCORE client \d input data correctly +xCORE client \d input data correctly +xCORE client \d input data correctly diff --git a/lib_gpio/tests/input_events_test_basic.expected b/lib_gpio/tests/input_events_test_basic.expected new file mode 100644 index 0000000..bf0117d --- /dev/null +++ b/lib_gpio/tests/input_events_test_basic.expected @@ -0,0 +1,3 @@ +Checker driving port +Checker expecting 0x\w as trigger data +input_gpio task does not support events. diff --git a/lib_gpio/tests/input_events_test_events.expected b/lib_gpio/tests/input_events_test_events.expected new file mode 100644 index 0000000..16324d4 --- /dev/null +++ b/lib_gpio/tests/input_events_test_events.expected @@ -0,0 +1,25 @@ +Checker driving port +Checker expecting 0x\w as trigger data +xCORE client \d setup pins eq event +xCORE client \d setup pins eq event +xCORE client \d setup pins eq event +xCORE client \d setup pins eq event +xCORE client \d got input port event +xCORE client \d got input port event +xCORE client \d got input port event +xCORE client \d got input port event +xCORE client \d setup pins eq event +xCORE client \d setup pins eq event +xCORE client \d setup pins eq event +xCORE client \d setup pins eq event +xCORE client \d driving trigger port +xCORE client \d driving trigger port +xCORE client \d driving trigger port +xCORE client \d driving trigger port +Checker received correct trigger +Checker driving port +Checker complete +xCORE client \d got input port event +xCORE client \d got input port event +xCORE client \d got input port event +xCORE client \d got input port event diff --git a/lib_gpio/tests/output_supply_pin_map_test.expected b/lib_gpio/tests/output_supply_pin_map_test.expected new file mode 100644 index 0000000..9523ec2 --- /dev/null +++ b/lib_gpio/tests/output_supply_pin_map_test.expected @@ -0,0 +1,12 @@ +xCORE client \d driving port +xCORE client \d driving port +xCORE client \d driving port +xCORE client \d driving port +xCORE waiting for termination signal +Checker has seen correct value on pin \d +Checker has seen correct value on pin \d +Checker has seen correct value on pin \d +Checker has seen correct value on pin \d +Checker has seen all pins change +Checker driving termination trigger +Checker complete diff --git a/lib_gpio/tests/output_test.expected b/lib_gpio/tests/output_test.expected new file mode 100644 index 0000000..9523ec2 --- /dev/null +++ b/lib_gpio/tests/output_test.expected @@ -0,0 +1,12 @@ +xCORE client \d driving port +xCORE client \d driving port +xCORE client \d driving port +xCORE client \d driving port +xCORE waiting for termination signal +Checker has seen correct value on pin \d +Checker has seen correct value on pin \d +Checker has seen correct value on pin \d +Checker has seen correct value on pin \d +Checker has seen all pins change +Checker driving termination trigger +Checker complete diff --git a/lib_gpio/tests/runtests.py b/lib_gpio/tests/runtests.py new file mode 100644 index 0000000..b50a149 --- /dev/null +++ b/lib_gpio/tests/runtests.py @@ -0,0 +1,31 @@ +#!/usr/bin/env python +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest + +if __name__ == "__main__": + xmostest.init() + + xmostest.register_group("lib_gpio", + "gpio_sim_tests", + "GPIO simulator tests", + """ +Tests are performed by running the GPIO library connected to a simulator model +(written as a python plugin to xsim). The simulator model checks that the pins +are driven and read by the ports as expected. Tests are run to test the +following features: + + * Inputting on a multibit port with multiple clients using the default pin map + * Inputting on a multibit port with multiple clients using a specified pin map + * Inputting on a 1bit port + * Inputting with timestamps + * Eventing on a multibit input port + * Eventing on a 1bit input port + * Outputting on a multibit port with multiple clients using the default pin map + * Outputting on a multibit port with multiple clients using a specified pin map + * Outputting with timestamps +""") + + xmostest.runtests() + + xmostest.finish() diff --git a/lib_gpio/tests/test_input_1bit_basic.py b/lib_gpio/tests/test_input_1bit_basic.py new file mode 100644 index 0000000..7024099 --- /dev/null +++ b/lib_gpio/tests/test_input_1bit_basic.py @@ -0,0 +1,36 @@ +#!/usr/bin/env python +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest +from gpio_basic_checker import GPIOBasicChecker + +def do_input_1bit_basic_test(timestamps): + resources = xmostest.request_resource("xsim") + + path = '' + if not timestamps: + path += '_basic' + else: + if timestamps: + path += '_timestamps' + + binary = 'gpio_input_1bit_test/bin/input' + path + \ + '/gpio_input_1bit_test_input' + path + '.xe' + + checker = GPIOBasicChecker(mode="input", + test_port="tile[0]:XS1_PORT_1A", + expected_test_port_data=0b1, + num_clients=1) + + tester = xmostest.ComparisonTester(open('input_1bit_basic_test.expected'), + 'lib_gpio', 'gpio_sim_tests', + 'input_1bit_basic_test', + {'timestamps':timestamps,}, + regexp=False) + + xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker], + tester = tester) + +def runtest(): + do_input_1bit_basic_test(timestamps=False) + do_input_1bit_basic_test(timestamps=True) diff --git a/lib_gpio/tests/test_input_1bit_events.py b/lib_gpio/tests/test_input_1bit_events.py new file mode 100644 index 0000000..0fb4f3a --- /dev/null +++ b/lib_gpio/tests/test_input_1bit_events.py @@ -0,0 +1,26 @@ +#!/usr/bin/env python +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest +from gpio_events_checker import GPIOEventsChecker + +def do_input_1bit_events_test(): + resources = xmostest.request_resource("xsim") + + binary = 'gpio_input_1bit_test/bin/input_events/gpio_input_1bit_test_input_events.xe' + + checker = GPIOEventsChecker(test_port="tile[0]:XS1_PORT_1A", + expected_test_port_data=0b1, + num_clients=1, + trigger_port="tile[0]:XS1_PORT_4B") + + tester = xmostest.ComparisonTester(open('input_1bit_events_test.expected'), + 'lib_gpio', 'gpio_sim_tests', + 'input_1bit_events_test', + regexp=False) + + xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker], + tester = tester) + +def runtest(): + do_input_1bit_events_test() diff --git a/lib_gpio/tests/test_input_basic.py b/lib_gpio/tests/test_input_basic.py new file mode 100644 index 0000000..283304a --- /dev/null +++ b/lib_gpio/tests/test_input_basic.py @@ -0,0 +1,50 @@ +#!/usr/bin/env python +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest +from gpio_basic_checker import GPIOBasicChecker + +def do_input_basic_test(events, timestamps, supply_pin_map, crosstile): + resources = xmostest.request_resource("xsim") + + path = '' + if not events and not timestamps and not supply_pin_map and not crosstile: + path += '_basic' + else: + if events: + path += '_events' + if timestamps: + path += '_timestamps' + if supply_pin_map: + path += '_supply_pin_map' + if crosstile: + path += '_crosstile' + + binary = 'gpio_input_basic_test/bin/input' + path + \ + '/gpio_input_basic_test_input' + path + '.xe' + + checker = GPIOBasicChecker(mode="input", + test_port="tile[0]:XS1_PORT_4D", + expected_test_port_data=0b1010, + num_clients=4) + + tester = xmostest.ComparisonTester(open('input_basic_test.expected'), + 'lib_gpio', 'gpio_sim_tests', + 'input_basic_test', + {'events':events, + 'timestamps':timestamps, + 'supply_pin_map':supply_pin_map, + 'crosstile':crosstile}, + regexp=True) + + xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker], + tester = tester) + +def runtest(): + do_input_basic_test(events=False, timestamps=False, supply_pin_map=False, crosstile=False) + do_input_basic_test(events=False, timestamps=False, supply_pin_map=True, crosstile=False) + do_input_basic_test(events=False, timestamps=True, supply_pin_map=False, crosstile=False) + do_input_basic_test(events=True, timestamps=False, supply_pin_map=False, crosstile=False) + do_input_basic_test(events=True, timestamps=True, supply_pin_map=False, crosstile=False) + do_input_basic_test(events=False, timestamps=False, supply_pin_map=False, crosstile=True) + do_input_basic_test(events=True, timestamps=True, supply_pin_map=True, crosstile=True) diff --git a/lib_gpio/tests/test_input_events.py b/lib_gpio/tests/test_input_events.py new file mode 100644 index 0000000..297cad5 --- /dev/null +++ b/lib_gpio/tests/test_input_events.py @@ -0,0 +1,36 @@ +#!/usr/bin/env python +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest +from gpio_events_checker import GPIOEventsChecker + +def do_input_events_test(events): + resources = xmostest.request_resource("xsim") + + path = '' + if not events: + path += '_basic' + else: + if events: + path += '_events' + + binary = 'gpio_input_events_test/bin/input' + path + \ + '/gpio_input_events_test_input' + path + '.xe' + + checker = GPIOEventsChecker(test_port="tile[0]:XS1_PORT_4D", + expected_test_port_data=0b1010, + num_clients=4, + trigger_port="tile[0]:XS1_PORT_4B") + + tester = xmostest.ComparisonTester(open('input_events_test%s.expected' % path), + 'lib_gpio', 'gpio_sim_tests', + 'input_events_test', + {'events':events}, + regexp=True) + + xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker], + tester = tester) + +def runtest(): + do_input_events_test(events=False) + do_input_events_test(events=True) diff --git a/lib_gpio/tests/test_output.py b/lib_gpio/tests/test_output.py new file mode 100644 index 0000000..15c07da --- /dev/null +++ b/lib_gpio/tests/test_output.py @@ -0,0 +1,45 @@ +#!/usr/bin/env python +# Copyright 2015-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import xmostest +from gpio_basic_checker import GPIOBasicChecker + +def do_output_test(timestamps, supply_pin_map): + resources = xmostest.request_resource("xsim") + + path = '' + if not timestamps and not supply_pin_map: + path += '_basic' + else: + if timestamps: + path += '_timestamps' + if supply_pin_map: + path += '_supply_pin_map' + + binary = 'gpio_output_test/bin/output' + path + \ + '/gpio_output_test_output' + path + '.xe' + + checker = GPIOBasicChecker(mode="output", + test_port="tile[0]:XS1_PORT_4D", + expected_test_port_data=0b1010, + num_clients=4, + trigger_port="tile[0]:XS1_PORT_4B") + + if supply_pin_map: + expected_result = 'output_supply_pin_map_test.expected' + else: + expected_result = 'output_test.expected' + tester = xmostest.ComparisonTester(open(expected_result), + 'lib_gpio', 'gpio_sim_tests', + 'output_test', + {'timestamps':timestamps, + 'supply_pin_map':supply_pin_map}, + regexp=True) + + xmostest.run_on_simulator(resources['xsim'], binary, simthreads = [checker], + tester = tester) + +def runtest(): + do_output_test(timestamps=False, supply_pin_map=False) + do_output_test(timestamps=False, supply_pin_map=True) + do_output_test(timestamps=True, supply_pin_map=False) diff --git a/lib_src/.gitignore b/lib_src/.gitignore new file mode 100644 index 0000000..5409e72 --- /dev/null +++ b/lib_src/.gitignore @@ -0,0 +1,34 @@ +**/.build*/* +**/bin/* +*.o +*.xe +*.vcd +*.xi +*.i +*.a +**/_build/ +**/run_*.log +**/pdf/* +*.pyc +test_results.csv +*.xmt +output*.dat +*.swp +.*.swp +.*.*.swp +*.swo +*.todo +org.eclipse.cdt.core.prefs +xsim.args +tests/src_output +*.bak +**/.venv/** +build/ +tests/tmp +tests/vpu_ff3_test/autogen +tests/vpu_rat_test/autogen +*.csv +python/lib_src.egg-info +**/tmp_models/ +*.bak +make_docs.sh \ No newline at end of file diff --git a/lib_src/.gitmodules b/lib_src/.gitmodules new file mode 100644 index 0000000..6a4a0e7 --- /dev/null +++ b/lib_src/.gitmodules @@ -0,0 +1,3 @@ +[submodule "xmos_cmake_toolchain"] + path = xmos_cmake_toolchain + url = git@github.com:xmos/xmos_cmake_toolchain.git diff --git a/lib_src/.xmos_ignore_source_check b/lib_src/.xmos_ignore_source_check new file mode 100644 index 0000000..6d5bb5f --- /dev/null +++ b/lib_src/.xmos_ignore_source_check @@ -0,0 +1,32 @@ +tests/asrc_test/model/ASRC.c +tests/asrc_test/model/ASRC.h +tests/asrc_test/model/FIR.c +tests/asrc_test/model/FIR.h +tests/asrc_test/model/FilterDefs.c +tests/asrc_test/model/FilterDefs.h +tests/asrc_test/model/IntArithmetic.c +tests/asrc_test/model/IntArithmetic.h +tests/asrc_test/model/Main.c +tests/asrc_test/model/Main.h +tests/ds3_test/model/FIRDS3.c +tests/ds3_test/model/FIRDS3.h +tests/ds3_test/model/IntArithmetic.c +tests/ds3_test/model/IntArithmetic.h +tests/ds3_test/model/Main.c +tests/ds3_test/model/Main.h +tests/os3_test/model/FIROS3.c +tests/os3_test/model/FIROS3.h +tests/os3_test/model/IntArithmetic.c +tests/os3_test/model/IntArithmetic.h +tests/os3_test/model/Main.c +tests/os3_test/model/Main.h +tests/ssrc_test/model/FIR.c +tests/ssrc_test/model/FIR.h +tests/ssrc_test/model/FilterDefs.c +tests/ssrc_test/model/FilterDefs.h +tests/ssrc_test/model/IntArithmetic.c +tests/ssrc_test/model/IntArithmetic.h +tests/ssrc_test/model/Main.c +tests/ssrc_test/model/Main.h +tests/ssrc_test/model/SSRC.c +tests/ssrc_test/model/SSRC.h diff --git a/lib_src/CHANGELOG.rst b/lib_src/CHANGELOG.rst new file mode 100644 index 0000000..5782a5d --- /dev/null +++ b/lib_src/CHANGELOG.rst @@ -0,0 +1,111 @@ +lib_src change log +================== + +2.5.0 +----- + + * ADDED: VPU enabled ASRC and SSRC providing a 2x speed improvement + * ADDED: Asynchronous FIFO with phase detector and PID rate controller for + ASRC usage + * ADDED: Support for XCommon CMake build system + * FIXED: Function pointer annotation avoid stack corruption when using + multiple instances of SSRC or ASRC. + + * Changes to dependencies: + + - lib_logging: 3.1.1 -> 3.2.0 + + - lib_xassert: Removed dependency + +2.4.0 +----- + + * ADDED: Support for building the core ASRC code in the C emulator as a + library + * ADDED: Auto-generated ASRC and SSRC performance plots in documentation + * ADDED: Documentation warning about overflow in XS3 optimized SRC components + * CHANGED: Documents built under Jenkins instead of Github Actions + * CHANGED: Tested against fwk_core v1.0.2 updated from v1.0.0 + +2.3.0 +----- + + * ADDED: XS3 VPU optimised voice fixed factor of 3 upsampling/downsampling + * ADDED: XS3 VPU optimised voice fixed factor of 3/2 upsampling/downsampling + * CHANGED: OS3 uses firos3_144.dat coefficients by default inline with model + * CHANGED: Replaced xmostest with pytest for all SRC automated tests + * CHANGED: Used XMOS doc builder for documentation + * CHANGED: Golden reference test signals now generated automatically by CI + * RESOLVED: Linker warning on channel ends + * REMOVED: AN00231 ASRC App Note. See github.com/xmos/sln_voice/examples + * CHANGED: Increased precision of the fFsRatioDeviation used in the C emulator + from float to double + * CHANGED: Allow for 64 bits in the rate ratio passed to asrc_process() for + extra precision + + * Changes to dependencies: + + - lib_logging: 2.0.1 -> 3.1.1 + + - lib_xassert: 2.0.1 -> 4.1.0 + +2.2.0 +----- + + * CHANGED: Made the FIR coefficient array that is used with the voice fixed + factor of 3 up and down sampling functions usable from within C files as + well as XC files. + * CHANGED: Aligned the FIR coefficient array to an 8-byte boundary. This + ensures that the voice fixed factor of 3 up and down sampling functions do + not crash with a LOAD_STORE exception. + * ADDED: Missing device attributes to the .xn file of the AN00231 app note. + * ADDED: Minimal cmake support. + +2.1.0 +----- + + * CHANGED: Use XMOS Public License Version 1 + +2.0.1 +----- + + * CHANGED: Pin Python package versions + * REMOVED: not necessary cpanfile + +2.0.0 +----- + + * CHANGED: Build files updated to support new "xcommon" behavior in xwaf. + +1.1.2 +----- + + * CHANGED: initialisation lists to avoid warnings when building + +1.1.1 +----- + + * RESOLVED: correct compensation factor for voice upsampling + * ADDED: test of voice unity gain + +1.1.0 +----- + + * ADDED: Fixed factor of 3 conversion functions for downsampling and + oversampling + * ADDED: Fixed factor of 3 downsampling function optimised for use with voice + (reduced memory and compute footprint) + * ADDED: Fixed factor of 3 upsampling function optimised for use with voice + (reduced memory and compute footprint) + +1.0.0 +----- + + * Initial version + + * Changes to dependencies: + + - lib_logging: Added dependency 2.0.1 + + - lib_xassert: Added dependency 2.0.1 + diff --git a/lib_src/CMakeLists.txt b/lib_src/CMakeLists.txt new file mode 100644 index 0000000..6acc102 --- /dev/null +++ b/lib_src/CMakeLists.txt @@ -0,0 +1,84 @@ +cmake_minimum_required(VERSION 3.21.0) + +project(lib_src LANGUAGES C ASM) + +if(PROJECT_IS_TOP_LEVEL) + include(FetchContent) + FetchContent_Declare( + fwk_core + GIT_REPOSITORY https://github.com/xmos/fwk_core.git + GIT_TAG v1.0.2 + ) + FetchContent_MakeAvailable(fwk_core) +endif() + +add_subdirectory(tests) + +# XS3 only libraries that use the Vector Processing Unit +if(${CMAKE_SYSTEM_PROCESSOR} STREQUAL XCORE_XS3A) + ## Source files + file(GLOB_RECURSE LIB_C_SOURCES_XS3 lib_src/src/fixed_factor_vpu_voice/*.c ) + file(GLOB_RECURSE LIB_XC_SOURCES_XS3 lib_src/src/fixed_factor_vpu_voice/*.xc) + file(GLOB_RECURSE LIB_ASM_SOURCES_XS3 lib_src/src/fixed_factor_vpu_voice/*.S ) + + set(ADDITIONAL_INCLUDE_DIRS_XS3 lib_src/src/fixed_factor_vpu_voice + ) +endif() + + +if((${CMAKE_SYSTEM_PROCESSOR} STREQUAL XCORE_XS3A) OR (${CMAKE_SYSTEM_PROCESSOR} STREQUAL XCORE_XS2A)) + ## Source files + file(GLOB_RECURSE LIB_C_SOURCES lib_src/src/fixed_factor_of_3/*.c + lib_src/src/fixed_factor_of_3_voice/*.c + lib_src/src/multirate_hifi/*.c + ) + file(GLOB LIB_C_SOURCES_FIFO lib_src/src/*.c + ) + file(GLOB_RECURSE LIB_XC_SOURCES lib_src/src/fixed_factor_of_3/*.xc + lib_src/src/fixed_factor_of_3_voice/*.xc + lib_src/src/multirate_hifi/*.xc + ) + file(GLOB_RECURSE LIB_ASM_SOURCES lib_src/src/fixed_factor_of_3/*.S + lib_src/src/fixed_factor_of_3_voice/*.S + lib_src/src/multirate_hifi/*.S + ) + + ## Create library target + add_library(lib_src STATIC EXCLUDE_FROM_ALL ${LIB_C_SOURCES} + ${LIB_C_SOURCES_FIFO} + ${LIB_C_SOURCES_XS3} + ${LIB_ASM_SOURCES} + ${LIB_XC_SOURCES_XS3} + ${LIB_XC_SOURCES} + ${LIB_ASM_SOURCES_XS3} + ) + + target_include_directories(lib_src + PUBLIC + lib_src/api + lib_src/src/fixed_factor_of_3 + lib_src/src/fixed_factor_of_3/ds3 + lib_src/src/fixed_factor_of_3/os3 + lib_src/src/fixed_factor_of_3_voice + lib_src/src/fixed_factor_of_3_voice/ds3_voice + lib_src/src/fixed_factor_of_3_voice/us3_voice + lib_src/src/multirate_hifi + lib_src/src/multirate_hifi/asrc + lib_src/src/multirate_hifi/ssrc + ${ADDITIONAL_INCLUDE_DIRS_XS3} + ) + + target_compile_options(lib_src + PRIVATE + -O3 + -g + ) + + target_link_libraries(lib_src + PUBLIC + # defined in fwk_core + framework_core_legacy_compat + ) + + +endif() diff --git a/lib_src/Jenkinsfile b/lib_src/Jenkinsfile new file mode 100644 index 0000000..491024f --- /dev/null +++ b/lib_src/Jenkinsfile @@ -0,0 +1,178 @@ +@Library('xmos_jenkins_shared_library@v0.25.0') + +def runningOn(machine) { + println "Stage running on:" + println machine +} + +// run pytest with common flags for project. any passed in though extra args will +// be appended +def localRunPytest(String extra_args="") { + catchError{ + sh "python -m pytest --junitxml=pytest_result.xml -rA -v --durations=0 -o junit_logging=all ${extra_args}" + } + junit "pytest_result.xml" +} + +getApproval() + +pipeline { + agent none + environment { + REPO = 'lib_src' + VIEW = getViewName(REPO) + PYTHON_VERSION = "3.10.5" + VENV_DIRNAME = ".venv" + XMOSDOC_VERSION = "v4.0" + } + options { + skipDefaultCheckout() + timestamps() + } + parameters { + string( + name: 'TOOLS_VERSION', + defaultValue: '15.2.1', + description: 'The XTC tools version' + ) + } + stages { + stage('Build and Test') { + when { + expression { !env.GH_LABEL_DOC_ONLY.toBoolean() } + } + agent { + label 'x86_64&&docker' // These agents have 24 cores so good for parallel xsim runs + } + stages { + stage('Get repo') { + steps { + sh "mkdir ${REPO}" + // source checks require the directory + // name to be the same as the repo name + dir("${REPO}") { + // checkout repo + checkout scm + sh 'git submodule update --init --recursive --depth 1' + } + } + } + stage ("Create Python environment") { + steps { + dir("${REPO}") { + createVenv('requirements.txt') + withVenv { + sh 'pip install -r requirements.txt' + } + } + } + } + stage('Library checks') { + steps { + dir("${REPO}") { + sh 'git clone git@github.com:xmos/infr_apps.git' + sh 'git clone git@github.com:xmos/infr_scripts_py.git' + // These are needed for xmake legacy build and also changelog check + sh 'git clone git@github.com:xmos/lib_logging.git' + sh 'git clone git@github.com:xmos/lib_xassert.git' + withVenv { + sh 'pip install -e infr_scripts_py' + sh 'pip install -e infr_apps' + dir("tests") { + withEnv(["XMOS_ROOT=.."]) { + localRunPytest('-s test_lib_checks.py -vv') + } + } + } + } + } + } + stage('Test xmake build') { + steps { + runningOn(env.NODE_NAME) + dir("${REPO}") { + withTools(params.TOOLS_VERSION) { + withVenv { + dir("tests") { + localRunPytest('-k "legacy" -vv') + } + } + } + } + } + } + stage('Run doc python') { + steps { + runningOn(env.NODE_NAME) + dir("${REPO}") { + withTools(params.TOOLS_VERSION) { + withVenv { + sh "sh doc/build_docs_ci.sh $XMOSDOC_VERSION" + archiveArtifacts artifacts: "doc_build.zip", allowEmptyArchive: true + } + } + } + } + } + stage('Tests XS2') { + steps { + runningOn(env.NODE_NAME) + dir("${REPO}") { + withTools(params.TOOLS_VERSION) { + withVenv { + sh 'mkdir -p build' + dir("build") { + sh 'rm CMakeCache.txt' + sh 'cmake --toolchain ../xmos_cmake_toolchain/xs2a.cmake ..' + sh 'make test_ds3_voice test_us3_voice test_unity_gain_voice -j' + } + dir("tests") { + localRunPytest('-n auto -k "xs2" -vv') + } + dir("build") { + sh 'rm CMakeCache.txt' // Cleanup XS2 cmake cache for next stage + } + } + } + } + } + } + stage('Tests XS3') { + steps { + runningOn(env.NODE_NAME) + dir("${REPO}") { + withTools(params.TOOLS_VERSION) { + withVenv { + dir("tests") { + localRunPytest('-m prepare') // Do all pre work like building and generating golden ref where needed + + // FF3 HiFi tests for OS3 and DS3 + localRunPytest('-m main -n auto -k "hifi_ff3" -vv') + + // ASRC and SSRC tests across all in/out freqs and deviations (asrc only) + localRunPytest('-m main -n auto -k "mrhf" -vv') + archiveArtifacts artifacts: "mips_report*.csv", allowEmptyArchive: true + + // VPU enabled ff3 and rat tests + localRunPytest('-m main -k "vpu" -vv') // xdist not working yet so no -n auto + + // Profile the ASRC + localRunPytest('-m main -k "profile_asrc" -vv') + sh 'tree' + archiveArtifacts artifacts: "gprof_results/*.png", allowEmptyArchive: true + } + } + } + } + } + } + } + post { + cleanup { + xcoreCleanSandbox() + } + } + } + + } +} diff --git a/lib_src/LICENSE.rst b/lib_src/LICENSE.rst new file mode 100644 index 0000000..ca48f20 --- /dev/null +++ b/lib_src/LICENSE.rst @@ -0,0 +1,84 @@ +******************************* +XMOS PUBLIC LICENCE: Version 1 +******************************* + +Subject to the conditions and limitations below, permission is hereby granted by XMOS LIMITED (“XMOS”), free of charge, to any person or entity obtaining a copy of the XMOS Software. + +**1. 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IN SOME JURISDICTIONS PARTIES ARE UNABLE TO LIMIT LIABILTY IN THIS WAY, IF THIS APPLIES TO YOUR JURISDICTION THIS LIABILITY CLAUSE ABOVE MAY NOT APPLY. NOTWITHSTANDING THE ABOVE, IN NO EVENT SHALL XMOS’s TOTAL LIABILITY TO YOU FOR ALL DAMAGES, LOSS OR OTHERWISE EXCEED $50. + +**11. Governing Law and Jurisdiction.** This Licence constitutes the entire agreement between the parties with respect to the subject matter hereof. The Licence shall be governed by the laws of England and the conflict of laws and UN Convention on Contracts for the International Sale of Goods, shall not apply. diff --git a/lib_src/README.rst b/lib_src/README.rst new file mode 100644 index 0000000..09ed325 --- /dev/null +++ b/lib_src/README.rst @@ -0,0 +1,76 @@ +Sample Rate Conversion Library +============================== + +Overview +-------- + +The XMOS Sample Rate Conversion (SRC) library provides both synchronous and asynchronous audio sample rate conversion functions for use on xCORE multicore micro-controllers. + +In systems where the rate change is exactly equal to the ratio of nominal rates, synchronous sample rate conversion (SSRC) provides efficient and high performance rate conversion. Where the input and output rates are not locked by a common clock or clocked by an exact rational frequency ratio, the Asynchronous Sample Rate Converter (ASRC) provides a way of streaming high quality audio between the two different clock domains, at the cost of higher processing resource usage. ASRC can ease interfacing in cases where there are multiple digital audio inputs or allow cost saving by removing the need for physical clock recovery using a PLL. + +Features +........ + +Multi-rate Hi-Fi functionality: + + * Conversion between 44.1, 48, 88.2, 96, 176.4 and 192 KHz input and output sample rates. + * 32 bit PCM input and output data in Q1.31 signed format. + * Optional output dithering to 24 bit using Triangular Probability Density Function (TPDF). + * Optimized for xCORE-200 instruction set with dual-issue and compatible with XCORE-AI. + * Block based processing - Minimum 4 samples input per call, must be power of 2. + * Up to 10000 ppm sample rate ratio deviation from nominal rate (ASRC only). + * Very high quality - SNR greater than 135 dB (ASRC) or 140 dB (SSRC), with THD of less than 0.0001% (reference 1KHz). + * Configurable number of audio channels per SRC instance. + * Reentrant library permitting multiple instances with differing configurations and channel count. + * No external components (PLL or memory) required. + +Fixed factor functionality: + + * Synchronous fixed factor of 3 downsample and oversample functions supporting either HiFi quality or reduced resource requirements for voice applications. + * Synchronous fixed factor of 3 and 3/2 downsample and oversample functions for voice applications optimized for the XS3 Vector Processing Unit. + +Building +........ + +The library can be built under `cmake` or `xcommon` via `xmake` offering backwards compatibility for legacy applications. +It is recommended to use `cmake` where the library name `lib_src` is included in the cmake files. See `Related application notes`_ for example usage. +The library has no dependencies when building under `cmake` although does require `lib_logging` and `lib_xassert` when using `xcommon`. + +Components +.......... + + * Synchronous Sample Rate Converter function (ssrc) + * Asynchronous Sample Rate Converter function (asrc) + + * Synchronous factor of 3 downsample function (ds3) + * Synchronous factor of 3 oversample function (os3) + + * Synchronous factor of 3 downsample function optimized for use with voice (src_ds3_voice) + * Synchronous factor of 3 oversample function optimised for use with voice (src_us3_voice) + + * Synchronous factor of 3 downsample function for use with voice optimized for XS3 (ff3_96t_ds) + * Synchronous factor of 3 oversample function for use with voice optimized for XS3 (ff3_96t_us) + + * Synchronous factor of 3/2 downsample function for use with voice optimized for XS3 (rat_2_3_96t_ds) + * Synchronous factor of 3/2 oversample function for use with voice optimized for XS3 (rat_3_2_96t_us) + +There are three different component options that support fixed factor of 3 up/downsampling. To help choose which one to use follow these steps: + + #. If HiFi quality (130 dB SNR) up/downsampling is required, use ds3 or os3. + #. If voice quality (65 dB SNR) is required running on xCORE-200, use ds3_voice or us3_voice. + #. If voice quality (75 dB SNR) is required running xcore-ai, use ff3_96t_ds or ff3_96t_us. + +.. warning:: + Synchronous fixed factor of 3 and 3/2 downsample and oversample functions for voice applications optimized for the XS3 Vector Processing Unit + currently overflow rather than saturate in cases where a full scale input causes a perturbation above full scale at the output. + To avoid this scenario, please ensure that the input amplitude is always 3.5 dB below full scale. + The overflow behavior of these SRC components will be replaced by saturating behavior (to match all other SRC components) in a future release. + + +Related Application Notes +......................... + +An adaptive USB Audio ASRC example can be found in https://github.com/xmos/sln_voice/tree/develop/examples. + +Simple file-based test applications may be found in this repo under `tests/xxxx_test` where xxxx is either `asrc`, `ssrc`, `ds3`, `os3`, `ds3_voice`, `os3_voice`, `vpu_ff3` or `vpu_rat`. +These test applications may be used as basic examples to show how these components are used in a minimal application. \ No newline at end of file diff --git a/lib_src/index.rst b/lib_src/index.rst new file mode 100644 index 0000000..6d3b4a8 --- /dev/null +++ b/lib_src/index.rst @@ -0,0 +1,10 @@ +###################### +SAMPLE RATE CONVERSION +###################### + + +.. toctree:: + :maxdepth: 5 + + ./doc/programming_guide/index.rst + ./doc/python/_build/rst/allPlots.rst diff --git a/lib_src/lib_src/.cproject b/lib_src/lib_src/.cproject new file mode 100644 index 0000000..28fda5d --- /dev/null +++ b/lib_src/lib_src/.cproject @@ -0,0 +1,74 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib_src/lib_src/.project b/lib_src/lib_src/.project new file mode 100644 index 0000000..293603f --- /dev/null +++ b/lib_src/lib_src/.project @@ -0,0 +1,42 @@ + + + lib_src + + + + + + com.xmos.cdt.core.LegacyProjectCheckerBuilder + + + + + com.xmos.cdt.core.ProjectInfoSyncBuilder + + + + + com.xmos.cdt.core.ModulePathBuilder + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.xmos.cdt.core.XdeProjectNature + + diff --git a/lib_src/lib_src/LICENSE.rst b/lib_src/lib_src/LICENSE.rst new file mode 100644 index 0000000..ca48f20 --- /dev/null +++ b/lib_src/lib_src/LICENSE.rst @@ -0,0 +1,84 @@ +******************************* +XMOS PUBLIC LICENCE: Version 1 +******************************* + +Subject to the conditions and limitations below, permission is hereby granted by XMOS LIMITED (“XMOS”), free of charge, to any person or entity obtaining a copy of the XMOS Software. + +**1. Definitions** + +**“Applicable Patent Rights”** means: (a) where XMOS is the grantor of the rights, (i) claims of patents that are now or in future owned by or assigned to XMOS and (ii) that cover subject matter contained in the Software, but only to the extent it is necessary to use, reproduce or distribute the Software without infringement; and (b) where you are the grantor of the rights, (i) claims of patents that are now or in future owned by or assigned to you and (ii) that cover the subject matter contained in your Derivatives, taken alone or in combination with the Software. + +**“Compiled Code”** means any compiled, binary, machine readable or executable version of the Source Code. + +**“Contributor”** means any person or entity that creates or contributes to the creation of Derivatives. + +**“Derivatives”** means any addition to, deletion from and/or change to the substance, structure of the Software, any previous Derivatives, the combination of the Derivatives and the Software and/or any respective portions thereof. + +**“Source Code”** means the human readable code that is suitable for making modifications but excluding any Compiled Code. + +**“Software”** means the software and associated documentation files which XMOS makes available and which contain a notice identifying the software as original XMOS software and referring to the software being subject to the terms of this XMOS Public Licence. + +This Licence refers to XMOS Software and does not relate to any XMOS hardware or devices which are protected by intellectual property rights (including patent and trade marks) which may be sold to you under a separate agreement. + + +**2. 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The Licence shall be governed by the laws of England and the conflict of laws and UN Convention on Contracts for the International Sale of Goods, shall not apply. diff --git a/lib_src/lib_src/api/asrc_timestamp_interpolation.h b/lib_src/lib_src/api/asrc_timestamp_interpolation.h new file mode 100644 index 0000000..d158d53 --- /dev/null +++ b/lib_src/lib_src/api/asrc_timestamp_interpolation.h @@ -0,0 +1,41 @@ +// Copyright 2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#ifndef _asrc_timestamp_interpolation_h_ +#define _asrc_timestamp_interpolation_h_ + +#include "src.h" + +#ifdef __XC__ +#define UNSAFE unsafe +#else +#define UNSAFE +#endif + + +/** + * \addtogroup src_fifo_interp src_fifo_interp + * + * The public API for using Asynchronous FIFO. + * @{ + */ + +/** + * Function that interpolates a timestamp for a sample generated by the ASRC. + * Given a measured timestamp for the sample going into the ASRC, the asrc control + * structure, and the expected output frequency, this function returns a timestamp + * for when the last sample was produced by the ASRC. + * + * @param timestamp Value of the reference clock taken when the last sample + * fed into the ASRC was sampled. + * + * @param asrc_ctrl ASRC control block + * + * @param ideal_freq Expected base frequency to which the ASRC is operating; + * eg, 48000 or 44100 + */ +int asrc_timestamp_interpolation(int timestamp, asrc_ctrl_t * UNSAFE asrc_ctrl, int ideal_freq); + +/**@}*/ // END: addtogroup src_fifo_interp + +#endif diff --git a/lib_src/lib_src/api/asynchronous_fifo.h b/lib_src/lib_src/api/asynchronous_fifo.h new file mode 100644 index 0000000..19491a4 --- /dev/null +++ b/lib_src/lib_src/api/asynchronous_fifo.h @@ -0,0 +1,224 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#ifndef _asynchronous_fifo_h__ +#define _asynchronous_fifo_h__ + +#include +#include + +#define FREQUENCY_RATIO_EXPONENT (32) + +#ifdef __XC__ +#define UNSAFE unsafe +#else +#define UNSAFE +#endif + +/** + * \addtogroup src_fifo src_fifo + * + * The public API for using Asynchronous FIFO. + * @{ + */ + + +/** + * Data structure that holds the status of an asynchronous FIFO + */ +typedef struct asynchronous_fifo_t { + // Updated on initialisation only + int32_t channel_count; /* Number of audio channels */ + int32_t copy_mask; /* Number of audio channels */ + int32_t max_fifo_depth; /* Length of buffer[] in channel_counts */ + int32_t ideal_phase_error_ticks; /* Ideal ticks between samples */ + int32_t Ki; /* Ki PID coefficient */ + int32_t Kp; /* Kp PID coefficient */ + + // Updated on the producer side only + int skip_ctr; /* Set to indicate initialisation runs */ + int32_t write_ptr; /* Write index in the buffer */ + int64_t last_phase_error; /* previous error, used for proportional */ + int64_t frequency_ratio; /* Current ratio of frequencies in 64.64 */ + int32_t stop_producing; /* In case of overflow, stops producer until consumer restarts and requests a reset */ + + // Updated on the consumer side only + uint32_t read_ptr; /* Read index in the buffer */ + + // Set by producer, reset by consumer + uint32_t reset; /* Set to 1 if consumer wants a reset */ + + // Updated from both sides + uint32_t * UNSAFE timestamps; /* Timestamps of samples */ + int32_t buffer[0]; /* Buffer of data */ +} asynchronous_fifo_t; + + +/** + * Function that must be called to initialise the asynchronous FIFO. + * The ``state`` argument should be an int64_t array of + * ``ASYNCHRONOUS_FIFO_INT64_ELEMENTS`` elements that is cast to + * ``asynchronous_fifo_t*``. + * + * That pointer should also be used for all other operations, including operations + * both the consumer and producer sides. + * + * After initialising, you must initialise the PID by calling one of + * asynchronous_fifo_init_PID_fs_codes() or + * asynchronous_fifo_init_PID_raw() + * + * @param state Asynchronous FIFO to be initialised + * + * @param channel_count Number of audio channels + * + * @param max_fifo_depth Length of the FIFO, delay when stable will be max_fifo_depth/2 + */ +void asynchronous_fifo_init(asynchronous_fifo_t * UNSAFE state, + int channel_count, + int max_fifo_depth); + +/** + * Function that that initialises the PID of a FIFO. Either this function + * or asynchronous_fifo_init_PID_raw() should be called. This function + * uses frequency codes as defined in the ASRC for a quick default setup, + * the raw function allows full control + * + * @param state Asynchronous FIFO to be initialised + * + * @param fs_input Input FS ratio, used to pick appropriate Kp, and Ki. + * Must be a number less than 6. + * + * @param fs_output Input FS ratio, used to pick appropriate Kp, Ki, + * ideal phase. Must be a number less than 6. + */ +void asynchronous_fifo_init_PID_fs_codes(asynchronous_fifo_t * UNSAFE state, + int fs_input, + int fs_output); + +/** + * Function that that initialises the PID of a FIFO. Either this function + * or asynchronous_fifo_init_PID_raw() should be called. This function + * uses frequency codes as defined in the ASRC for a quick default setup, + * the raw function allows full control. + * + * This function may be called at any time by the producer in order to alter the PID + * and midpoint settings. It does not reset the error; one of the + * asynchronous_fifo_init_reset_producer() or + * asynchronous_fifo_init_reset_consumer() functions should be called for that. + * + * @param state Asynchronous FIFO to be initialised + * + * @param Kp Proportional constant for the FIFO. + * This gets multiplied by the differential + * error measured in ticks (typically -2..2) + * and added to the ratio_error. A typical + * value is 30,000,000 - 60,000,000. + * + * @param Ki Integral constant for the FIFO. + * This gets multiplied by the phase error + * measured in ticks (typically -20,000 - 20,000) + * and added to the ratio_error. + * A typical value is 200 - 300. + * + * @param ticks_between_samples The number of ticks between samples is used to + * estimate the expected phase error halfway down + * the FIFO. + */ +void asynchronous_fifo_init_PID_raw(asynchronous_fifo_t * UNSAFE state, + int Kp, + int Ki, + int ticks_between_samples); + +/** + * Function that that resets the FIFO from the producer side. Either this function should + * be called on the producing side, or ``asynchronous_fifo_reset_consumer`` + * should be called on the consumer side. In both cases the whole FIFO will be reset back + * + * @param state Asynchronous FIFO to be initialised + */ +void asynchronous_fifo_reset_producer(asynchronous_fifo_t * UNSAFE state); + +/** + * Function that that resets the FIFO from the consumer side. Either this function should + * be called on the consuming side, or asynchronous_fifo_reset_producer() + * should be called on the producer side. In both cases the whole FIFO will be reset back + * + * @param state Asynchronous FIFO to be initialised + */ +void asynchronous_fifo_reset_consumer(asynchronous_fifo_t * UNSAFE state); + +/** + * Function that must be called to deinitalise the asynchronous FIFO + * + * @param state ASRC structure to be de-initialised + */ +void asynchronous_fifo_exit(asynchronous_fifo_t * UNSAFE state); + +/** + * Function that provides the next samples to the asynchronous FIFO. + * + * This function and asynchronous_fifo_consumer_get() function both need a timestamp, + * which is the time that the last sample was input (this function) or + * output (asynchronous_fifo_consumer_get()). The asynchronous FIFO will hand the + * samples across from producer to consumer through an elastic queue, and run + * a PID algorithm to calculate the best way to equalise the input clock relative + * to the output clock. Therefore, the timestamps + * have to be measured on either the same clock or two very similar clocks. + * It is probably fine to use the reference clocks on two tiles, provided + * the tiles came out of reset at more or less the same time. Using the + * clocks from two different chips would require the two chips to share an + * oscillator, and for them to come out of reset simultaneously. + * + * @param state ASRC structure to push the sample into + * + * @param samples The sample values. + * + * @param n The number of samples + * + * @param timestamp The number of ticks when this sample was input. + * + * @param xscope_used Set to 1 if the PID values should be output over + * xscope. Used for debugging. This parameter is subject to be removed in future revisions. + * + * @returns The current estimate of the mismatch of input and output frequencies. + * This is represented as a 32-bit signed number. Zero means no mismatch, + * a value less than zero means that the producer is faster than the consumer, + * a value greater than zero means that the producer is slower than the consumer. + * The value should be scaled by 2**-32. That is, the current best + * approximation for consumer_speed/producer_speed is 1 + (return_value * 2**-32) + * + * The output is filtered and should be applied directly as a correction factor + * eg, multiplied into an ASRC ratio, or multiplied into a PLL timing. + */ +int32_t asynchronous_fifo_producer_put(asynchronous_fifo_t * UNSAFE state, + int32_t * UNSAFE samples, + int n, + int32_t timestamp, + int xscope_used); + + +/** + * Function that gets an output sample from the asynchronous FIFO + * + * @param state ASRC structure to read a sample out off. + * + * @param samples The array where the frame with output + * samples will be stored. + * + * @param timestamp A timestamp taken at the time that the + * last sample was output. See + * ``asynchronous_fifo_produce`` for requirements. + */ +void asynchronous_fifo_consumer_get(asynchronous_fifo_t * UNSAFE state, + int32_t * UNSAFE samples, + int32_t timestamp); + + +/** + * macro that calculates the number of int64_t to be allocated for the fifo + * for a FIFO of N elements and C channels + */ +#define ASYNCHRONOUS_FIFO_INT64_ELEMENTS(N, C) (sizeof(asynchronous_fifo_t)/sizeof(int64_t) + (N*(C+1))/2+1) +#endif + +/**@}*/ // END: addtogroup src_fifo diff --git a/lib_src/lib_src/api/src.h b/lib_src/lib_src/api/src.h new file mode 100644 index 0000000..57a7d39 --- /dev/null +++ b/lib_src/lib_src/api/src.h @@ -0,0 +1,243 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_H_ +#define _SRC_H_ +#include "src_mrhf_ssrc.h" +#include "src_mrhf_asrc.h" +#include "src_ff3_ds3.h" +#include "src_ff3_os3.h" +#include "src_ff3v_fir.h" +#if (defined(__XS3A__)) // Only available for XS3 with VPU +#include "src_poly.h" +#endif // __XS3A__ +#include + +#if defined(__cplusplus) || defined(__XC__) +extern "C" { +#endif + +/** List of sample rate codes allowing the core SRC algorithms to use an index value */ +typedef enum fs_code_t { + FS_CODE_44 = 0, + FS_CODE_48 = 1, + FS_CODE_88 = 2, + FS_CODE_96 = 3, + FS_CODE_176 = 4, + FS_CODE_192 = 5 +} fs_code_t; + +/** Flag to switch dither processing to 24b (from 32b) on or off */ +typedef enum dither_flag_t { + OFF = 0, + ON = 1 +} dither_flag_t; + +/** + * \addtogroup src_ssrc src_ssrc + * + * The public API for using SSRC. + * @{ + */ + +/** initializes synchronous sample rate conversion instance. + * \param sr_in Nominal sample rate code of input stream + * \param sr_out Nominal sample rate code of output stream + * \param ssrc_ctrl Reference to array of SSRC control stuctures + * \param n_channels_per_instance Number of channels handled by this instance of SSRC + * \param n_in_samples Number of input samples per SSRC call + * \param dither_on_off Dither to 24b on/off + */ +void ssrc_init(const fs_code_t sr_in, const fs_code_t sr_out, ssrc_ctrl_t ssrc_ctrl[], + const unsigned n_channels_per_instance, const unsigned n_in_samples, + const dither_flag_t dither_on_off); + +/** Perform synchronous sample rate conversion processing on block of input samples using previously initialized settings. + * + * \param in_buff Reference to input sample buffer array + * \param out_buff Reference to output sample buffer array + * \param ssrc_ctrl Reference to array of SSRC control stuctures + * \returns The number of output samples produced by the SRC operation + */ +unsigned ssrc_process(int in_buff[], int out_buff[], ssrc_ctrl_t ssrc_ctrl[]); + +/**@}*/ // END: addtogroup src_ssrc + +/** + * \addtogroup src_asrc src_asrc + * + * The public API for using ASRC. + * @{ + */ + +/** initializes asynchronous sample rate conversion instance. + * + * \param sr_in Nominal sample rate code of input stream + * \param sr_out Nominal sample rate code of output stream + * \param asrc_ctrl Reference to array of ASRC control structures + * \param n_channels_per_instance Number of channels handled by this instance of SSRC + * \param n_in_samples Number of input samples per SSRC call + * \param dither_on_off Dither to 24b on/off + * \returns The nominal sample rate ratio of in to out in Q4.60 format + */ +uint64_t asrc_init(const fs_code_t sr_in, const fs_code_t sr_out, + asrc_ctrl_t asrc_ctrl[], const unsigned n_channels_per_instance, + const unsigned n_in_samples, const dither_flag_t dither_on_off); + +/** Perform asynchronous sample rate conversion processing on block of input samples using previously initialized settings. + * + * \param in_buff Reference to input sample buffer array + * \param out_buff Reference to output sample buffer array + * \param fs_ratio Fixed point ratio of in/out sample rates in Q4.60 format + * \param asrc_ctrl Reference to array of ASRC control structures + * \returns The number of output samples produced by the SRC operation. + */ +unsigned asrc_process(int in_buff[], int out_buff[], uint64_t fs_ratio, + asrc_ctrl_t asrc_ctrl[]); + +/**@}*/ // END: addtogroup src_asrc + + +// To avoid C type definitions when including this file from assembler +#ifndef INCLUDE_FROM_ASM + +/** Fixed factor of 3 return codes + * + * This type describes the possible error status states from calls to the DS3 + * and OS3 API. + */ +typedef enum src_ff3_return_code_t +{ + SRC_FF3_NO_ERROR = 0, + SRC_FF3_ERROR = 1 +} src_ff3_return_code_t; + +/** Downsample by 3 control structure */ +typedef struct src_ds3_ctrl_t +{ + int* in_data; //!< Pointer to input data (3 samples) + int* out_data; //!< Pointer to output data (1 sample) + int* delay_base; //!< Pointer to delay line base + unsigned int delay_len; //!< Total length of delay line + int* delay_pos; //!< Pointer to current position in delay line + int* delay_wrap; //!< Delay buffer wrap around address (for circular buffer simulation) + unsigned int delay_offset; //!< Delay line offset for second write (for circular buffer simulation) + unsigned int inner_loops; //!< Number of inner loop iterations + unsigned int num_coeffs; //!< Number of coefficients + int* coeffs; //!< Pointer to coefficients +} src_ds3_ctrl_t; + +/** This function initializes the decimate by 3 function for a given instance + * + * \param src_ds3_ctrl DS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_ds3_init(src_ds3_ctrl_t* src_ds3_ctrl); + +/** This function clears the decimate by 3 delay line for a given instance + * + * \param src_ds3_ctrl DS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_ds3_sync(src_ds3_ctrl_t* src_ds3_ctrl); + +/** This function performs the decimation on three input samples and outputs one sample. + * The input and output buffers are pointed to by members of the src_ds3_ctrl structure + * + * \param src_ds3_ctrl DS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_ds3_proc(src_ds3_ctrl_t* src_ds3_ctrl); + +/** Oversample by 3 control structure */ +typedef struct src_os3_ctrl_t +{ + int in_data; //!< Input data (to be updated every 3 output samples, i.e. when iPhase == 0) + int out_data; //!< Output data (1 sample) + int phase; //!< Current output phase (when reaching '0', a new input sample is required) + int* delay_base; //!< Pointer to delay line base + unsigned int delay_len; //!< Total length of delay line + int* delay_pos; //!< Pointer to current position in delay line + int* delay_wrap; //!< Delay buffer wrap around address (for circular buffer simulation) + unsigned int delay_offset; //!< Delay line offset for second write (for circular buffer simulation) + unsigned int inner_loops; //!< Number of inner loop iterations + unsigned int num_coeffs; //!< Number of coefficients + int* coeffs; //!< Pointer to coefficients +} src_os3_ctrl_t; + +/** This function initializes the oversample by 3 function for a given instance + * + * \param src_os3_ctrl OS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_os3_init(src_os3_ctrl_t* src_os3_ctrl); + +/** This function clears the oversample by 3 delay line for a given instance + * + * \param src_os3_ctrl OS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_os3_sync(src_os3_ctrl_t* src_os3_ctrl); + +/** This function pushes a single input sample into the filter. + * It should be called three times for each FIROS3_proc call + * + * \param src_os3_ctrl OS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_os3_input(src_os3_ctrl_t* src_os3_ctrl); + +/** This function performs the oversampling by 3 and outputs one sample. + * The input and output buffers are pointed to by members of the src_os3_ctrl structure + * + * \param src_os3_ctrl OS3 control structure + * \returns SRC_FF3_NO_ERROR on success, SRC_FF3_ERROR on failure + */ +src_ff3_return_code_t src_os3_proc(src_os3_ctrl_t* src_os3_ctrl); + +#endif // INCLUDE_FROM_ASM + +#if defined(__cplusplus) || defined(__XC__) +} +#endif + +/** This function performs the first two iterations of the downsampling process + * + * \param sum Partially accumulated value returned during previous cycle + * \param data Data delay line + * \param coefs FIR filter coefficients + * \param sample The newest sample + * \returns Partially accumulated value, passed as ``sum`` parameter next cycle + */ +int64_t src_ds3_voice_add_sample(int64_t sum, int32_t data[], + const int32_t coefs[], int32_t sample); + +/** This function performs the final iteration of the downsampling process + * + * \param sum Partially accumulated value returned during previous cycle + * \param data Data delay line + * \param coefs FIR filter coefficients + * \param sample The newest sample + * \returns The decimated sample + */ +int64_t src_ds3_voice_add_final_sample(int64_t sum, int32_t data[], + const int32_t coefs[], int32_t sample); + +/** This function performs the initial iteration of the upsampling process + * + * \param data Data delay line + * \param coefs FIR filter coefficients + * \param sample The newest sample + * \returns A decimated sample + */ +int32_t src_us3_voice_input_sample(int32_t data[], const int32_t coefs[], + int32_t sample); + +/** This function performs the final two iterations of the upsampling process + * + * \param data Data delay line + * \param coefs FIR filter coefficients + * \returns A decimated sample + */ +int32_t src_us3_voice_get_next_sample(int32_t data[], const int32_t coefs[]); + +#endif // _SRC_H_ diff --git a/lib_src/lib_src/lib_build_info.cmake b/lib_src/lib_src/lib_build_info.cmake new file mode 100644 index 0000000..c5ca248 --- /dev/null +++ b/lib_src/lib_src/lib_build_info.cmake @@ -0,0 +1,21 @@ +set(LIB_NAME lib_src) +set(LIB_VERSION 2.5.0) + +set(LIB_DEPENDENT_MODULES "lib_logging(3.2.0)") + +set(LIB_COMPILER_FLAGS -Wno-missing-braces -O3) + +set(LIB_OPTIONAL_HEADERS src_conf.h) + +set(LIB_INCLUDES api + src/fixed_factor_of_3 + src/fixed_factor_of_3/ds3 + src/fixed_factor_of_3/os3 + src/fixed_factor_of_3_voice + src/multirate_hifi + src/multirate_hifi/asrc + src/multirate_hifi/ssrc + src/fixed_factor_vpu_voice) + +XMOS_REGISTER_MODULE() + diff --git a/lib_src/lib_src/module_build_info b/lib_src/lib_src/module_build_info new file mode 100644 index 0000000..c38608c --- /dev/null +++ b/lib_src/lib_src/module_build_info @@ -0,0 +1,23 @@ +VERSION = 2.5.0 + +DEPENDENT_MODULES = lib_logging(>=3.2.0) + +MODULE_XCC_FLAGS = $(XCC_FLAGS) \ + -Wno-missing-braces \ + -O3 + +OPTIONAL_HEADERS += src_conf.h + +EXPORT_INCLUDE_DIRS = api \ + src/fixed_factor_of_3 \ + src/fixed_factor_of_3/ds3 \ + src/fixed_factor_of_3/os3 \ + src/fixed_factor_of_3_voice \ + src/multirate_hifi \ + src/multirate_hifi/asrc \ + src/multirate_hifi/ssrc \ + src/fixed_factor_vpu_voice \ + src/asrc_task + +INCLUDE_DIRS = $(EXPORT_INCLUDE_DIRS) + diff --git a/lib_src/lib_src/src/asrc_timestamp_interpolation.c b/lib_src/lib_src/src/asrc_timestamp_interpolation.c new file mode 100644 index 0000000..23b2edd --- /dev/null +++ b/lib_src/lib_src/src/asrc_timestamp_interpolation.c @@ -0,0 +1,18 @@ +// Copyright 2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#include +#include "asrc_timestamp_interpolation.h" + +// TODO: replace TODO with BASE and 8/24 with division with MAX + +// TODO: check with 88200 and other input frequencies + +int asrc_timestamp_interpolation(int timestamp, asrc_ctrl_t *asrc_ctrl, int interpolation_ticks) { + // iTimeInt is an 8-bit number; fract a 32 bit number, with the two we make a 16-bit + // fraction that we multiply with and then shift down by 16 bits. + uint32_t fraction_away_from_final_ts = (((asrc_ctrl->iTimeInt - 128) << 8) | + ((asrc_ctrl->uiTimeFract >> 24) & 0xff)); + int32_t left_over_ticks = (fraction_away_from_final_ts * interpolation_ticks) >> 16; + return timestamp + left_over_ticks; +} diff --git a/lib_src/lib_src/src/asynchronous_fifo.c b/lib_src/lib_src/src/asynchronous_fifo.c new file mode 100644 index 0000000..a50e0d1 --- /dev/null +++ b/lib_src/lib_src/src/asynchronous_fifo.c @@ -0,0 +1,217 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#include +#include "asynchronous_fifo.h" + +#include +#include +#include +#include +#include +#include +#include +#include +#include "src.h" + + +// TODO: Make fifo offset from N/2 a very small component in PID, + +/** + * Function that resets the producing side of the ASRC; called on initialisation, and + * and called during reset by the producer after the consumer is known to have thrown + * in the towel + */ +static void asynchronous_fifo_init_producing_side(asynchronous_fifo_t *state) { + state->skip_ctr = state->max_fifo_depth / 2 + 2; + state->write_ptr = (state->read_ptr + state->max_fifo_depth/2) % state->max_fifo_depth; + state->last_phase_error = 0; + state->frequency_ratio = 0; // Assume perfect match + state->stop_producing = 0; +} + +/** + * Function that resets the consuming side of the ASRC; called on initialisation, and + * and called during reset by the consumer before it notifies the producer that a reset + * is needed. + */ +static void asynchronous_fifo_reset_consumer_flags(asynchronous_fifo_t *state) { + state->reset = 0; // This has to be the last one +} + +#define K_SHIFT 16 + +static int ticks_between_samples_1D[6] = { + 2268,2083,1134,1042, 567, 521 +}; + +static int Ki_2D[6][6] = { + { 422, 422, 422, 422, 422, 422 }, + { 422, 422, 422, 422, 422, 422 }, + { 211, 211, 211, 211, 211, 211 }, + { 211, 211, 211, 211, 211, 211 }, + { 105, 105, 105, 105, 105, 105 }, + { 105, 105, 105, 105, 105, 105 } +}; + +static int Kp_2D[6][6] = { + { 28147498, 28147498, 56294996, 56294996, 112589992, 112589992 }, + { 28147498, 28147498, 56294996, 56294996, 112589992, 112589992 }, + { 14073749, 14073749, 28147498, 28147498, 56294996, 56294996 }, + { 14073749, 14073749, 28147498, 28147498, 56294996, 56294996 }, + { 7036874, 7036874, 14073749, 14073749, 28147498, 28147498 }, + { 7036874, 7036874, 14073749, 14073749, 28147498, 28147498 } +}; + +void asynchronous_fifo_init_PID_fs_codes(asynchronous_fifo_t *state, + int fs_input, int fs_output) { + int max_fifo_depth = state->max_fifo_depth; + state->Kp = Kp_2D[fs_input][fs_output]; + state->Ki = Ki_2D[fs_input][fs_output]; + state->ideal_phase_error_ticks = ticks_between_samples_1D[fs_output] * (max_fifo_depth/2 + 1); +} + +void asynchronous_fifo_init_PID_raw(asynchronous_fifo_t *state, + int Kp, int Ki, int ticks_between_samples) { + int max_fifo_depth = state->max_fifo_depth; + state->Kp = Kp; + state->Ki = Ki; + state->ideal_phase_error_ticks = ticks_between_samples * (max_fifo_depth/2 + 1); +} + +void asynchronous_fifo_init(asynchronous_fifo_t *state, int channel_count, + int max_fifo_depth) { + state->max_fifo_depth = max_fifo_depth; + state->timestamps = (uint32_t *)state->buffer + max_fifo_depth * channel_count; + state->channel_count = channel_count; + state->copy_mask = (1 << (4*channel_count)) - 1; + + // First initialise shared variables, or those that shouldn't reset on a RESET. + state->read_ptr = 0; + // Now clear the buffer. + memset(state->buffer, 0, channel_count * max_fifo_depth * sizeof(int)); + // Finally initialise those parts that are reset on a RESET + asynchronous_fifo_init_producing_side(state); // uses read_ptr + asynchronous_fifo_reset_consumer_flags(state); +} + +void asynchronous_fifo_exit(asynchronous_fifo_t *state) { +} + +int async_resets = 0; + +void asynchronous_fifo_reset_producer(asynchronous_fifo_t *state) { + state->stop_producing = 1; +} + +void asynchronous_fifo_reset_consumer(asynchronous_fifo_t *state) { + state->reset = 1; +} + +int32_t asynchronous_fifo_producer_put(asynchronous_fifo_t *state, int32_t *samples, + int n, + int32_t timestamp, + int xscope_used) { + int read_ptr = state->read_ptr; + int write_ptr = state->write_ptr; + int max_fifo_depth = state->max_fifo_depth; + int channel_count = state->channel_count; + int copy_mask = state->copy_mask; + int len = (write_ptr - read_ptr + max_fifo_depth) % max_fifo_depth; + if (state->reset) { + async_resets++; + asynchronous_fifo_init_producing_side(state); // uses read_ptr + asynchronous_fifo_reset_consumer_flags(state); // Last step - clears reset + } else if (len >= max_fifo_depth - 2 - n) { + state->stop_producing = 1; + } else if (!state->stop_producing && n) { + for(int j = 0; j < n; j++) { + +#ifdef __XS2A__ + memcpy(state->buffer + write_ptr * channel_count, samples, channel_count * sizeof(int)); + (void)copy_mask; // Remove unused var warning +#else + register int32_t *ptr asm("r11") = samples; + asm("vldr %0[0]" :: "r" (ptr)); + asm("vstrpv %0[0], %1" :: "r" (state->buffer + write_ptr * channel_count), "r" (copy_mask)); +#endif + samples += channel_count; + write_ptr = (write_ptr + 1); + if (write_ptr >= max_fifo_depth) { + write_ptr = 0; + } + } + + /* Difference between timestamp recorded by consumer and current timestamp */ + state->write_ptr = write_ptr; + int32_t phase_error = state->timestamps[write_ptr] - timestamp; + + /* Ideal phase error is the middle of the fifo measured in ticks */ + phase_error += state->ideal_phase_error_ticks; + + /* Don't try and use timestamps that haven't been recorded yet! */ + if (state->skip_ctr != 0) { + state->skip_ctr--; + } else { + // Now that we have a phase error, calculate the proportional error + // and use that and the integral error to correct the ASRC factor + int32_t diff_error = phase_error - state->last_phase_error; + + state->frequency_ratio += + (diff_error * (int64_t) (state->Kp / n)) + // TODO: make this lookup table + (phase_error * (int64_t) state->Ki); + if (xscope_used) { +#if defined(ASYNC_FIFO_XSCOPE_INSTRUMENTATION) + xscope_int(1, phase_error); + xscope_int(2, diff_error); +#endif + } + } + state->last_phase_error = phase_error; + } + if (xscope_used) { +#if defined(ASYNC_FIFO_XSCOPE_INSTRUMENTATION) + xscope_int(3, len); + xscope_int(4, state->frequency_ratio >> K_SHIFT); +#endif + } + return (state->frequency_ratio + (1<<(K_SHIFT-1))) >> K_SHIFT; +} + +/** + * Function that implements the consumer interface. Control communication + * happens through two variables: reset and sample_data_valid. These shall + * only be set as the last action, as they signify to the production side + * that the datastructure can now be read on that side. + * + * Note that the samples are filled in regardless of whether the FIFO is + * operating or not; the consumer will repeatedly get the same sample if + * the producer fails. The producer side is reset exactly once on reset. + */ +void asynchronous_fifo_consumer_get(asynchronous_fifo_t *state, int32_t *samples, int32_t timestamp) { + int read_ptr = state->read_ptr; + int write_ptr = state->write_ptr; + int max_fifo_depth = state->max_fifo_depth; + int channel_count = state->channel_count; + int copy_mask = state->copy_mask; + int len = (write_ptr - read_ptr + max_fifo_depth) % max_fifo_depth; +#ifdef __XS2A__ + memcpy(samples, state->buffer + read_ptr * channel_count, channel_count * sizeof(int)); + (void)copy_mask; // Remove unused var warning +#else + register int32_t *ptr asm("r11") = state->buffer + read_ptr * channel_count; + asm("vldr %0[0]" :: "r" (ptr)); + asm("vstrpv %0[0], %1" :: "r" (samples), "r" (copy_mask)); +#endif + if (state->reset) { + return; + } + if (len > 2) { + // TODO: use IF not % + read_ptr = (read_ptr + 1) % state->max_fifo_depth; + state->read_ptr = read_ptr; + state->timestamps[read_ptr] = timestamp; + } else { + state->reset = 1; // The rest must happen in the other thread + } +} diff --git a/lib_src/lib_src/src/fixed_factor_of_3/ds3/FilterData/firds3_144.dat b/lib_src/lib_src/src/fixed_factor_of_3/ds3/FilterData/firds3_144.dat new file mode 100644 index 0000000..fd2db00 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3/ds3/FilterData/firds3_144.dat @@ -0,0 +1,145 @@ + 5169, + 30344, + 92411, + 193562, + 296359, + 325691, + 212464, + -32886, + -281088, + -341418, + -112035, + 285533, + 533339, + 349745, + -224229, + -754969, + -713889, + 29781, + 954818, + 1207943, + 354407, + -1069372, + -1818145, + -983285, + 1015273, + 2503639, + 1899873, + -695136, + -3195220, + -3129965, + 335, + 3791335, + 4673522, + 1182741, + -4156430, + -6496184, + -2964398, + 4122422, + 8523843, + 5445729, + -3488536, + -10636309, + -8712433, + 2021617, + 12663339, + 12833767, + 549205, + -14379818, + -17869463, + -4551004, + 15495107, + 23889760, + 10412643, + -15628264, + -31023908, + -18775924, + 14241822, + 39569514, + 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functions implementation file +// +// =========================================================================== +// =========================================================================== + + +// =========================================================================== +// +// Includes +// +// =========================================================================== +#include +#include +#include +#include + +#include "src.h" +#include "src_ff3_ds3.h" +#include "src_ff3_fir_inner_loop_asm.h" + + +// =========================================================================== +// +// Defines +// +// =========================================================================== + + +// State init value +#define SRC_FF3_DS3_STATE_INIT 0 + + + + +// =========================================================================== +// +// Variables +// +// =========================================================================== + +int src_ds3_coeffs[SRC_FF3_DS3_N_COEFS] = { + #include SRC_FF3_DS3_COEFS_FILE +}; + +// =========================================================================== +// +// Local Functions prototypes +// +// =========================================================================== + + + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + +src_ff3_return_code_t src_ds3_init(src_ds3_ctrl_t* src_ds3_ctrl) +{ + // Check that delay line base has been set + if (src_ds3_ctrl->delay_base == 0) { + return SRC_FF3_ERROR; + } + + // Setup from FIRDS2 descriptor + src_ds3_ctrl->delay_len = SRC_FF3_DS3_N_COEFS<<1; // Double length for circular buffer simulation + src_ds3_ctrl->delay_wrap = src_ds3_ctrl->delay_base + SRC_FF3_DS3_N_COEFS; + src_ds3_ctrl->delay_offset = SRC_FF3_DS3_N_COEFS; + src_ds3_ctrl->inner_loops = (SRC_FF3_DS3_N_COEFS>>1) / SRC_FF3_N_LOOPS_PER_ASM; // Right shift to 2 x 32bits read for coefs per inner loop + src_ds3_ctrl->num_coeffs = SRC_FF3_DS3_N_COEFS; + src_ds3_ctrl->coeffs = src_ds3_coeffs; + + // Sync the FIRDS3 + if (src_ds3_sync(src_ds3_ctrl) != SRC_FF3_NO_ERROR) { + return SRC_FF3_ERROR; + } + + return SRC_FF3_NO_ERROR; +} + +src_ff3_return_code_t src_ds3_sync(src_ds3_ctrl_t* src_ds3_ctrl) +{ + // Set delay line index back to base + src_ds3_ctrl->delay_pos = src_ds3_ctrl->delay_base; + + // Clear delay line + for (unsigned int ui = 0; ui < src_ds3_ctrl->delay_len; ui++) { + src_ds3_ctrl->delay_base[ui] = SRC_FF3_DS3_STATE_INIT; + } + + return SRC_FF3_NO_ERROR; +} + +src_ff3_return_code_t src_ds3_proc(src_ds3_ctrl_t* src_ds3_ctrl) +{ + int* data; + int* coeffs; + int data0; + __int64_t accumulator; + + // Get three new data samples to delay line (double write for circular buffer simulation) + data0 = *src_ds3_ctrl->in_data; + *src_ds3_ctrl->delay_pos = data0; + *(src_ds3_ctrl->delay_pos + src_ds3_ctrl->delay_offset) = data0; + + data0 = *(src_ds3_ctrl->in_data + 1); + *(src_ds3_ctrl->delay_pos + 1) = data0; + *(src_ds3_ctrl->delay_pos + src_ds3_ctrl->delay_offset + 1) = data0; + + data0 = *(src_ds3_ctrl->in_data + 2); + *(src_ds3_ctrl->delay_pos + 2) = data0; + *(src_ds3_ctrl->delay_pos + src_ds3_ctrl->delay_offset + 2) = data0; + + // Step delay with circular simulation (will also rewrite to control structure for next round) + // Note as delay line length is a multiple of 3 (because filter coefficients length is a multiple of 3) + // we only have to do the wrap around check after having written 3 input samples + src_ds3_ctrl->delay_pos += 3; + if (src_ds3_ctrl->delay_pos >= src_ds3_ctrl->delay_wrap) { + src_ds3_ctrl->delay_pos = src_ds3_ctrl->delay_base; + } + + // Clear accumulator and set access pointers + data = src_ds3_ctrl->delay_pos; + coeffs = src_ds3_ctrl->coeffs; + accumulator = 0; + if ((unsigned)data & 0b0100) { + src_ff3_fir_inner_loop_asm_odd(data, coeffs, &data0, src_ds3_ctrl->inner_loops); + } else { + src_ff3_fir_inner_loop_asm(data, coeffs, &data0, src_ds3_ctrl->inner_loops); + } + + *src_ds3_ctrl->out_data = data0; + + return SRC_FF3_NO_ERROR; +} + diff --git a/lib_src/lib_src/src/fixed_factor_of_3/ds3/src_ff3_ds3.h b/lib_src/lib_src/src/fixed_factor_of_3/ds3/src_ff3_ds3.h new file mode 100644 index 0000000..55340d2 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3/ds3/src_ff3_ds3.h @@ -0,0 +1,22 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_FF3_DS3_H_ +#define _SRC_FF3_DS3_H_ + +#ifdef __XC__ +extern "C" { +#endif + +#define SRC_FF3_DS3_N_COEFS 144 // Number of coefficients must be a multiple of 6 + +/* Filters with "_b_" in their filenames have higher attenuation at + * Nyquist (> 60dB compared with 20dB ) but with an earlier cutoff. + */ +#define SRC_FF3_DS3_COEFS_FILE "FilterData/firds3_b_144.dat" +//#define SRC_FF3_DS3_COEFS_FILE "FilterData/firds3_144.dat" + +#ifdef __XC__ +} +#endif + +#endif // _SRC_FF3_DS3_H_ diff --git a/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_144.dat b/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_144.dat new file mode 100644 index 0000000..96a62d0 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_144.dat @@ -0,0 +1,145 @@ + 277234, + 977073, +-843263, + 856598, +-672686, + 89343, + 1063222, +-2949854, + 5699618, +-9389894, + 14020565, +-19488553, + 25571530, +-31908927, + 37990018, +-43139454, + 46485321, +-46884792, + 42725465, +-31390114, + 7629628, + 42687800, +-181147269, + 1944820965, + 507612325, +-273394154, + 195466641, +-150806718, + 118708541, +-93071724, + 71669280, +-53608390, + 38501300, +-26137299, + 16337186, +-8893195, + 3548222, + 1006, +-2085407, + 3045819, +-3208116, + 2864453, +-2264906, + 1600018, +-1024255, + 637393, + 580686, + 15508, + 91031, + 889077, +-98659, +-336105, + 1049234, +-2141667, + 3623829, +-5454434, + 7510918, +-9585659, + 11374005, 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a/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_144.sfp b/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_144.sfp new file mode 100644 index 0000000000000000000000000000000000000000..6f5df306e5e55a9fb0730fa2acafda591f4dc1b1 GIT binary patch literal 3055 zcmeH}ZAg<*6vuC-VK0P4gapx}E$B^K7~!JY^Yo%4v7oXdS8nPIt=!l~X!P=AWfX!Y zBoYM{EeZNi^gO(C*B!)rs0!C0)giA`q586Fv&;QxzL!W}a?839(J@=gZcJ4Wc zO%x(U2+<-xZtGvDM4xSl8Tpo>k$nDc7V~S?LS}hS4)aoA4%0egI81h<_vb%mYKxhd zk47M0wF>RsMF|x#1zZj*$m7 zL@|3B@28xI>?XUG!Lxp%%RS^Gs<+y9lU>J@iaMfdneQd`%^Rv9eRNIjVWKtXdmT~S z&fZ4)jNq&WV#oVZrVthz$w>Rw6J_Ic!80x=Fda~{^gy4VN% z;v6^^&WUs59=I3oiF?Bj@C*E;8-9Zy;aB(>e#blDUGPqLH@qX>74M99M;w@OVZ;gI z262SALYyJ)5Qm6M#3|wyajYA0ZN|9~_X2rxf&yn}21E>qA6Q~=gBd9B=GeXuKvj)ikOSYs3k{(EU;D2~vY)pu8a^rMGQF4Qx zx*!Q=BY_9fs`h%_K^`~9SV~tJV%T27?UkKY6rx#vRO1}-o8UOGDB!7(Jzk9T@m=CQ z(r2o9+&vsR`qWT^yB|Va!n^=}#cq{{q&PI1Z=PK*4V!&APU}Mk<^LW#_2cpeH74k)98MS~ z>F+JgR1a&^jjtI~ket6}xw9nT@dun*<-Y1#=UPu-PtfagZrq&5UqSWWpvS+~9dtXZ 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+-1954657, + 1839429, +-1256274, + 694900, + 662641, +-1004 diff --git a/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_b_144.sfp b/lib_src/lib_src/src/fixed_factor_of_3/os3/FilterData/firos3_b_144.sfp new file mode 100644 index 0000000000000000000000000000000000000000..d8e5e8704a56371dd60f3729b5a8e65d7a040cf7 GIT binary patch literal 3067 zcmeHJeN0nV6o0x3RK-DX6GT~6TsoCHT3|>w&*MWxlTj(KF{mjBugEvj;$Sg=X_2v^ zP}2z$6Dng7WBkBv%q+CGf_1np>fAJATcA@z2y{Tmm@=m9y~1fpmiX6_{liUe?>Xnb zd+xdC{C+3pQ`BOLq8iwFb<6j+ZJn3R!;+7+W-qH*=&rMWHlj0!Rme-ShbQ^N(<5V+piVIaZ0otU>5Ld25AUJ|y4-iX&y&)>HbT=_!cxyeJ3z*3ZdqHg6O6wt%Z=JCgw}h?dx66- zB-j7kw1klpWl)`>KWrEIDP*Qe?Gp;($<3ZEH{OC@+dn*Z+Li*^qyDKYR&IkbsZYX3 zmy=1ziLYPpKE990SA1y?h)5y5CU=dnZzo(Z#va_-qyo#{0`GP4+0bh=9hT=sg2LWW z-#f&R0Ci)Hj6Oitf7|v;-MTE&$vh3;`+FLk@Y|yoZ7qf7spV^@#?@f)i9R3qML48q zr1>pos=4CCsId~_%(7Otj->hURN2AF! z;kA5Prz4+R3{R>}wd4>L@9|oPnhZA#C5Gl52G55{GJAm@au0UgJ=#_a!I`bspWk0d zh~L1{>5~SMe0Hhos_zrv*z7yY#dBD72o-l8iN6ahc8S{>Hz`9_aux?mKtSiy9`;Tp&&mH;5y|72*tWhd4xBB2E#vh-1Vx;v8|0JV0I`PmnjrBjgqG40(q>Joeu&-dB!M?-wpoOuJfrSh#WZ?hIz|0IqEn)-k5C{Y! z4O6D!6zAX+hhd2-zbHfFusdxI&4YF<)MH3?jJv>jq^Np!ay>4Noo;dOZBa9stmJUU z?YnMqN!-3KEpdzoz-hBXK%?|33he4?pgfv4&puzoP`TA>?u>w4xj%t8a&}w$YHnHP z?i+_e+1oeDeUH4PMPyb%PN5=(QRiujiWRa%iDSm* zx(p;sv+l!oUVk7 +#include +#include +#include + +#include "src.h" +#include "src_ff3_os3.h" +#include "src_ff3_fir_inner_loop_asm.h" + +// =========================================================================== +// +// Defines +// +// =========================================================================== + +// State init value +#define SRC_OS3_STATE_INIT 0 + +// =========================================================================== +// +// Variables +// +// =========================================================================== + +int src_os3_coeffs[SRC_FF3_OS3_N_COEFS] = { + #include SRC_FF3_OS3_COEFS_FILE +}; + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + +src_ff3_return_code_t src_os3_init(src_os3_ctrl_t* src_os3_ctrl) +{ + // Check that delay line base has been set + if (src_os3_ctrl->delay_base == 0) { + return SRC_FF3_ERROR; + } + + // Setup from FIROS2 descriptor + src_os3_ctrl->delay_len = (SRC_FF3_OS3_N_COEFS/SRC_FF3_OS3_N_PHASES)<<1; // Double length for circular buffer simulation. x3 over-sampler, so only 1/3rd of coefs length needed + src_os3_ctrl->delay_wrap = src_os3_ctrl->delay_base + (SRC_FF3_OS3_N_COEFS/SRC_FF3_OS3_N_PHASES); + src_os3_ctrl->delay_offset = (SRC_FF3_OS3_N_COEFS/SRC_FF3_OS3_N_PHASES); + src_os3_ctrl->inner_loops = ((SRC_FF3_OS3_N_COEFS/SRC_FF3_OS3_N_PHASES)>>1) / SRC_FF3_N_LOOPS_PER_ASM; // Right shift due to 2 x 32bits read for coefs per inner loop and x3 over-sampler, so only 1/3rd of coefs length needed + src_os3_ctrl->num_coeffs = SRC_FF3_OS3_N_COEFS; + src_os3_ctrl->coeffs = src_os3_coeffs; + + // Sync the FIROS3 + if (src_os3_sync(src_os3_ctrl) != SRC_FF3_NO_ERROR) { + return SRC_FF3_ERROR; + } + + return SRC_FF3_NO_ERROR; +} + +src_ff3_return_code_t src_os3_sync(src_os3_ctrl_t* src_os3_ctrl) +{ + // Set delay line index back to base + src_os3_ctrl->delay_pos = src_os3_ctrl->delay_base; + + // Clear delay line + for (unsigned int ui = 0; ui < src_os3_ctrl->delay_len; ui++) { + src_os3_ctrl->delay_base[ui] = SRC_OS3_STATE_INIT; + } + + // Set phase to '0' to indicate that a new input sample is needed + src_os3_ctrl->phase = 0; + + return SRC_FF3_NO_ERROR; +} + +src_ff3_return_code_t src_os3_input(src_os3_ctrl_t* src_os3_ctrl) +{ + // Write new input sample from control structure to delay line + // at both positions for circular buffer simulation + *src_os3_ctrl->delay_pos = src_os3_ctrl->in_data; + *(src_os3_ctrl->delay_pos + src_os3_ctrl->delay_offset) = src_os3_ctrl->in_data; + + // Step delay index with circular buffer simulation + src_os3_ctrl->delay_pos += 1; + if (src_os3_ctrl->delay_pos >= src_os3_ctrl->delay_wrap) { + src_os3_ctrl->delay_pos = src_os3_ctrl->delay_base; + } + + return SRC_FF3_NO_ERROR; +} + +src_ff3_return_code_t src_os3_proc(src_os3_ctrl_t* src_os3_ctrl) +{ + int* data; + int* coeffs; + int data0; + __int64_t accumulator; + + // Clear accumulator and set data/coefs access pointers + data = src_os3_ctrl->delay_pos; + coeffs = src_os3_ctrl->coeffs + src_os3_ctrl->phase; + accumulator = 0; + + if ((unsigned)data & 0b0100) { + src_ff3_fir_inner_loop_asm_odd(data, coeffs, &data0, src_os3_ctrl->inner_loops); + } else { + src_ff3_fir_inner_loop_asm(data, coeffs, &data0, src_os3_ctrl->inner_loops); + } + + // Write output + src_os3_ctrl->out_data = data0; + + // Step phase + src_os3_ctrl->phase += (SRC_FF3_OS3_N_COEFS/SRC_FF3_OS3_N_PHASES); + if (src_os3_ctrl->phase == SRC_FF3_OS3_N_COEFS) { + src_os3_ctrl->phase = 0; + } + + return SRC_FF3_NO_ERROR; +} + diff --git a/lib_src/lib_src/src/fixed_factor_of_3/os3/src_ff3_os3.h b/lib_src/lib_src/src/fixed_factor_of_3/os3/src_ff3_os3.h new file mode 100644 index 0000000..b891879 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3/os3/src_ff3_os3.h @@ -0,0 +1,23 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_FF3_OS3_H_ +#define _SRC_FF3_OS3_H_ + +#ifdef __XC__ +extern "C" { +#endif + +#define SRC_FF3_OS3_N_COEFS 144 // Number of coefficients must be a multiple of 6 +#define SRC_FF3_OS3_N_PHASES 3 // Number of output phases (3 as OS3 over-sample by 3) + +/* Filters with "_b_" in their filenames have higher attenuation at + * 8kHz (> 60dB compared with 20dB ) but with an earlier cutoff. + */ +// #define SRC_FF3_OS3_COEFS_FILE "FilterData/firos3_b_144.dat" +#define SRC_FF3_OS3_COEFS_FILE "FilterData/firos3_144.dat" + +#ifdef __XC__ +} +#endif + +#endif // _SRC_FF3_OS3_H_ diff --git a/lib_src/lib_src/src/fixed_factor_of_3/src_ff3_fir_inner_loop_asm.S b/lib_src/lib_src/src/fixed_factor_of_3/src_ff3_fir_inner_loop_asm.S new file mode 100644 index 0000000..8bf06ec --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3/src_ff3_fir_inner_loop_asm.S @@ -0,0 +1,290 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + .section .dp.data,"awd",@progbits + .text + + .cc_top src_ff3_fir_inner_loop_asm.function + .globl src_ff3_fir_inner_loop_asm + .align 8 + .type src_ff3_fir_inner_loop_asm,@function + +src_ff3_fir_inner_loop_asm: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 + + + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + stw iDataRet_p, sp[6] + //Constant for adding onto stuff. Gets updated later + ldc step, 0x60 + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + + bf counter, done +main_loop: + sub counter, counter, 1 + + ldd iData0, iData1, piData_p[0] + ldd iCoef0, iCoef1, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[1] + ldd iCoef0, iCoef1, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[2] + ldd iCoef0, iCoef1, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[3] + ldd iCoef0, iCoef1, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[4] + ldd iCoef0, iCoef1, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[5] + ldd iCoef0, iCoef1, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[6] + ldd iCoef0, iCoef1, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[7] + ldd iCoef0, iCoef1, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[8] + ldd iCoef0, iCoef1, piCoefs_p[8] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[9] + ldd iCoef0, iCoef1, piCoefs_p[9] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[10] + ldd iCoef0, iCoef1, piCoefs_p[10] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[11] + ldd iCoef0, iCoef1, piCoefs_p[11] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + //Decrement loop counter and increment pointers and branch if still running + {add piData_p, piData_p, step; add piCoefs_p, piCoefs_p, step} + + bt counter, main_loop + +done: + //pop return value pointer from stack so we can use it to write back + //Write back the two return values + {ldw iDataRet_p, sp[6]; ldc counter, 31} //Reuse counter (r3) + + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size + +.atmp: + .size src_ff3_fir_inner_loop_asm, .atmp-src_ff3_fir_inner_loop_asm + .align 8 + .cc_bottom src_ff3_fir_inner_loop_asm.function + + .set src_ff3_fir_inner_loop_asm.nstackwords, stack_size + .globl src_ff3_fir_inner_loop_asm.nstackwords + .set src_ff3_fir_inner_loop_asm.maxcores, 1 + .globl src_ff3_fir_inner_loop_asm.maxcores + .set src_ff3_fir_inner_loop_asm.maxtimers,0 + .globl src_ff3_fir_inner_loop_asm.maxtimers + .set src_ff3_fir_inner_loop_asm.maxchanends,0 + .globl src_ff3_fir_inner_loop_asm.maxchanends + + + .section .dp.data,"awd",@progbits + .text + + .cc_top src_ff3_fir_inner_loop_asm_odd.function + .globl src_ff3_fir_inner_loop_asm_odd + .align 8 + .type src_ff3_fir_inner_loop_asm_odd,@function + +src_ff3_fir_inner_loop_asm_odd: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 + + + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + stw iDataRet_p, sp[6] + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + ldc step, 0x60 + bf counter, done +main_loop_odd: + + {sub counter, counter, 1; sub step, step, 8} //Sub gets loaded with 0x60 at end of loop + //We actually want 0x58 so this is good + + //Constant for adding onto stuff. Gets updated later + + {ldw iData0, piData_p[0]; add piData_p, piData_p, 4} //Now 64b aligned + + ldd iCoef1, iCoef0, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[0] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[1] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[2] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[3] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[4] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[5] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[6] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[7] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[8] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[8] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[9] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[9] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[10] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[10] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[11] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + + add piData_p, piData_p, step + + {ldw iData1, piData_p[0]; add piData_p, piData_p, 4} //0x4 + 0x58 + 0x4 = 0x60) + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + //Increment pointers and branch if still running + ldc step, 0x60 + {bt counter, main_loop_odd; add piCoefs_p, piCoefs_p, step} + +done_odd: + //pop return value pointer from stack so we can use it to write back + {ldw iDataRet_p, sp[6]; ldc counter, 31} //Reuse counter (r3) + + //Write back the return value + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size + +.atmp_odd: + .size src_ff3_fir_inner_loop_asm_odd, .atmp-src_ff3_fir_inner_loop_asm_odd + .align 8 + .cc_bottom src_ff3_fir_inner_loop_asm_odd.function + + .set src_ff3_fir_inner_loop_asm_odd.nstackwords, stack_size + .globl src_ff3_fir_inner_loop_asm_odd.nstackwords + .set src_ff3_fir_inner_loop_asm_odd.maxcores, 1 + .globl src_ff3_fir_inner_loop_asm_odd.maxcores + .set src_ff3_fir_inner_loop_asm_odd.maxtimers,0 + .globl src_ff3_fir_inner_loop_asm_odd.maxtimers + .set src_ff3_fir_inner_loop_asm_odd.maxchanends,0 + .globl src_ff3_fir_inner_loop_asm_odd.maxchanends diff --git a/lib_src/lib_src/src/fixed_factor_of_3/src_ff3_fir_inner_loop_asm.h b/lib_src/lib_src/src/fixed_factor_of_3/src_ff3_fir_inner_loop_asm.h new file mode 100644 index 0000000..de9ae84 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3/src_ff3_fir_inner_loop_asm.h @@ -0,0 +1,12 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_FF3_FIR_INNER_LOOP_ASM_H_ +#define _SRC_FF3_FIR_INNER_LOOP_ASM_H_ + +#define SRC_FF3_N_LOOPS_PER_ASM 12 + +void src_ff3_fir_inner_loop_asm(int *piData, int *piCoefs, int iData[], int count); +void src_ff3_fir_inner_loop_asm_odd(int *piData, int *piCoefs, int iData[], int count); + + +#endif // _SRC_FF3_FIR_INNER_LOOP_ASM_H_ diff --git a/lib_src/lib_src/src/fixed_factor_of_3_voice/ds3_voice/src_ff3v_ds3_voice.S b/lib_src/lib_src/src/fixed_factor_of_3_voice/ds3_voice/src_ff3v_ds3_voice.S new file mode 100644 index 0000000..b618f23 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3_voice/ds3_voice/src_ff3v_ds3_voice.S @@ -0,0 +1,94 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +.section .dp.data,"awd",@progbits +.text + +#define STACKWORDS 4 + +#define c0 r4 +#define c1 r5 +#define d0 r6 + +#define s r11 + +.cc_top src_ds3_voice_add_sample.function +.globl src_ds3_voice_add_sample +.align 4 +.type src_ds3_voice_add_sample,@function +src_ds3_voice_add_sample://(int64_t sum, int32_t data[], int32_t coefs[], int32_t sample); + +.issue_mode dual + DUALENTSP_lu6 STACKWORDS + + std r4, r5, sp[0] + std r6, r7, sp[1] + + ldw s, sp[STACKWORDS+1] + + bl src_ff3v_fir_impl + + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + retsp STACKWORDS + +.src_ds3_voice_add_sample_tmp: + .size src_ds3_voice_add_sample, .src_ds3_voice_add_sample_tmp-src_ds3_voice_add_sample + .align 4 + .cc_bottom src_ds3_voice_add_sample.function + + .set src_ds3_voice_add_sample.nstackwords, STACKWORDS + .globl src_ds3_voice_add_sample.nstackwords + .set src_ds3_voice_add_sample.maxcores,1 + .globl src_ds3_voice_add_sample.maxcores + .set src_ds3_voice_add_sample.maxtimers,0 + .globl src_ds3_voice_add_sample.maxtimers + .set src_ds3_voice_add_sample.maxchanends,0 + .globl src_ds3_voice_add_sample.maxchanends + +.cc_top src_ds3_voice_add_final_sample.function +.globl src_ds3_voice_add_final_sample +.align 4 +.type src_ds3_voice_add_final_sample,@function +src_ds3_voice_add_final_sample://(int64_t sum, int32_t data[], int32_t coefs[], int32_t sample); + +.issue_mode dual + DUALENTSP_lu6 STACKWORDS + + std r4, r5, sp[0] + std r6, r7, sp[1] + + ldw s, sp[STACKWORDS+1] + + bl src_ff3v_fir_impl + + {ldc d0, 31; nop} + lextract r0, r1, r0, d0, 32 + + ldaw s, cp[src_ff3v_fir_comp_ds] + ldw s, s[0] + {ldc c0, 0; ldc c1, 0} + maccs c0, c1, r0, s + + ldaw s, cp[src_ff3v_fir_comp_q_ds] + ldw s, s[0] + + lsats c0, c1, s + lextract r0, c0, c1, s, 32 + + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + {retsp STACKWORDS; ldc r1, 0} + +.src_ds3_voice_add_final_sample_tmp: + .size src_ds3_voice_add_final_sample, .src_ds3_voice_add_final_sample_tmp-src_ds3_voice_add_final_sample + .align 4 + .cc_bottom src_ds3_voice_add_final_sample.function + + .set src_ds3_voice_add_final_sample.nstackwords, STACKWORDS + .globl src_ds3_voice_add_final_sample.nstackwords + .set src_ds3_voice_add_final_sample.maxcores,1 + .globl src_ds3_voice_add_final_sample.maxcores + .set src_ds3_voice_add_final_sample.maxtimers,0 + .globl src_ds3_voice_add_final_sample.maxtimers + .set src_ds3_voice_add_final_sample.maxchanends,0 + .globl src_ds3_voice_add_final_sample.maxchanends diff --git a/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.S b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.S new file mode 100644 index 0000000..8df83f6 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.S @@ -0,0 +1,63 @@ +// Copyright 2017-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +.section .dp.data,"awd",@progbits +.text + +#define sum_l r0 +#define sum_h r1 +#define data r2 +#define coefs r3 + +#define c0 r4 +#define c1 r5 +#define d0 r6 +#define d1 r7 + +#define s r11 + +#define EVEN_STEP(N) \ + ldd c1, c0, coefs[N];\ + maccs sum_h, sum_l, c0, s;\ + ldd d1, d0, data[N];\ + maccs sum_h, sum_l, c1, d0;\ + std d0, s, data[N]; + +#define ODD_STEP(N) \ + ldd c1, c0, coefs[N];\ + maccs sum_h, sum_l, c0, d1;\ + ldd s, d0, data[N];\ + maccs sum_h, sum_l, c1, d0;\ + std d0, d1, data[N]; + +.cc_top src_ff3v_fir_impl.function +.globl src_ff3v_fir_impl +.align 8 +.type src_ff3v_fir_impl,@function +.issue_mode dual +src_ff3v_fir_impl: + EVEN_STEP(0); + ODD_STEP(1); + EVEN_STEP(2); + ODD_STEP(3); + EVEN_STEP(4); + ODD_STEP(5); + EVEN_STEP(6); + ODD_STEP(7); + EVEN_STEP(8); + ODD_STEP(9); + EVEN_STEP(10); + ODD_STEP(11); + {retsp 0; nop} +.src_ff3v_fir_impl_tmp: + .size src_ff3v_fir_impl, .src_ff3v_fir_impl_tmp-src_ff3v_fir_impl + .align 4 + .cc_bottom src_ff3v_fir_impl.function + + .set src_ff3v_fir_impl.nstackwords, 0 + .globl src_ff3v_fir_impl.nstackwords + .set src_ff3v_fir_impl.maxcores,1 + .globl src_ff3v_fir_impl.maxcores + .set src_ff3v_fir_impl.maxtimers,0 + .globl src_ff3v_fir_impl.maxtimers + .set src_ff3v_fir_impl.maxchanends,0 + .globl src_ff3v_fir_impl.maxchanends diff --git a/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.h b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.h new file mode 100644 index 0000000..3ad213e --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.h @@ -0,0 +1,33 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// +// This file is generated using src_ff3v_fir_generator.py +// +// Do not modify it directly, changes may be overwritten! +// + +#ifndef _SRC_FF3V_FIR_H_ +#define _SRC_FF3V_FIR_H_ + +#include + +#define SRC_FF3V_FIR_NUM_PHASES (3) +#define SRC_FF3V_FIR_TAPS_PER_PHASE (24) + +extern const unsigned src_ff3v_fir_comp_q_ds; +extern const int32_t src_ff3v_fir_comp_ds; + +extern const unsigned src_ff3v_fir_comp_q_us; +extern const int32_t src_ff3v_fir_comp_us; + +extern int32_t src_ff3v_fir_coefs_debug[SRC_FF3V_FIR_NUM_PHASES * SRC_FF3V_FIR_TAPS_PER_PHASE]; + +#if defined(__XC__) +extern const int32_t (*src_ff3v_fir_coefs_xc)[SRC_FF3V_FIR_TAPS_PER_PHASE]; +#define src_ff3v_fir_coefs src_ff3v_fir_coefs_xc +#else +extern const int32_t (*src_ff3v_fir_coefs_c)[SRC_FF3V_FIR_TAPS_PER_PHASE]; +#define src_ff3v_fir_coefs src_ff3v_fir_coefs_c +#endif + +#endif // _SRC_FF3V_FIR_H_ diff --git a/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.xc b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.xc new file mode 100644 index 0000000..99a1f64 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir.xc @@ -0,0 +1,67 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// +// This file is generated using src_ff3v_fir_generator.py +// +// Do not modify it directly, changes may be overwritten! +// + +#include "src_ff3v_fir.h" +#include + +/** Used for FIR compensation for decimation*/ +const unsigned src_ff3v_fir_comp_q_ds = 29; + +/** Used for FIR compensation for decimation*/ +const int32_t src_ff3v_fir_comp_ds = 1112549167; + +/** Used for FIR compensation for upsampling*/ +const unsigned src_ff3v_fir_comp_q_us = 27; + +/** Used for FIR compensation for upsampling*/ +const int32_t src_ff3v_fir_comp_us = 834411870; + +/** Used for self testing src_ds3_voice and src_us3_voice functionality */ +int32_t src_ff3v_fir_coefs_debug[SRC_FF3V_FIR_NUM_PHASES * SRC_FF3V_FIR_TAPS_PER_PHASE] = { + 1005142, 1367390, 29412, -4146838, -10154637, -14619962, + -13776186, -6744830, 2692812, 8121360, 5508436, -2814524, + -9285443, -7351357, 2193307, 10930750, 9953155, -1338213, + -13227624, -13683020, -123797, 16201217, 19008511, 2582573, + -20205295, -27041699, -6837031, 26249516, 40760231, 15085431, + -37763299, -71330011, -37235961, 74585089, 219245690, 320542055, + 320542055, 219245690, 74585089, -37235961, -71330011, -37763299, + 15085431, 40760231, 26249516, -6837031, -27041699, -20205295, + 2582573, 19008511, 16201217, -123797, -13683020, -13227624, + -1338213, 9953155, 10930750, 2193307, -7351357, -9285443, + -2814524, 5508436, 8121360, 2692812, -6744830, -13776186, + -14619962, -10154637, -4146838, 29412, 1367390, 1005142, + +}; + +/** Coefficients for use with src_ds3_voice and src_us3_voice functions */ +static const int32_t [[aligned(8)]] src_ff3v_fir_coefs_i[SRC_FF3V_FIR_NUM_PHASES][SRC_FF3V_FIR_TAPS_PER_PHASE] = { + { + 29412, -14619962, 2692812, -2814524, 2193307, -1338213, + -123797, 2582573, -6837031, 15085431, -37235961, 320542055, + 74585089, -37763299, 26249516, -20205295, 16201217, -13227624, + 10930750, -9285443, 8121360, -13776186, -4146838, 1005142, + }, + { + 1367390, -10154637, -6744830, 5508436, -7351357, 9953155, + -13683020, 19008511, -27041699, 40760231, -71330011, 219245690, + 219245690, -71330011, 40760231, -27041699, 19008511, -13683020, + 9953155, -7351357, 5508436, -6744830, -10154637, 1367390, + }, + { + 1005142, -4146838, -13776186, 8121360, -9285443, 10930750, + -13227624, 16201217, -20205295, 26249516, -37763299, 74585089, + 320542055, -37235961, 15085431, -6837031, 2582573, -123797, + -1338213, 2193307, -2814524, 2692812, -14619962, 29412, + }, +}; + +unsafe { + const int32_t (* unsafe src_ff3v_fir_coefs_c)[SRC_FF3V_FIR_TAPS_PER_PHASE] = src_ff3v_fir_coefs_i; +} + +const int32_t (*src_ff3v_fir_coefs_xc)[SRC_FF3V_FIR_TAPS_PER_PHASE] = src_ff3v_fir_coefs_i; diff --git a/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir_generator.py b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir_generator.py new file mode 100644 index 0000000..885bd41 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3_voice/src_ff3v_fir_generator.py @@ -0,0 +1,168 @@ +#!/usr/bin/env python +# Copyright 2016-2021 XMOS LIMITED. +# This Software is subject to the terms of the XMOS Public Licence: Version 1. +import os.path +import numpy as np +from scipy import signal +import matplotlib.pyplot as plt + + +def plot_response(fs, w, h, title): + plt.figure() + plt.plot(0.5*fs*w/np.pi, 20*np.log10(np.abs(h))) + + plt.xlim(0, 0.5*fs) + plt.grid(True) + plt.xlabel('Frequency (Hz)') + plt.ylabel('Gain (dB)') + plt.title(title) + plt.show() + +def plot_response_passband(fs, w, h, title): + plt.figure() + plt.plot(0.5*fs*w/np.pi, 20*np.log10(np.abs(h))) + plt.ylim(-1, 1) + plt.xlim(0, 0.25*fs) + plt.grid(True) + plt.xlabel('Frequency (Hz)') + plt.ylabel('Gain (dB)') + plt.title(title) + plt.show() + +def generate_header_file(num_taps_per_phase, num_phases): + header_template = """\ +// Copyright (c) 2016-2021, XMOS Ltd, All rights reserved +// +// This file is generated using src_ff3v_fir_generator.py +// +// Do not modify it directly, changes may be overwritten! +// + +#ifndef _SRC_FF3V_FIR_H_ +#define _SRC_FF3V_FIR_H_ + +#include + +#define SRC_FF3V_FIR_NUM_PHASES (%(phases)s) +#define SRC_FF3V_FIR_TAPS_PER_PHASE (%(taps_per_phase)s) + +extern const unsigned src_ff3v_fir_comp_q_ds; +extern const int32_t src_ff3v_fir_comp_ds; + +extern const unsigned src_ff3v_fir_comp_q_us; +extern const int32_t src_ff3v_fir_comp_us; + +extern int32_t src_ff3v_fir_coefs_debug[SRC_FF3V_FIR_NUM_PHASES * SRC_FF3V_FIR_TAPS_PER_PHASE]; + +#if defined(__XC__) +extern const int32_t (*src_ff3v_fir_coefs_xc)[SRC_FF3V_FIR_TAPS_PER_PHASE]; +#define src_ff3v_fir_coefs src_ff3v_fir_coefs_xc +#else +extern const int32_t (*src_ff3v_fir_coefs_c)[SRC_FF3V_FIR_TAPS_PER_PHASE]; +#define src_ff3v_fir_coefs src_ff3v_fir_coefs_c +#endif + +#endif // _SRC_FF3V_FIR_H_ +""" + + header_path = os.path.join(os.path.dirname(os.path.realpath(__file__)), + 'src_ff3v_fir.h') + with open(header_path, "w") as header_file: + header_file.writelines(header_template % {'taps_per_phase':num_taps_per_phase, + 'phases':num_phases}) + +def generate_xc_file(q_ds, q_us, comp_ds, comp_us, taps): + xc_template = """\ +// Copyright (c) 2016-2021, XMOS Ltd, All rights reserved +// +// This file is generated using src_ff3v_fir_generator.py +// +// Do not modify it directly, changes may be overwritten! +// + +#include "src_ff3v_fir.h" +#include + +/** Used for FIR compensation for decimation*/ +const unsigned src_ff3v_fir_comp_q_ds = %(comp_q_ds)s; + +/** Used for FIR compensation for decimation*/ +const int32_t src_ff3v_fir_comp_ds = %(comp_ds)s; + +/** Used for FIR compensation for upsampling*/ +const unsigned src_ff3v_fir_comp_q_us = %(comp_q_us)s; + +/** Used for FIR compensation for upsampling*/ +const int32_t src_ff3v_fir_comp_us = %(comp_us)s; + +/** Used for self testing src_ds3_voice and src_us3_voice functionality */ +int32_t src_ff3v_fir_coefs_debug[SRC_FF3V_FIR_NUM_PHASES * SRC_FF3V_FIR_TAPS_PER_PHASE] = { +%(coefs_debug)s +}; + +/** Coefficients for use with src_ds3_voice and src_us3_voice functions */ +static const int32_t [[aligned(8)]] src_ff3v_fir_coefs_i[SRC_FF3V_FIR_NUM_PHASES][SRC_FF3V_FIR_TAPS_PER_PHASE] = { +%(coefs)s}; + +unsafe { + const int32_t (* unsafe src_ff3v_fir_coefs_c)[SRC_FF3V_FIR_TAPS_PER_PHASE] = src_ff3v_fir_coefs_i; +} + +const int32_t (*src_ff3v_fir_coefs_xc)[SRC_FF3V_FIR_TAPS_PER_PHASE] = src_ff3v_fir_coefs_i; +""" + + coefs_debug = '' + i = 1 + for c in taps: + coefs_debug += (' ' + str(int(c*(2**31 - 1))).rjust(12) + ',') + if ((i % 6) == 0): + coefs_debug += '\n' + i+=1 + + coefs = '' + + for step in range(num_phases-1, -1, -1): + i = 1 + coefs += ' {\n ' + for j in range(step, len(taps), num_phases): + coefs += ' ' + str(int(taps[j]*(2**31 - 1))).rjust(12) + ',' + if ((i % 6) == 0): + coefs += '\n ' + i+=1 + coefs += '},\n' + + xc_path = os.path.join(os.path.dirname(os.path.realpath(__file__)), + 'src_ff3v_fir.xc') + with open(xc_path, "w") as xc_file: + + xc_file.writelines(xc_template % {'comp_q_ds':str(q_ds), + 'comp_ds':str(comp_ds), + 'comp_q_us':str(q_us), + 'comp_us':str(comp_us), + 'coefs_debug':coefs_debug, + 'coefs':coefs}) + +# Low-pass filter design parameters +fs = 48000.0 # Sample rate, Hz +num_phases = 3 +num_taps_per_phase = 2*12 + +taps = signal.remez((num_phases*num_taps_per_phase), [0, 7300, 8700, 0.5*fs], [1, 0], [.008, 1], Hz=fs) +w, h = signal.freqz(taps) + +pass_band_atten = sum(abs(taps)) +upsampling_atten = num_phases +taps = taps / pass_band_atten # Guarantee no overflow + +# generate the compensation factors +q_ds = 30 - int(np.log2(pass_band_atten) + 0.5) +q_us = 30 - int(np.log2(pass_band_atten * upsampling_atten) + 0.5) +comp_ds = int(((2**q_ds)-1) * pass_band_atten) +comp_us = int(((2**q_us)-1) * pass_band_atten * upsampling_atten) + +if __name__ == "__main__": + # plot_response(fs, w, h, "Low-pass Filter") + # plot_response_passband(fs, w, h, "Low-pass Filter") + generate_header_file(num_taps_per_phase, num_phases) + generate_xc_file(q_ds, q_us, comp_ds, comp_us, taps) + diff --git a/lib_src/lib_src/src/fixed_factor_of_3_voice/us3_voice/src_ff3v_us3_voice.S b/lib_src/lib_src/src/fixed_factor_of_3_voice/us3_voice/src_ff3v_us3_voice.S new file mode 100644 index 0000000..46506e6 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_of_3_voice/us3_voice/src_ff3v_us3_voice.S @@ -0,0 +1,137 @@ +// Copyright 2017-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + .section .dp.data,"awd",@progbits + .text + +#define STACKWORDS 4 + +#define sum_l r0 +#define sum_h r1 +#define data r2 +#define coefs r3 + +#define c0 r4 +#define c1 r5 +#define d0 r6 +#define d1 r7 + +#define s r11 + +#define TWO_TAPS_NO_STORE(N) \ + ldd c1, c0, coefs[N];\ + ldd d1, d0, data[N];\ + maccs sum_h, sum_l, c0, d0;\ + maccs sum_h, sum_l, c1, d1; + +.cc_top src_us3_voice_input_sample.function +.globl src_us3_voice_input_sample +.align 4 +.type src_us3_voice_input_sample,@function +src_us3_voice_input_sample://(int32_t data[], int32_t coefs[], int32_t sample); + +.issue_mode dual + DUALENTSP_lu6 STACKWORDS + + std r4, r5, sp[0] + std r6, r7, sp[1] + + + // TODO: fix this by renaming the registers + mov s, r2 + {mov r2, r0; mov r3, r1} + {ldc r0, 0; ldc r1, 0} + + bl src_ff3v_fir_impl + + {ldc d0, 31; nop} + lextract r0, r1, r0, d0, 32 + + ldaw s, cp[src_ff3v_fir_comp_us] + ldw s, s[0] + {ldc c0, 0; ldc c1, 0} + maccs c0, c1, r0, s + + ldaw s, cp[src_ff3v_fir_comp_q_us] + ldw s, s[0] + + lsats c0, c1, s + lextract r0, c0, c1, s, 32 + + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + retsp STACKWORDS + +.src_us3_voice_input_sample_tmp: + .size src_us3_voice_input_sample, .src_us3_voice_input_sample_tmp-src_us3_voice_input_sample + .align 4 + .cc_bottom src_us3_voice_input_sample.function + + .set src_us3_voice_input_sample.nstackwords, STACKWORDS + .globl src_us3_voice_input_sample.nstackwords + .set src_us3_voice_input_sample.maxcores,1 + .globl src_us3_voice_input_sample.maxcores + .set src_us3_voice_input_sample.maxtimers,0 + .globl src_us3_voice_input_sample.maxtimers + .set src_us3_voice_input_sample.maxchanends,0 + .globl src_us3_voice_input_sample.maxchanends + +.cc_top src_us3_voice_get_next_sample.function +.globl src_us3_voice_get_next_sample +.align 4 +.type src_us3_voice_get_next_sample,@function +src_us3_voice_get_next_sample://(int32_t data[], int32_t coefs[], int32_t sample); + +.issue_mode dual + DUALENTSP_lu6 STACKWORDS + + std r4, r5, sp[0] + std r6, r7, sp[1] + + // TODO: fix this by renaming the registers + {mov r2, r0; mov r3, r1} + {ldc r0, 0; ldc r1, 0} + + TWO_TAPS_NO_STORE(0) + TWO_TAPS_NO_STORE(1) + TWO_TAPS_NO_STORE(2) + TWO_TAPS_NO_STORE(3) + TWO_TAPS_NO_STORE(4) + TWO_TAPS_NO_STORE(5) + TWO_TAPS_NO_STORE(6) + TWO_TAPS_NO_STORE(7) + TWO_TAPS_NO_STORE(8) + TWO_TAPS_NO_STORE(9) + TWO_TAPS_NO_STORE(10) + TWO_TAPS_NO_STORE(11) + + {ldc d0, 31; nop} + lextract r0, r1, r0, d0, 32 + + ldaw s, cp[src_ff3v_fir_comp_us] + ldw s, s[0] + {ldc c0, 0; ldc c1, 0} + maccs c0, c1, r0, s + + ldaw s, cp[src_ff3v_fir_comp_q_us] + ldw s, s[0] + + lsats c0, c1, s + lextract r0, c0, c1, s, 32 + + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + retsp STACKWORDS + +.src_us3_voice_get_next_sample_tmp: + .size src_us3_voice_get_next_sample, .src_us3_voice_get_next_sample_tmp-src_us3_voice_get_next_sample + .align 4 + .cc_bottom src_us3_voice_get_next_sample.function + + .set src_us3_voice_get_next_sample.nstackwords, STACKWORDS + .globl src_us3_voice_get_next_sample.nstackwords + .set src_us3_voice_get_next_sample.maxcores,1 + .globl src_us3_voice_get_next_sample.maxcores + .set src_us3_voice_get_next_sample.maxtimers,0 + .globl src_us3_voice_get_next_sample.maxtimers + .set src_us3_voice_get_next_sample.maxchanends,0 + .globl src_us3_voice_get_next_sample.maxchanends diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/conv_s32_24t.S b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/conv_s32_24t.S new file mode 100644 index 0000000..91d03d0 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/conv_s32_24t.S @@ -0,0 +1,66 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FUNCTION_NAME conv_s32_24t + +#define NSTACKWORDS (8) +#define STACK_VEC_TMP (NSTACKWORDS - 8) + +#define state r0 +#define coef r1 +#define buff r2 +#define _32 r3 + +.text +.issue_mode dual +.globl FUNCTION_NAME; +.type FUNCTION_NAME,@function +.align 16 +.cc_top FUNCTION_NAME.function,FUNCTION_NAME + +FUNCTION_NAME: // (int32_t * state, int32_t * coef) + dualentsp NSTACKWORDS +#if (defined(__XS3A__)) // Only available for XS3 with VPU + // r4 - r10 are not used here + + // Setting up the vpu and some constants + { ldaw buff, sp[STACK_VEC_TMP] ; ldc r11, 0 } + { ldc _32, 32 ; vsetc r11 } + { vclrdr ; mov r11, state } + + // Do convolution + { ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { ; vlmaccr coef[0] } + // vR [0 - 2] has 3 macc results, store them + { ; vstr buff[0] } + +#undef state +#define out r0 + +#undef coef +#define tmp0 r1 + +#undef _32 +#define tmp1 r3 + + // Load all the results and add them together + ldd out, tmp1, buff[0] + + { add out, out, tmp1 ; ldw tmp0, buff[2] } + { add out, out, tmp0 ; } +#endif // Only available for XS3 with VPU + retsp NSTACKWORDS + +.cc_bottom FUNCTION_NAME.function; +.set FUNCTION_NAME.nstackwords,NSTACKWORDS; .global FUNCTION_NAME.nstackwords; +.set FUNCTION_NAME.maxcores,1; .global FUNCTION_NAME.maxcores; +.set FUNCTION_NAME.maxtimers,0; .global FUNCTION_NAME.maxtimers; +.set FUNCTION_NAME.maxchanends,0; .global FUNCTION_NAME.maxchanends; + +#undef FUNCTION_NAME diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/conv_s32_32t.S b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/conv_s32_32t.S new file mode 100644 index 0000000..6c21abf --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/conv_s32_32t.S @@ -0,0 +1,71 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FUNCTION_NAME conv_s32_32t + +#define NSTACKWORDS (8) +#define STACK_VEC_TMP (NSTACKWORDS - 8) + +#define state r0 +#define coef r1 +#define buff r2 +#define _32 r3 + +.text +.issue_mode dual +.globl FUNCTION_NAME; +.type FUNCTION_NAME,@function +.align 16 +.cc_top FUNCTION_NAME.function,FUNCTION_NAME + +FUNCTION_NAME: // (int32_t * state, int32_t * coef) + dualentsp NSTACKWORDS +#if (defined(__XS3A__)) // Only available for XS3 with VPU + // r4 - r10 are not used here + + // Setting up the vpu and some constants + { ldaw buff, sp[STACK_VEC_TMP] ; ldc r11, 0 } + { ldc _32, 32 ; vsetc r11 } + { vclrdr ; mov r11, state } + + // Do convolution + { ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { ; vlmaccr coef[0] } + // vR [0 - 3] has 4 macc results, store them + { ; vstr buff[0] } + +#undef state +#define out r0 + +#undef coef +#define tmp0 r1 + +#undef _32 +#define tmp1 r3 + + // Load all the results and add them together + ldd out, tmp1, buff[0] + + { add out, out, tmp1 ; ldw tmp0, buff[2] } + { add out, out, tmp0 ; ldw tmp1, buff[3] } + { add out, out, tmp1 ; } +#endif // Only available for XS3 with VPU + retsp NSTACKWORDS + +.cc_bottom FUNCTION_NAME.function; +.set FUNCTION_NAME.nstackwords,NSTACKWORDS; .global FUNCTION_NAME.nstackwords; +.set FUNCTION_NAME.maxcores,1; .global FUNCTION_NAME.maxcores; +.set FUNCTION_NAME.maxtimers,0; .global FUNCTION_NAME.maxtimers; +.set FUNCTION_NAME.maxchanends,0; .global FUNCTION_NAME.maxchanends; + +#undef FUNCTION_NAME + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_24t.S b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_24t.S new file mode 100644 index 0000000..cae044d --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_24t.S @@ -0,0 +1,88 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FUNCTION_NAME fir_s32_24t + +#define NSTACKWORDS (1 + 8) +#define STACK_VEC_TMP (NSTACKWORDS - 8) + +#define state r0 +#define coef r1 +#define new_samp r2 +#define indx r3 +#define _32 r4 + +.text +.issue_mode dual +.globl FUNCTION_NAME; +.type FUNCTION_NAME,@function +.align 16 +.cc_top FUNCTION_NAME.function,FUNCTION_NAME + +FUNCTION_NAME: // (int32_t * state, int32_t * coef, int32_t new_samp) + dualentsp NSTACKWORDS +#if (defined(__XS3A__)) // Only available for XS3 with VPU + // r5 - r10 are not used here + + // Setting up the vpu and a poiter to the state[15] + { ldc r11, 0 ; stw r4, sp[0] } + { ldc indx, 15 ; vsetc r11 } + { ldc _32, 32 ; } + + ldaw r11, state[indx] // r11 -> st[15 - 23] + // It's possible to undef "state" and reuse r0 for "_32" to reduce stack but it does not bring much value + +#undef indx +#define buff r3 + + // It will shift the whole array with just 3 vldr + 3 vstr + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[16 - 24] // vR has st[15 - 23] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[7 - 15] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[8 - 16] // vR has st[7 - 15] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[-1 - 7] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[0 - 8] // vR has st[-1 - 7] + { ; vstr buff[0] } // buff has vR + + // Bring r11 back to state[0], clear the vector unit + { add r11, r11, 4 ; vclrdr } // r11 -> st[0] + + { ldaw buff, sp[STACK_VEC_TMP] ; stw new_samp, state[0] } // buff -> sp[10] // put new_samp in state[0] + + // Do convolution + { ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { ; vlmaccr coef[0] } + // vR [0 - 2] has 3 macc results, store them + { ; vstr buff[0] } + +#undef state +#define out r0 + +#undef coef +#define tmp0 r1 + +#undef new_samp +#define tmp1 r2 + + // Load all the results and add them together + ldd out, tmp1, buff[0] + + { add out, out, tmp1 ; ldw tmp0, buff[2] } + { add out, out, tmp0 ; ldw r4, sp[0] } +#endif // Only available for XS3 with VPU + retsp NSTACKWORDS + +.cc_bottom FUNCTION_NAME.function; +.set FUNCTION_NAME.nstackwords,NSTACKWORDS; .global FUNCTION_NAME.nstackwords; +.set FUNCTION_NAME.maxcores,1; .global FUNCTION_NAME.maxcores; +.set FUNCTION_NAME.maxtimers,0; .global FUNCTION_NAME.maxtimers; +.set FUNCTION_NAME.maxchanends,0; .global FUNCTION_NAME.maxchanends; + +#undef FUNCTION_NAME diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_32t.S b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_32t.S new file mode 100644 index 0000000..c2591a3 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_32t.S @@ -0,0 +1,96 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FUNCTION_NAME fir_s32_32t + +#define NSTACKWORDS (1 + 8) +#define STACK_VEC_TMP (NSTACKWORDS - 8) + +#define state r0 +#define coef r1 +#define new_samp r2 +#define indx r3 +#define _32 r4 + +.text +.issue_mode dual +.globl FUNCTION_NAME; +.type FUNCTION_NAME,@function +.align 16 +.cc_top FUNCTION_NAME.function,FUNCTION_NAME + +FUNCTION_NAME: // (int32_t * state, int32_t * coef, int32_t new_samp) + dualentsp NSTACKWORDS +#if (defined(__XS3A__)) // Only available for XS3 with VPU + + // r5 - r10 are not used here + + // Setting up the vpu and a poiter to the state[23] + { ldc r11, 0 ; stw r4, sp[0] } + { ldc indx, 23 ; vsetc r11 } + { ldc _32, 32 ; } + + ldaw r11, state[indx] // r11 -> st[23 - 31] + // It's possible to undef "state" and reuse r0 for "_32" to reduce stack but it does not bring much value + +#undef indx +#define buff r3 + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[24 - 32] // vR has st[23 - 31] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[15 - 23] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[16 - 24] // vR has st[15 - 23] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[7 - 15] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[8 - 16] // vR has st[7 - 15] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[-1 - 7] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[0 - 8] // vR has st[-1 - 7] + { ; vstr buff[0] } // buff has vR + + // Bring r11 back to state[0], clear the vector unit + { add r11, r11, 4 ; vclrdr } // r11 -> st[0] + + { ldaw buff, sp[STACK_VEC_TMP] ; stw new_samp, state[0] } // buff -> sp[10] // put new_samp in state[0] + + // Do convolution + { ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { ; vlmaccr coef[0] } + // vR [0 - 3] has 4 macc results, store them + { ; vstr buff[0] } + +#undef state +#define out r0 + +#undef coef +#define tmp0 r1 + +#undef new_samp +#define tmp1 r2 + + // Load all the results and add them together + ldd out, tmp1, buff[0] + + { add out, out, tmp1 ; ldw tmp0, buff[2] } + { add out, out, tmp0 ; ldw tmp1, buff[3] } + { add out, out, tmp1 ; ldw r4, sp[0] } +#endif // Only available for XS3 with VPU + retsp NSTACKWORDS + +.cc_bottom FUNCTION_NAME.function; +.set FUNCTION_NAME.nstackwords,NSTACKWORDS; .global FUNCTION_NAME.nstackwords; +.set FUNCTION_NAME.maxcores,1; .global FUNCTION_NAME.maxcores; +.set FUNCTION_NAME.maxtimers,0; .global FUNCTION_NAME.maxtimers; +.set FUNCTION_NAME.maxchanends,0; .global FUNCTION_NAME.maxchanends; + +#undef FUNCTION_NAME + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_48t.S b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_48t.S new file mode 100644 index 0000000..3036f04 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/fir_s32_48t.S @@ -0,0 +1,109 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FUNCTION_NAME fir_s32_48t + +#define NSTACKWORDS (1 + 8) +#define STACK_VEC_TMP (NSTACKWORDS - 8) + +#define state r0 +#define coef r1 +#define new_samp r2 +#define indx r3 +#define _32 r4 + +.text +.issue_mode dual +.globl FUNCTION_NAME; +.type FUNCTION_NAME,@function +.align 16 +.cc_top FUNCTION_NAME.function,FUNCTION_NAME + +FUNCTION_NAME: // (int32_t * state, int32_t * coef, int32_t new_samp) + dualentsp NSTACKWORDS +#if (defined(__XS3A__)) // Only available for XS3 with VPU + // r5 - r10 are not used here + + // Setting up the vpu and a poiter to the state[39] + { ldc r11, 0 ; stw r4, sp[0] } + { ldc indx, 39 ; vsetc r11 } + { ldc _32, 32 ; } + + ldaw r11, state[indx] // r11 -> st[39 - 47] + // It's possible to undef "state" and reuse r0 for "_32" to reduce stack but it does not bring much value + +#undef indx +#define buff r3 + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[40 - 48] // vR has st[39 - 47] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[31 - 39] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[32 - 40] // vR has st[31 - 39] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[23 - 31] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[24 - 32] // vR has st[23 - 31] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[15 - 23] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[16 - 24] // vR has st[15 - 23] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[7 - 15] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[8 - 16] // vR has st[7 - 15] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[-1 - 7] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[0 - 8] // vR has st[-1 - 7] + { ; vstr buff[0] } // buff has vR + + // Bring r11 back to state[0], clear the vector unit + { add r11, r11, 4 ; vclrdr } // r11 -> st[0] + + { ldaw buff, sp[STACK_VEC_TMP] ; stw new_samp, state[0] } // buff -> sp[10] // put new_samp in state[0] + + // Do convolution + { ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { add r11, r11, _32 ; vlmaccr coef[0] } + + { add coef, coef, _32 ; vldc r11[0] } + { ; vlmaccr coef[0] } + // vR [0 - 5] has 6 macc results, store them + { ; vstr buff[0] } + +#undef state +#define out r0 + +#undef coef +#define tmp0 r1 + +#undef new_samp +#define tmp1 r2 + + // Load all the results and add them together + ldd out, tmp1, buff[0] + + { add out, out, tmp1 ; ldw tmp0, buff[2] } + { add out, out, tmp0 ; ldw tmp1, buff[3] } + { add out, out, tmp1 ; ldw tmp0, buff[4] } + { add out, out, tmp0 ; ldw tmp1, buff[5] } + { add out, out, tmp1 ; ldw r4, sp[0] } +#endif // Only available for XS3 with VPU + retsp NSTACKWORDS + +.cc_bottom FUNCTION_NAME.function; +.set FUNCTION_NAME.nstackwords,NSTACKWORDS; .global FUNCTION_NAME.nstackwords; +.set FUNCTION_NAME.maxcores,1; .global FUNCTION_NAME.maxcores; +.set FUNCTION_NAME.maxtimers,0; .global FUNCTION_NAME.maxtimers; +.set FUNCTION_NAME.maxchanends,0; .global FUNCTION_NAME.maxchanends; + +#undef FUNCTION_NAME + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/push_s32_48t.S b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/push_s32_48t.S new file mode 100644 index 0000000..9a945b6 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/asm/push_s32_48t.S @@ -0,0 +1,65 @@ +// Copyright 2023-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FUNCTION_NAME push_s32_48t + +#define NSTACKWORDS (0) + +#define state r0 +#define new_samp r1 +#define indx r2 +#define _32 r3 + +.text +.issue_mode dual +.globl FUNCTION_NAME; +.type FUNCTION_NAME,@function +.align 16 +.cc_top FUNCTION_NAME.function,FUNCTION_NAME + +FUNCTION_NAME: // (int32_t * state, int32_t new_samp) + dualentsp NSTACKWORDS +#if (defined(__XS3A__)) // Only available for XS3 with VPU + + // r4 - r10 are not used here + + // Setting up the vpu and a poiter to the state[39] + { ldc _32, 32 ; ldc r11, 0 } + { ldc indx, 39 ; vsetc r11 } + { ldaw r11, state[indx] ; } // r11 -> st[39 - 47] + +#undef indx +#define buff r2 + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[40 - 48] // vR has st[39 - 47] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[31 - 39] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[32 - 40] // vR has st[31 - 39] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[23 - 31] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[24 - 32] // vR has st[23 - 31] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[15 - 23] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[16 - 24] // vR has st[15 - 23] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[7 - 15] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[8 - 16] // vR has st[7 - 15] + { sub r11, r11, _32 ; vstr buff[0] } // r11 -> st[-1 - 7] // buff has vR + + { add buff, r11, 4 ; vldr r11[0] } // buff -> st[0 - 8] // vR has st[-1 - 7] + { ; vstr buff[0] } // buff has vR + + // put new_samp in state[0] + { ; stw new_samp, state[0] } + +#endif // Only available for XS3 with VPU + retsp NSTACKWORDS + +.cc_bottom FUNCTION_NAME.function; +.set FUNCTION_NAME.nstackwords,NSTACKWORDS; .global FUNCTION_NAME.nstackwords; +.set FUNCTION_NAME.maxcores,1; .global FUNCTION_NAME.maxcores; +.set FUNCTION_NAME.maxtimers,0; .global FUNCTION_NAME.maxtimers; +.set FUNCTION_NAME.maxchanends,0; .global FUNCTION_NAME.maxchanends; + +#undef FUNCTION_NAME + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/src_ff3_fir_coefs.c b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_ff3_fir_coefs.c new file mode 100644 index 0000000..dcef970 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_ff3_fir_coefs.c @@ -0,0 +1,59 @@ +// Copyright 2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +/*********************************/ +/* AUTOGENERATED. DO NOT MODIFY! */ +/*********************************/ + +// Use src_ff3_fir_gen.py script to regenare this file +// python src_ff3_fir_gen.py -gc True -ntp 32 -np 3 + +#include "src_ff3_fir_coefs.h" +#include + +/** q31 coefficients to use for debugging ff3 sample rate conversion */ +const int32_t ALIGNMENT(8) src_ff3_fir_coefs_debug[SRC_FF3_FIR_NUM_PHASES * SRC_FF3_FIR_TAPS_PER_PHASE] = { + -132660, -391256, -272653, 294018, 790734, 513772, + -561508, -1423266, -881735, 972885, 2366363, 1416412, + -1572615, -3711773, -2165391, 2413069, 5568888, 3186277, + -3557131, -8071663, -4551171, 5083569, 11392367, 6355363, + -7097804, -15768801, -8734511, 9753621, 21559523, 11899941, + -13298806, -29362449, -16216509, 18178957, 40294588, 22394094, + -25305013, -56753765, -32043220, 36887788, 85009440, 49769829, + -60002604, -148154004, -96041427, 135812786, 454448559, 683203534, + 683203534, 454448559, 135812786, -96041427, -148154004, -60002604, + 49769829, 85009440, 36887788, -32043220, -56753765, -25305013, + 22394094, 40294588, 18178957, -16216509, -29362449, -13298806, + 11899941, 21559523, 9753621, -8734511, -15768801, -7097804, + 6355363, 11392367, 5083569, -4551171, -8071663, -3557131, + 3186277, 5568888, 2413069, -2165391, -3711773, -1572615, + 1416412, 2366363, 972885, -881735, -1423266, -561508, + 513772, 790734, 294018, -272653, -391256, -132660, + +}; + +/** q30 coefficients to use for the ff3 48 - 16 kHz polyphase FIR filtering */ +const int32_t ALIGNMENT(8) src_ff3_fir_coefs[SRC_FF3_FIR_NUM_PHASES][SRC_FF3_FIR_TAPS_PER_PHASE] = { + { + -136326, 256886, -440867, 708206, -1082695, 1593138, + -2275585, 3177682, -4367255, 5949971, -8108254, 11197047, + -16021610, 24884914, -48020712, 341601760, 67906392, -30001302, + 18443894, -12652507, 9089479, -6649403, 4876810, -3548902, + 2541785, -1778566, 1206534, -786307, 486442, -280754, + 147009, -66330,}, + { + -195628, 395367, -711633, 1183181, -1855886, 2784444, + -4035831, 5696184, -7884400, 10779762, -14681225, 20147294, + -28376882, 42504720, -74077000, 227224272, 227224272, -74077000, + 42504720, -28376882, 20147294, -14681225, 10779762, -7884400, + 5696184, -4035831, 2784444, -1855886, 1183181, -711633, + 395367, -195628,}, + { + -66330, 147009, -280754, 486442, -786307, 1206534, + -1778566, 2541785, -3548902, 4876810, -6649403, 9089479, + -12652507, 18443894, -30001302, 67906392, 341601760, -48020712, + 24884914, -16021610, 11197047, -8108254, 5949971, -4367255, + 3177682, -2275585, 1593138, -1082695, 708206, -440867, + 256886, -136326,}, +}; + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/src_ff3_fir_coefs.h b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_ff3_fir_coefs.h new file mode 100644 index 0000000..e5e40b2 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_ff3_fir_coefs.h @@ -0,0 +1,34 @@ +// Copyright 2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +/*********************************/ +/* AUTOGENERATED. DO NOT MODIFY! */ +/*********************************/ + +// Use src_ff3_fir_gen.py script to regenare this file +// python src_ff3_fir_gen.py -gc True -ntp 32 -np 3 + +#ifndef _SRC_FF3_COEFS_H_ +#define _SRC_FF3_COEFS_H_ + +#include + +#ifndef ALIGNMENT +# ifdef __xcore__ +# define ALIGNMENT(N) __attribute__((aligned (N))) +# else +# define ALIGNMENT(N) +# endif +#endif + +#define SRC_FF3_FIR_NUM_PHASES (3) +#define SRC_FF3_FIR_TAPS_PER_PHASE (32) + +/** q31 coefficients to use for debugging ff3 sample rate conversion */ +extern const int32_t src_ff3_fir_coefs_debug[SRC_FF3_FIR_NUM_PHASES * SRC_FF3_FIR_TAPS_PER_PHASE]; + +/** q30 coefficients to use for the ff3 48 - 16 kHz polyphase FIR filtering */ +extern const int32_t src_ff3_fir_coefs[SRC_FF3_FIR_NUM_PHASES][SRC_FF3_FIR_TAPS_PER_PHASE]; + +#endif // _SRC_FF3_COEFS_H_ + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/src_low_level.h b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_low_level.h new file mode 100644 index 0000000..f87e31d --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_low_level.h @@ -0,0 +1,70 @@ +// Copyright 2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#ifndef _SRC_LOW_LEVEL_H_ +#define _SRC_LOW_LEVEL_H_ + +/** + * @brief Perfoms VPU-optimised convolution for s32 type integers + * + * @param samples Samples array + * @param coef FIR coefficients array + * @note Both samples and coef has to have 24 values int32_t in them + * @note Both samples and coef have to be 8 bit aligned + */ +int32_t conv_s32_24t(const int32_t * samples, const int32_t * coef); + +/** + * @brief Perforns VPU-optimised FIR filtering for s32 type integers + * + * @param state State that keep previous samples + * @param coef FIR coefficients array + * @param new_samp New sample to put in the state + * @note Both state and coef has to have 24 values int32_t in them + * @note Both state and coef have to be 8 bit aligned + */ +int32_t fir_s32_24t(int32_t * state, const int32_t * coef, int32_t new_samp); + +/** + * @brief Perfoms VPU-optimised convolution for s32 type integers + * + * @param samples Samples array + * @param coef FIR coefficients array + * @note Both samples and coef has to have 32 values int32_t in them + * @note Both samples and coef have to be 8 bit aligned + */ +int32_t conv_s32_32t(const int32_t * samples, const int32_t * coef); + +/** + * @brief Perforns VPU-optimised FIR filtering for s32 type integers + * + * @param state State that keep previous samples + * @param coef FIR coefficients array + * @param new_samp New sample to put in the state + * @note Both state and coef has to have 32 values int32_t in them + * @note Both state and coef have to be 8 bit aligned + */ +int32_t fir_s32_32t(int32_t * state, const int32_t * coef, int32_t new_samp); + +/** + * @brief Perforns VPU-optimised ring buffer shift for s32 type integers + * + * @param state State that keep previous samples + * @param new_samp New sample to put in the state + * @note Both state and coef has to have 48 values int32_t in them + * @note Both state and coef have to be 8 bit aligned + */ +void push_s32_48t(int32_t * state, int32_t new_samp); + +/** + * @brief Perforns VPU-optimised FIR filtering for s32 type integers + * + * @param state State that keep previous samples + * @param coef FIR coefficients array + * @param new_samp New sample to put in the state + * @note Both state and coef has to have 48 values int32_t in them + * @note Both state and coef have to be 8 bit aligned + */ +int32_t fir_s32_48t(int32_t * state, const int32_t * coef, int32_t new_samp); + +#endif // _SRC_LOW_LEVEL_H_ diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/src_poly.h b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_poly.h new file mode 100644 index 0000000..14549e7 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_poly.h @@ -0,0 +1,154 @@ +// Copyright 2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#ifndef _SRC_POLY_VPU_H_ +#define _SRC_POLY_VPU_H_ + +#include "stdint.h" +#include "src_low_level.h" + +// If you want to undestand any of this better, +// read Richard G. Lyons "Understanding digital signal processing" +// capters 10.1 - 10.7, 10.10 - 10.11 + + + +/** + * @brief Performs VPU-optimised 72 taps polyphase fixed-factor-of-3 downsampling + * + * @param samp_in Values to be downsampled + * @param samp_out Downsampled output + * @param coefs_ff3 Three-phase FIR coefficients array with [3][24] dimensions + * @param state_ds Three-phase FIR state array with [3][24] dimensions + */ +static inline void src_ff3_72t_ds(int32_t samp_in[3], int32_t samp_out[1], const int32_t coefs_ff3[3][24], int32_t state_ds[3][24]) +{ + int64_t acc = 0; + acc += fir_s32_24t(state_ds[0], coefs_ff3[0], samp_in[0]); + acc += fir_s32_24t(state_ds[1], coefs_ff3[1], samp_in[1]); + acc += fir_s32_24t(state_ds[2], coefs_ff3[2], samp_in[2]); + + samp_out[0] = (int32_t)acc; +} + +/** + * @brief Performs VPU-optimised 72 taps polyphase fixed-factor-of-3 upsampling + * + * @param samp_in Value to be upsampled + * @param samp_out Upsampled output + * @param coefs_ff3 Three-phase FIR coefficients array with [3][24] dimensions + * @param state_us FIR state array with 24 elements in it + * @note samp_in and samp_out have to be different memory locations + */ +static inline void src_ff3_72t_us(int32_t samp_in[1], int32_t samp_out[3], const int32_t coefs_ff3[3][24], int32_t state_us[24]) +{ + samp_out[0] = fir_s32_24t(state_us, coefs_ff3[2], samp_in[0]) * 3; + samp_out[1] = conv_s32_24t(state_us, coefs_ff3[1]) * 3; + samp_out[2] = conv_s32_24t(state_us, coefs_ff3[0]) * 3; +} + + +/** + * \addtogroup src_ff3_96t_ds src_ff3_96t_ds + * + * The public API for using SRC. + * @{ + */ + +/** + * @brief Performs VPU-optimised 96 taps polyphase fixed-factor-of-3 downsampling + * + * @param samp_in Values to be downsampled + * @param samp_out Downsampled output + * @param coefs_ff3 Three-phase FIR coefficients array with [3][32] dimensions + * @param state_ds Three-phase FIR state array with [3][32] dimensions + */ +static inline void src_ff3_96t_ds(int32_t samp_in[3], int32_t samp_out[1], const int32_t coefs_ff3[3][32], int32_t state_ds[3][32]) +{ + int64_t acc = 0; + acc += fir_s32_32t(state_ds[0], coefs_ff3[0], samp_in[0]); + acc += fir_s32_32t(state_ds[1], coefs_ff3[1], samp_in[1]); + acc += fir_s32_32t(state_ds[2], coefs_ff3[2], samp_in[2]); + + samp_out[0] = (int32_t)acc; +} + +/**@}*/ // END: addtogroup src_ff3_96t_ds + +/** + * \addtogroup src_ff3_96t_us src_ff3_96t_us + * + * The public API for using SRC. + * @{ + */ + +/** + * @brief Performs VPU-optimised 96 taps polyphase fixed-factor-of-3 upsampling + * + * @param samp_in Value to be upsampled + * @param samp_out Upsampled output + * @param coefs_ff3 Three-phase FIR coefficients array with [3][32] dimensions + * @param state_us FIR state array with 32 elements in it + * @note samp_in and samp_out have to be different memory locations + */ +static inline void src_ff3_96t_us(int32_t samp_in[1], int32_t samp_out[3], const int32_t coefs_ff3[3][32], int32_t state_us[32]) +{ + samp_out[0] = fir_s32_32t(state_us, coefs_ff3[2], samp_in[0]) * 3; + samp_out[1] = conv_s32_32t(state_us, coefs_ff3[1]) * 3; + samp_out[2] = conv_s32_32t(state_us, coefs_ff3[0]) * 3; +} + +/**@}*/ // END: addtogroup src_ff3_96t_us + + +/** + * \addtogroup src_rat_2_3_96t_ds src_rat_2_3_96t_ds + * + * The public API for using SRC. + * @{ + */ + +/** + * @brief Performs VPU-optimised 96 taps polyphase rational factor 2/3 downsampling + * + * @param samp_in Values to be downsampled + * @param samp_out Downsampled output + * @param coefs_ds Two-phase FIR coefficients array with [2][48] dimensions + * @param state_ds FIR state array with 48 elements in it + */ +static inline void src_rat_2_3_96t_ds(int32_t samp_in[3], int32_t samp_out[2], const int32_t coefs_ds[2][48], int32_t state_ds[48]) +{ + push_s32_48t(state_ds, samp_in[0]); + samp_out[0] = fir_s32_48t(state_ds, coefs_ds[0], samp_in[1]) * 2; + samp_out[1] = fir_s32_48t(state_ds, coefs_ds[1], samp_in[2]) * 2; +} + +/**@}*/ // END: addtogroup src_rat_2_3_96t_ds + + +/** + * \addtogroup src_rat_3_2_96t_us src_rat_3_2_96t_us + * + * The public API for using SRC. + * @{ + */ + +/** + * @brief Performs VPU-optimised 96 taps polyphase rational factor 3/2 upsampling + * + * @param samp_in Values to be upsampled + * @param samp_out Upsampled output + * @param coefs_us Three-phase FIR coefficients array with [3][32] dimensions + * @param state_us FIR state array with 32 elements in it + * @note samp_in and samp_out have to be different memory locations + */ +static inline void src_rat_3_2_96t_us(int32_t samp_in[2], int32_t samp_out[3], const int32_t coefs_us[3][32], int32_t state_us[32]) +{ + samp_out[0] = fir_s32_32t(state_us, coefs_us[0], samp_in[0]) * 3; + samp_out[1] = conv_s32_32t(state_us, coefs_us[2]) * 3; + samp_out[2] = fir_s32_32t(state_us, coefs_us[1], samp_in[1]) * 3; +} + +/**@}*/ // END: addtogroup src_rat_3_2_96t_us + +#endif // _SRC_POLY_VPU_H_ diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/src_rat_fir_coefs.c b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_rat_fir_coefs.c new file mode 100644 index 0000000..e1d3882 --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_rat_fir_coefs.c @@ -0,0 +1,64 @@ +// Copyright 2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +/*********************************/ +/* AUTOGENERATED. DO NOT MODIFY! */ +/*********************************/ + +// Use src_rat_fir_gen.py script to regenare this file +// python src_rat_fir_gen.py -gc True -nt 96 + +#include "src_rat_fir_coefs.h" +#include + +/** q30 coefficients to use for the 48 -> 32 kHz polyphase rational factor downsampling */ +const int32_t ALIGNMENT(8) src_rat_fir_ds_coefs[SRC_RAT_FIR_NUM_PHASES_DS][SRC_RAT_FIR_TAPS_PER_PHASE_DS] = { + { + -37518, -12954, 215278, -239478, -263107, 939176, + -724308, -879964, 2499126, -1681211, -2092592, 5401196, + -3401730, -4251005, 10510310, -6447506, -8092907, 19936433, + -12408241, -16117127, 42378484, -29745967, -48209846, 227198230, + 341824286, 67661646, -73999660, 25030944, 18189153, -28205672, + 11237632, 8863615, -14437276, 5881230, 4701938, -7597786, + 3022648, 2420957, -3741363, 1394185, 1128882, -1587718, + 513087, 436331, -497504, 103937, 112484, -52024, + }, + { + -52024, 112484, 103937, -497504, 436331, 513087, + -1587718, 1128882, 1394185, -3741363, 2420957, 3022648, + -7597786, 4701938, 5881230, -14437276, 8863615, 11237632, + -28205672, 18189153, 25030944, -73999660, 67661646, 341824286, + 227198230, -48209846, -29745967, 42378484, -16117127, -12408241, + 19936433, -8092907, -6447506, 10510310, -4251005, -3401730, + 5401196, -2092592, -1681211, 2499126, -879964, -724308, + 939176, -263107, -239478, 215278, -12954, -37518, + }, + +}; + +/** q30 coefficients to use for the 32 -> 48 kHz polyphase rational factor upsampling */ +const int32_t ALIGNMENT(8) src_rat_fir_us_coefs[SRC_RAT_FIR_NUM_PHASES_US][SRC_RAT_FIR_TAPS_PER_PHASE_US] = { + { + -37518, 112484, -239478, 436331, -724308, 1128882, + -1681211, 2420957, -3401730, 4701938, -6447506, 8863615, + -12408241, 18189153, -29745967, 67661646, 341824286, -48209846, + 25030944, -16117127, 11237632, -8092907, 5881230, -4251005, + 3022648, -2092592, 1394185, -879964, 513087, -263107, + 103937, -12954,}, + { + -52024, 215278, -497504, 939176, -1587718, 2499126, + -3741363, 5401196, -7597786, 10510310, -14437276, 19936433, + -28205672, 42378484, -73999660, 227198230, 227198230, -73999660, + 42378484, -28205672, 19936433, -14437276, 10510310, -7597786, + 5401196, -3741363, 2499126, -1587718, 939176, -497504, + 215278, -52024,}, + { + -12954, 103937, -263107, 513087, -879964, 1394185, + -2092592, 3022648, -4251005, 5881230, -8092907, 11237632, + -16117127, 25030944, -48209846, 341824286, 67661646, -29745967, + 18189153, -12408241, 8863615, -6447506, 4701938, -3401730, + 2420957, -1681211, 1128882, -724308, 436331, -239478, + 112484, -37518,}, + +}; + diff --git a/lib_src/lib_src/src/fixed_factor_vpu_voice/src_rat_fir_coefs.h b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_rat_fir_coefs.h new file mode 100644 index 0000000..730a94e --- /dev/null +++ b/lib_src/lib_src/src/fixed_factor_vpu_voice/src_rat_fir_coefs.h @@ -0,0 +1,37 @@ +// Copyright 2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +/*********************************/ +/* AUTOGENERATED. DO NOT MODIFY! */ +/*********************************/ + +// Use src_rat_fir_gen.py script to regenare this file +// python src_rat_fir_gen.py -gc True -nt 96 + +#ifndef _SRC_RAT_COEFS_H_ +#define _SRC_RAT_COEFS_H_ + +#include + +#ifndef ALIGNMENT +# ifdef __xcore__ +# define ALIGNMENT(N) __attribute__((aligned (N))) +# else +# define ALIGNMENT(N) +# endif +#endif + +#define SRC_RAT_FIR_NUM_TAPS (96) +#define SRC_RAT_FIR_NUM_PHASES_DS (2) +#define SRC_RAT_FIR_TAPS_PER_PHASE_DS (48) +#define SRC_RAT_FIR_NUM_PHASES_US (3) +#define SRC_RAT_FIR_TAPS_PER_PHASE_US (32) + +/** q30 coefficients to use for the 48 -> 32 kHz polyphase rational factor downsampling */ +extern const int32_t src_rat_fir_ds_coefs[SRC_RAT_FIR_NUM_PHASES_DS][SRC_RAT_FIR_TAPS_PER_PHASE_DS]; + +/** q30 coefficients to use for the 32 -> 48 kHz polyphase rational factor upsampling */ +extern const int32_t src_rat_fir_us_coefs[SRC_RAT_FIR_NUM_PHASES_US][SRC_RAT_FIR_TAPS_PER_PHASE_US]; + +#endif // _SRC_RAT_COEFS_H_ + diff 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-8594514, + 7641083, + 28433200, + -23033874, + 18374698, + -14386944, + 11011273, + -8190637, + 5872419, + -4002844, + -6638802, + 5635772, + -4670739, + 3772536, + -2960767, + 2248225, + -1642174, + 1140300, + 2529989, + -1403146, + 572122, + 11311, + -391670, + 610188, + -706745, + 711275, + -744123, + 430786, + -231365, + 23334, + -55371, + -486601, + 78790, + 45708, + -662347, + 560238, + -495493, + 319514, + -505401, + -157243, + 104359, + 8168 + + diff --git a/lib_src/lib_src/src/multirate_hifi/FilterData/scale_dat.py b/lib_src/lib_src/src/multirate_hifi/FilterData/scale_dat.py new file mode 100644 index 0000000..b499604 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/FilterData/scale_dat.py @@ -0,0 +1,17 @@ +from argparse import ArgumentParser +from pathlib import Path + +parse = ArgumentParser() + +parse.add_argument("SCALE_FACTOR", type=float, help="number to scale all the filters by") +args = parse.parse_args() + + +for filepath in Path(__file__).parent.glob("*.dat"): + data_txt = filepath.read_text() + data = list(float(d.strip()) for d in data_txt.strip().split(",") if len(d)) + data = [int(round(args.SCALE_FACTOR * i)) for i in data] + data = " " + ",\n ".join(str(d) for d in data) + "\n\n\n" + filepath.write_text(data) + + diff --git a/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc.c b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc.c new file mode 100644 index 0000000..679e4d5 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc.c @@ -0,0 +1,732 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// File: asrc.c +// +// +// Top level implementation file for the ASRC +// +// =========================================================================== +// =========================================================================== + + +// =========================================================================== +// +// Includes +// +// =========================================================================== +#include +#include +#include +#include + +#include "use_vpu.h" + +// Integer arithmetic include +#include "src_mrhf_int_arithmetic.h" +// ASRC include +#include "src.h" + +// =========================================================================== +// +// Defines +// +// =========================================================================== + + +// State init value +#define ASRC_STATE_INIT 0 + +// Nominal Fs Ratio values +#define ASRC_FS_44_F (44100.0) +#define ASRC_FS_48_F (48000.0) +#define ASRC_FS_88_F (88200.0) +#define ASRC_FS_96_F (96000.0) +#define ASRC_FS_176_F (176400.0) +#define ASRC_FS_192_F (192000.0) + +#define ASRC_FS_RATIO_44_44 (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_44_44_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_44_48 (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_44_48_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_44_88 (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_44_88_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_44_96 (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_44_96_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_44_176 (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_44_176_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_44_192 (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_44_192_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_44_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) + +#define ASRC_FS_RATIO_48_44 (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_48_44_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_48_48 (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_48_48_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_48_88 (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_48_88_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_48_96 (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_48_96_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_48_176 (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_48_176_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_48_192 (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_48_192_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_48_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) + +#define ASRC_FS_RATIO_88_44 (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_88_44_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_88_48 (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_88_48_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_88_88 (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_88_88_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_88_96 (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_88_96_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_88_176 (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_88_176_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_88_192 (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_88_192_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_88_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) + +#define ASRC_FS_RATIO_96_44 (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_96_44_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_96_48 (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_96_48_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_96_88 (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_96_88_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_96_96 (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_96_96_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_96_176 (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_96_176_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_96_192 (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_96_192_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_96_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) + +#define ASRC_FS_RATIO_176_44 (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_176_44_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_176_48 (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_176_48_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_176_88 (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_176_88_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_176_96 (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_176_96_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_176_176 (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_176_176_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_176_192 (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_176_192_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_176_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) + +#define ASRC_FS_RATIO_192_44 (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_192_44_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_44_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_192_48 (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_192_48_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_48_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_192_88 (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_192_88_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_88_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_192_96 (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_192_96_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_96_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_192_176 (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_192_176_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_176_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) +#define ASRC_FS_RATIO_192_192 (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32))) >> 32) +#define ASRC_FS_RATIO_192_192_LO (uint32_t)((unsigned long long)(((double)ASRC_FS_192_F / ASRC_FS_192_F) * ((unsigned long long)1 << (ASRC_FS_RATIO_UNIT_BIT + 32)))) + +#define ASRC_FS_RATIO_MIN_FACTOR (0.99) +#define ASRC_FS_RATIO_MAX_FACTOR (1.01) + +#define ASRC_ADFIR_INITIAL_PHASE 32 + +// Time ratio shift values +#define ASRC_FS_RATIO_PHASE_N_BITS 7 +#define ASRC_FS_RATIO_BASE_SHIFT (ASRC_FS_RATIO_UNIT_BIT - ASRC_FS_RATIO_PHASE_N_BITS) +#define ASRC_FS_RATIO_SHIFT_M1 (ASRC_FS_RATIO_BASE_SHIFT + 1) +#define ASRC_FS_RATIO_SHIFT_0 (ASRC_FS_RATIO_BASE_SHIFT) +#define ASRC_FS_RATIO_SHIFT_P1 (ASRC_FS_RATIO_BASE_SHIFT - 1) + + +// Random number generator / dithering +#define ASRC_R_CONS 32767 +#define ASRC_R_BASE 1664525 +#define ASRC_RPDF_BITS_SHIFT 16 // Shift to select bits in pseudo-random number +#define ASRC_RPDF_MASK 0x0000007F // For dithering at 24bits (in 2.30) +#define ASRC_DATA24_MASK 0xFFFFFF00 // Mask for 24bits data (once rescaled to 1.31) +#define ASRC_DITHER_BIAS 0xFFFFFFC0 // TPDF dither bias for compensating masking at 24bits but expressed in 2.30 + + +// =========================================================================== +// +// Variables +// +// =========================================================================== + +ASRCFiltersIDs_t sASRCFiltersIDs[ASRC_N_FS][ASRC_N_FS] = // Filter configuration table [Fsin][Fsout] +{ + { // Fsin = 44.1kHz + // F1 F2 + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 44.1kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 48kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 88.2kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 96kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 176.4kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}} // Fsout = 192kHz + }, + { // Fsin = 48kHz + // F1 F2 + {{FILTER_DEFS_ASRC_FIR_UP4844_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 44.1kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 48kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 88.2kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 96kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 176.4kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}} // Fsout = 192kHz + }, + { // Fsin = 88.2kHz + // F1 F2 + {{FILTER_DEFS_ASRC_FIR_BL_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 44.1kHz + {{FILTER_DEFS_ASRC_FIR_BL8848_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 48kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 88.2kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 96kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 176.4kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}} // Fsout = 192kHz + }, + { // Fsin = 96kHz + // F1 F2 + {{FILTER_DEFS_ASRC_FIR_BL9644_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 44.1kHz + {{FILTER_DEFS_ASRC_FIR_BL_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 48kHz + {{FILTER_DEFS_ASRC_FIR_UP4844_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 88.2kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 96kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 176.4kHz + {{FILTER_DEFS_ASRC_FIR_UP_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}} // Fsout = 192kHz + }, + { // Fsin = 176.4kHz + // F1 F2 + {{FILTER_DEFS_ASRC_FIR_DS_ID, FILTER_DEFS_ASRC_FIR_BL_ID}}, // Fsout = 44.1kHz + {{FILTER_DEFS_ASRC_FIR_DS_ID, FILTER_DEFS_ASRC_FIR_BL8848_ID}}, // Fsout = 48kHz + {{FITLER_DEFS_ASRC_FIR_BLF_ID, FILTER_DEFS_ASRC_FIR_NONE_ID,}}, // Fsout = 88.2kHz + {{FILTER_DEFS_ASRC_FIR_BL17696_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 96kHz + {{FILTER_DEFS_ASRC_FIR_UPF_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 176.4kHz + {{FILTER_DEFS_ASRC_FIR_UPF_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}} // Fsout = 192kHz + }, + { // Fsin = 192kHz + // F1 F2 + {{FILTER_DEFS_ASRC_FIR_DS_ID, FILTER_DEFS_ASRC_FIR_BL9644_ID}}, // Fsout = 44.1kHz + {{FILTER_DEFS_ASRC_FIR_DS_ID, FILTER_DEFS_ASRC_FIR_BL_ID}}, // Fsout = 48kHz + {{FITLER_DEFS_ASRC_FIR_BL19288_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 88.2kHz + {{FITLER_DEFS_ASRC_FIR_BLF_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 96kHz + {{FILTER_DEFS_ASRC_FIR_UP192176_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}}, // Fsout = 176.4kHz + {{FILTER_DEFS_ASRC_FIR_UPF_ID, FILTER_DEFS_ASRC_FIR_NONE_ID}} // Fsout = 192kHz + } +}; + + +ASRCFsRatioConfigs_t sFsRatioConfigs[ASRC_N_FS][ASRC_N_FS] = // Fs ratio configuration table [Fsin][Fsout] +{ + { // Fsin = 44.1kHz + // Nominal Fs Ratio // Minimal Fs Ratio // Maximal Fs Ratio Shift for time step + {ASRC_FS_RATIO_44_44, ASRC_FS_RATIO_44_44_LO, (unsigned int)(ASRC_FS_RATIO_44_44 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_44_44 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 44.1kHz + {ASRC_FS_RATIO_44_48, ASRC_FS_RATIO_44_48_LO, (unsigned int)(ASRC_FS_RATIO_44_48 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_44_48 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 48kHz + {ASRC_FS_RATIO_44_88, ASRC_FS_RATIO_44_88_LO, (unsigned int)(ASRC_FS_RATIO_44_88 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_44_88 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 88.2kHz + {ASRC_FS_RATIO_44_96, ASRC_FS_RATIO_44_96_LO, (unsigned int)(ASRC_FS_RATIO_44_96 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_44_96 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 96kHz + {ASRC_FS_RATIO_44_176, ASRC_FS_RATIO_44_176_LO, (unsigned int)(ASRC_FS_RATIO_44_176 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_44_176 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 176.4kHz + {ASRC_FS_RATIO_44_192, ASRC_FS_RATIO_44_192_LO, (unsigned int)(ASRC_FS_RATIO_44_192 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_44_192 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1} // Fsout = 192kHz + }, + { // Fsin = 48kHz + // Nominal Fs Ratio // Minimal Fs Ratio // Maximal Fs Ratio Shift for time step + {ASRC_FS_RATIO_48_44, ASRC_FS_RATIO_48_44_LO, (unsigned int)(ASRC_FS_RATIO_48_44 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_48_44 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 44.1kHz + {ASRC_FS_RATIO_48_48, ASRC_FS_RATIO_48_48_LO, (unsigned int)(ASRC_FS_RATIO_48_48 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_48_48 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 48kHz + {ASRC_FS_RATIO_48_88, ASRC_FS_RATIO_48_88_LO, (unsigned int)(ASRC_FS_RATIO_48_88 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_48_88 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 88.2kHz + {ASRC_FS_RATIO_48_96, ASRC_FS_RATIO_48_96_LO, (unsigned int)(ASRC_FS_RATIO_48_96 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_48_96 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 96kHz + {ASRC_FS_RATIO_48_176, ASRC_FS_RATIO_48_176_LO, (unsigned int)(ASRC_FS_RATIO_48_176 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_48_176 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 176.4kHz + {ASRC_FS_RATIO_48_192, ASRC_FS_RATIO_48_192_LO, (unsigned int)(ASRC_FS_RATIO_48_192 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_48_192 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1} // Fsout = 192kHz + }, + { // Fsin = 88.2kHz + // Nominal Fs Ratio // Minimal Fs Ratio // Maximal Fs Ratio Shift for time step + {ASRC_FS_RATIO_88_44, ASRC_FS_RATIO_88_44_LO, (unsigned int)(ASRC_FS_RATIO_88_44 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_88_44 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 44.1kHz + {ASRC_FS_RATIO_88_48, ASRC_FS_RATIO_88_48_LO, (unsigned int)(ASRC_FS_RATIO_88_48 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_88_48 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 48kHz + {ASRC_FS_RATIO_88_88, ASRC_FS_RATIO_88_88_LO, (unsigned int)(ASRC_FS_RATIO_88_88 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_88_88 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 88.2kHz + {ASRC_FS_RATIO_88_96, ASRC_FS_RATIO_88_96_LO, (unsigned int)(ASRC_FS_RATIO_88_96 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_88_96 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 96kHz + {ASRC_FS_RATIO_88_176, ASRC_FS_RATIO_88_176_LO, (unsigned int)(ASRC_FS_RATIO_88_176 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_88_176 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 176.4kHz + {ASRC_FS_RATIO_88_192, ASRC_FS_RATIO_88_192_LO, (unsigned int)(ASRC_FS_RATIO_88_192 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_88_192 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1} // Fsout = 192kHz + }, + { // Fsin = 96kHz + // Nominal Fs Ratio // Minimal Fs Ratio // Maximal Fs Ratio Shift for time step + {ASRC_FS_RATIO_96_44, ASRC_FS_RATIO_96_44_LO, (unsigned int)(ASRC_FS_RATIO_96_44 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_96_44 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 44.1kHz + {ASRC_FS_RATIO_96_48, ASRC_FS_RATIO_96_48_LO, (unsigned int)(ASRC_FS_RATIO_96_48 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_96_48 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 48kHz + {ASRC_FS_RATIO_96_88, ASRC_FS_RATIO_96_88_LO, (unsigned int)(ASRC_FS_RATIO_96_88 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_96_88 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 88.2kHz + {ASRC_FS_RATIO_96_96, ASRC_FS_RATIO_96_96_LO, (unsigned int)(ASRC_FS_RATIO_96_96 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_96_96 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 96kHz + {ASRC_FS_RATIO_96_176, ASRC_FS_RATIO_96_176_LO, (unsigned int)(ASRC_FS_RATIO_96_176 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_96_176 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 176.4kHz + {ASRC_FS_RATIO_96_192, ASRC_FS_RATIO_96_192_LO, (unsigned int)(ASRC_FS_RATIO_96_192 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_96_192 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1} // Fsout = 192kHz + }, + { // Fsin = 176.4kHz + // Nominal Fs Ratio // Minimal Fs Ratio // Maximal Fs Ratio Shift for time step + {ASRC_FS_RATIO_176_44, ASRC_FS_RATIO_176_44_LO, (unsigned int)(ASRC_FS_RATIO_176_44 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_176_44 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_M1}, // Fsout = 44.1kHz + {ASRC_FS_RATIO_176_48, ASRC_FS_RATIO_176_48_LO, (unsigned int)(ASRC_FS_RATIO_176_48 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_176_48 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_M1}, // Fsout = 48kHz + {ASRC_FS_RATIO_176_88, ASRC_FS_RATIO_176_88_LO, (unsigned int)(ASRC_FS_RATIO_176_88 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_176_88 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 88.2kHz + {ASRC_FS_RATIO_176_96, ASRC_FS_RATIO_176_96_LO, (unsigned int)(ASRC_FS_RATIO_176_96 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_176_96 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 96kHz + {ASRC_FS_RATIO_176_176, ASRC_FS_RATIO_176_176_LO, (unsigned int)(ASRC_FS_RATIO_176_176 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_176_176 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 176.4kHz + {ASRC_FS_RATIO_176_192, ASRC_FS_RATIO_176_192_LO, (unsigned int)(ASRC_FS_RATIO_176_192 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_176_192 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1} // Fsout = 192kHz + }, + { // Fsin = 192kHz + // Nominal Fs Ratio // Minimal Fs Ratio // Maximal Fs Ratio Shift for time step + {ASRC_FS_RATIO_192_44, ASRC_FS_RATIO_192_44_LO, (unsigned int)(ASRC_FS_RATIO_192_44 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_192_44 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_M1}, // Fsout = 44.1kHz + {ASRC_FS_RATIO_192_48, ASRC_FS_RATIO_192_48_LO, (unsigned int)(ASRC_FS_RATIO_192_48 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_192_48 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_M1}, // Fsout = 48kHz + {ASRC_FS_RATIO_192_88, ASRC_FS_RATIO_192_88_LO, (unsigned int)(ASRC_FS_RATIO_192_88 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_192_88 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 88.2kHz + {ASRC_FS_RATIO_192_96, ASRC_FS_RATIO_192_96_LO, (unsigned int)(ASRC_FS_RATIO_192_96 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_192_96 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_0}, // Fsout = 96kHz + {ASRC_FS_RATIO_192_176, ASRC_FS_RATIO_192_176_LO, (unsigned int)(ASRC_FS_RATIO_192_176 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_192_176 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1}, // Fsout = 176.4kHz + {ASRC_FS_RATIO_192_192, ASRC_FS_RATIO_192_192_LO, (unsigned int)(ASRC_FS_RATIO_192_192 * ASRC_FS_RATIO_MIN_FACTOR), (unsigned int)(ASRC_FS_RATIO_192_192 * ASRC_FS_RATIO_MAX_FACTOR), ASRC_FS_RATIO_SHIFT_P1} // Fsout = 192kHz + } +}; + +// =========================================================================== +// +// Local Functions prototypes +// +// =========================================================================== + + + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + +#if SRC_USE_VPU +#define xs3_index_shuffle(a,b) [(b)^7][a] +#else +#define xs3_index_shuffle(a,b) [a][b] +#endif + +// ==================================================================== // +// Function: ASRC_prepare_coefs // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Prepares the ASRC coefficients from the prototype // +// Needs to be called only once // +// ==================================================================== // +ASRCReturnCodes_t ASRC_prepare_coefs(void) +{ + unsigned int ui, uj; + int* piPrototypeCoefs = iADFirPrototypeCoefs + FILTER_DEFS_ADFIR_PROTOTYPE_N_TAPS - FILTER_DEFS_ADFIR_N_PHASES; + + // First fill in the phases which start normally + for(ui = 0; ui < FILTER_DEFS_ADFIR_N_PHASES; ui++) + { + // Copy phase information + for(uj = 0; uj < FILTER_DEFS_ADFIR_PHASE_N_TAPS - 1; uj++) + iADFirCoefs xs3_index_shuffle(ui, uj) = *(piPrototypeCoefs + ui - uj * FILTER_DEFS_ADFIR_N_PHASES); + // Zero fill last coefficient + iADFirCoefs xs3_index_shuffle(ui, FILTER_DEFS_ADFIR_PHASE_N_TAPS - 1) = 0; + } + + // Then fill in the two phases which start delayed + for(ui = 0; ui < 2; ui++) + { + // Zero fill first coefficient + iADFirCoefs xs3_index_shuffle(FILTER_DEFS_ADFIR_N_PHASES + ui, 0) = 0; + // Copy phase informaiton + for(uj = 0; uj < FILTER_DEFS_ADFIR_PHASE_N_TAPS - 1; uj++) + iADFirCoefs xs3_index_shuffle(FILTER_DEFS_ADFIR_N_PHASES + ui,uj + 1) = *(piPrototypeCoefs + ui - uj * FILTER_DEFS_ADFIR_N_PHASES); + } + + return ASRC_NO_ERROR; +} + +// ==================================================================== // +// Function: ASRC_init // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Inits the ASRC passed as argument // +// ==================================================================== // +ASRCReturnCodes_t ASRC_init(asrc_ctrl_t* pasrc_ctrl) +{ + ASRCFiltersIDs_t* psFiltersID; + FIRDescriptor_t* psFIRDescriptor; + ADFIRDescriptor_t* psADFIRDescriptor; + + + // Check if state is allocated + if(pasrc_ctrl->psState == 0) + return ASRC_ERROR; + + // Check if stack is allocated + if(pasrc_ctrl->piStack == 0) + return ASRC_ERROR; + + // Check if valid Fsin and Fsout have been provided + if( (pasrc_ctrl->eInFs < ASRC_FS_MIN) || (pasrc_ctrl->eInFs > ASRC_FS_MAX)) + return ASRC_ERROR; + if( (pasrc_ctrl->eOutFs < ASRC_FS_MIN) || (pasrc_ctrl->eOutFs > ASRC_FS_MAX)) + return ASRC_ERROR; + + // Set nominal fs ratio + pasrc_ctrl->uiFsRatio = sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].uiNominalFsRatio; + pasrc_ctrl->uiFsRatio_lo = sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].uiNominalFsRatio_lo; + + // Check that number of input samples is allocated and is a multiple of 4 + if(pasrc_ctrl->uiNInSamples == 0) + return ASRC_ERROR; + if((pasrc_ctrl->uiNInSamples & 0x3) != 0x0) + return ASRC_ERROR; + + // Load filters ID and number of samples + psFiltersID = &sASRCFiltersIDs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs]; + + + // Configure filters F1 and F2 from filters ID and number of samples + + // Filter F1 + // --------- + psFIRDescriptor = &sASRCFirDescriptor[psFiltersID->uiFID[ASRC_F1_INDEX]]; + // Set number of input samples and input samples step + pasrc_ctrl->sFIRF1Ctrl.uiNInSamples = pasrc_ctrl->uiNInSamples; + pasrc_ctrl->sFIRF1Ctrl.uiInStep = pasrc_ctrl->uiNchannels; + // Set delay line base pointer + if( psFiltersID->uiFID[ASRC_F1_INDEX] == FILTER_DEFS_ASRC_FIR_DS_ID ) + pasrc_ctrl->sFIRF1Ctrl.piDelayB = pasrc_ctrl->psState->iDelayFIRShort; + else + pasrc_ctrl->sFIRF1Ctrl.piDelayB = pasrc_ctrl->psState->iDelayFIRLong; + // Set output buffer step + pasrc_ctrl->sFIRF1Ctrl.uiOutStep = 1;//ASRC_N_CHANNELS; //TODO confirm this + + // Call init for FIR F1 + if(FIR_init_from_desc(&pasrc_ctrl->sFIRF1Ctrl, psFIRDescriptor) != FIR_NO_ERROR) + return ASRC_ERROR; + + // Update synchronous number of samples + if( psFiltersID->uiFID[ASRC_F1_INDEX] != FILTER_DEFS_ASRC_FIR_NONE_ID ) + pasrc_ctrl->uiNSyncSamples = pasrc_ctrl->sFIRF1Ctrl.uiNOutSamples; + + + // Filter F2 + // --------- + psFIRDescriptor = &sASRCFirDescriptor[psFiltersID->uiFID[ASRC_F2_INDEX]]; + // Set number of input samples and input samples step + pasrc_ctrl->sFIRF2Ctrl.uiNInSamples = pasrc_ctrl->sFIRF1Ctrl.uiNOutSamples; + pasrc_ctrl->sFIRF2Ctrl.uiInStep = pasrc_ctrl->sFIRF1Ctrl.uiOutStep; + // Set delay line base pointer (second filter is always long with ASRC) + pasrc_ctrl->sFIRF2Ctrl.piDelayB = pasrc_ctrl->psState->iDelayFIRLong; + // Set output buffer step + pasrc_ctrl->sFIRF2Ctrl.uiOutStep = 1;//ASRC_N_CHANNELS; //TODO confirm this. Looks like 1 = channel per instance + + // Call init for FIR F2 + if(FIR_init_from_desc(&pasrc_ctrl->sFIRF2Ctrl, psFIRDescriptor) != FIR_NO_ERROR) + return ASRC_ERROR; + + // Update synchronous number of samples + if( psFiltersID->uiFID[ASRC_F2_INDEX] != FILTER_DEFS_ASRC_FIR_NONE_ID ) + pasrc_ctrl->uiNSyncSamples = pasrc_ctrl->sFIRF2Ctrl.uiNOutSamples; + + + // Setup fixed input/output buffers for F1 and F2 + // ---------------------------------------------- + // We set all fixed items (to stack base) + // F1 input is never from stack, so don't set it + pasrc_ctrl->sFIRF2Ctrl.piIn = pasrc_ctrl->piStack; + pasrc_ctrl->sFIRF1Ctrl.piOut = pasrc_ctrl->piStack; + pasrc_ctrl->sFIRF2Ctrl.piOut = pasrc_ctrl->piStack; + + + + // Filter F3 + // --------- + psADFIRDescriptor = &sADFirDescriptor; + + // Set delay line base pointer + pasrc_ctrl->sADFIRF3Ctrl.piDelayB = pasrc_ctrl->psState->iDelayADFIR; + // Set AD coefficients pointer + pasrc_ctrl->sADFIRF3Ctrl.piADCoefs = pasrc_ctrl->piADCoefs; + + // Call init for ADFIR F3 + if(ADFIR_init_from_desc(&pasrc_ctrl->sADFIRF3Ctrl, psADFIRDescriptor) != FIR_NO_ERROR) + return ASRC_ERROR; + + // Call sync function + if(ASRC_sync(pasrc_ctrl) != ASRC_NO_ERROR) + return ASRC_ERROR; + return ASRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: ASRC_sync // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Syncs the ASRC passed as argument // +// ==================================================================== // +ASRCReturnCodes_t ASRC_sync(asrc_ctrl_t* pasrc_ctrl) +{ + // Sync the FIR and ADFIR + if(FIR_sync(&pasrc_ctrl->sFIRF1Ctrl) != FIR_NO_ERROR) + return ASRC_ERROR; + if(FIR_sync(&pasrc_ctrl->sFIRF2Ctrl) != FIR_NO_ERROR) + return ASRC_ERROR; + + if(ADFIR_sync(&pasrc_ctrl->sADFIRF3Ctrl) != FIR_NO_ERROR) + return ASRC_ERROR; + + // Reset time + pasrc_ctrl->iTimeInt = FILTER_DEFS_ADFIR_N_PHASES + ASRC_ADFIR_INITIAL_PHASE; + pasrc_ctrl->uiTimeFract = 0; + + // Reset random seeds to initial values + pasrc_ctrl->psState->uiRndSeed = pasrc_ctrl->uiRndSeedInit; + + // Update time step based on Fs ratio + if(ASRC_update_fs_ratio(pasrc_ctrl) != ASRC_NO_ERROR) + return ASRC_ERROR; + + return ASRC_NO_ERROR; +} + + + +// ==================================================================== // +// Function: ASRC_proc_F1_F2 // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Processes F1 and F2 for a channel // +// ==================================================================== // +#if (XCC_VERSION_MAJOR < 1402) //Beyond 14.2.0 we have proper function pointer support for C +#pragma stackfunction 64 //Generous stack allocation (probably needs just a handful through F1_F2, ASM etc). +#endif +ASRCReturnCodes_t ASRC_proc_F1_F2(asrc_ctrl_t* pasrc_ctrl) +{ + + // Setup variable input / output buffers + pasrc_ctrl->sFIRF1Ctrl.piIn = pasrc_ctrl->piIn; + + // F1 is always enabled, so call F1 + __attribute__((fptrgroup("MRHF_G1"))) + FIRReturnCodes_t ret = pasrc_ctrl->sFIRF1Ctrl.pvProc((int *)&pasrc_ctrl->sFIRF1Ctrl); + if(ret != FIR_NO_ERROR) + return ASRC_ERROR; + + // Check if F2 is enabled + if(pasrc_ctrl->sFIRF2Ctrl.eEnable == FIR_ON) + { + // F2 is enabled, so call F2 + __attribute__((fptrgroup("MRHF_G1"))) + FIRReturnCodes_t ret = pasrc_ctrl->sFIRF2Ctrl.pvProc((int *)&pasrc_ctrl->sFIRF2Ctrl); + if(ret != FIR_NO_ERROR) + return ASRC_ERROR; + + } + + return ASRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: ASRC_update_fs_ratio // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Updates the ASRC with the new Fs ratio // +// ==================================================================== // +ASRCReturnCodes_t ASRC_update_fs_ratio(asrc_ctrl_t* pasrc_ctrl) +{ + unsigned int uiFsRatio = pasrc_ctrl->uiFsRatio; + unsigned int uiFsRatio_low = pasrc_ctrl->uiFsRatio_lo; + + // Check for bounds of new Fs ratio + if( (uiFsRatio < sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].uiMinFsRatio) || + (uiFsRatio > sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].uiMaxFsRatio) ) + return ASRC_ERROR; + + // Apply shift to time ratio to build integer and fractional parts of time step + pasrc_ctrl->iTimeStepInt = uiFsRatio >> (sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].iFsRatioShift); + pasrc_ctrl->uiTimeStepFract = uiFsRatio << (32 - sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].iFsRatioShift); + pasrc_ctrl->uiTimeStepFract |= (uint32_t)(uiFsRatio_low >> sFsRatioConfigs[pasrc_ctrl->eInFs][pasrc_ctrl->eOutFs].iFsRatioShift); + + return ASRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: ASRC_proc_F3_in_spl // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// int iInSample: new input sample // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Writes new input sample to F3 delay line // +// ==================================================================== // +ASRCReturnCodes_t ASRC_proc_F3_in_spl(asrc_ctrl_t* pasrc_ctrl, int iInSample) +{ + pasrc_ctrl->sADFIRF3Ctrl.iIn = iInSample; + if(ADFIR_proc_in_spl(&pasrc_ctrl->sADFIRF3Ctrl) != FIR_NO_ERROR) + return ASRC_ERROR; + + // Decrease next output time (this is an integer value, so no influence on fractional part) + pasrc_ctrl->iTimeInt -= FILTER_DEFS_ADFIR_N_PHASES; + + return ASRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: ASRC_proc_F3_time // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR if an output sample must be produced // +// ASRC_ERROR if no output sample needs to be produced // +// Description: Processes F3 time // +// ==================================================================== // +ASRCReturnCodes_t ASRC_proc_F3_time(asrc_ctrl_t* pasrc_ctrl) +{ + unsigned int uiTemp; + int iAlpha; + int iH[3]; //iH0, iH1, iH2; + int iZero; + __int64_t i64Acc0; + int* piPhase0; + int* piADCoefs; + + // Check if the next output time instant is in the current time slot + // ----------------------------------------------------------------- + // if not return value showing that no output sample needs to be produced + // Update cycle count + if(pasrc_ctrl->iTimeInt >= FILTER_DEFS_ADFIR_N_PHASES) + return ASRC_ERROR; + + + // Update adaptive filter coefficients + // ----------------------------------- + // Coefficients computation load approximation: 15 instructions + // Loop load approximation: 5.625 instructions per sample + 15 instructions overhead => 5.625 * 16 + 15 = 90 + 15 = 105 Instructions + // Total: 125 instructions + + // Set register to zero + iZero = 0; + + // Compute adative coefficients spline factors + // The fractional part of time gives alpha + iAlpha = pasrc_ctrl->uiTimeFract>>1; // Now alpha can be seen as a signed number + i64Acc0 = (long long)iAlpha * (long long)iAlpha; + +#if SRC_USE_VPU + iH[2] = (int)(i64Acc0>>32); + iH[0] = 0x40000000; // Load H2 with 0.5; + iH[1] = iH[0] - iH[2]; // H1 = 0.5 - 0.5 * alpha * alpha; + iH[1] = iH[1] - iH[2]; // H1 = 0.5 - alpha * alpha + iH[1] = iH[1] + iAlpha; // H1 = 0.5 + alpha - alpha * alpha; + iH[0] = iH[0] - iAlpha; // H2 = 0.5 - alpha + iH[0] = iH[0] + iH[2]; // H2 = 0.5 - alpha + 0.5 * alpha * alpha + + // The integer part of time gives the phase + piPhase0 = &iADFirCoefs[0][pasrc_ctrl->iTimeInt]; + piADCoefs = pasrc_ctrl->piADCoefs; // Given limited number of registers, this should be DP + src_mrhf_spline_coeff_gen_inner_loop_asm_xs3(piPhase0, iH, piADCoefs, FILTER_DEFS_ADFIR_PHASE_N_TAPS); +#else + iH[0] = (int)(i64Acc0>>32); + iH[2] = 0x40000000; // Load H2 with 0.5; + iH[1] = iH[2] - iH[0]; // H1 = 0.5 - 0.5 * alpha * alpha; + iH[1] = iH[1] - iH[0]; // H1 = 0.5 - alpha * alpha + iH[1] = iH[1] + iAlpha; // H1 = 0.5 + alpha - alpha * alpha; + iH[2] = iH[2] - iAlpha; // H2 = 0.5 - alpha + iH[2] = iH[2] + iH[0]; // H2 = 0.5 - alpha + 0.5 * alpha * alpha + + // The integer part of time gives the phase + piPhase0 = iADFirCoefs[pasrc_ctrl->iTimeInt]; + piADCoefs = pasrc_ctrl->piADCoefs; // Given limited number of registers, this should be DP + + src_mrhf_spline_coeff_gen_inner_loop_asm(piPhase0, iH, piADCoefs, FILTER_DEFS_ADFIR_PHASE_N_TAPS); +#endif + + // Step time for next output sample + // -------------------------------- + // Step to next output time (add integer and fractional parts) + pasrc_ctrl->iTimeInt += pasrc_ctrl->iTimeStepInt; + // For fractional part, this can be optimized using the add with carry instruction of XS2 + uiTemp = pasrc_ctrl->uiTimeFract; + pasrc_ctrl->uiTimeFract += pasrc_ctrl->uiTimeStepFract; + if(pasrc_ctrl->uiTimeFract < uiTemp) + pasrc_ctrl->iTimeInt++; + + //printf("TimeInt = %x TimeFract = %x", pasrc_ctrl->iTimeInt, pasrc_ctrl->uiTimeFract); + + //int result=0; for (int i=0; i<16; i++)result += piADCoefs[i];printf("ASRC_proc_F3_time checksum=0x%x\n", result); + + + // Return value showing that an output sample must be produced + return ASRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: ASRC_proc_F3_macc // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// int* piOutSample: Address of output sample // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Processes F3 for a channel // +// ==================================================================== // +ASRCReturnCodes_t ASRC_proc_F3_macc(asrc_ctrl_t* pasrc_ctrl, int* piOutSample) +{ + pasrc_ctrl->sADFIRF3Ctrl.piOut = piOutSample; + // Call processing function + if(ADFIR_proc_macc(&pasrc_ctrl->sADFIRF3Ctrl) != FIR_NO_ERROR) + return ASRC_ERROR; + + pasrc_ctrl->uiNASRCOutSamples++; + + return ASRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: ASRC_proc_dither // +// Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // +// Return values: ASRC_NO_ERROR on success // +// ASRC_ERROR on failure // +// Description: Processes dither for a channel // +// ==================================================================== // +ASRCReturnCodes_t ASRC_proc_dither(asrc_ctrl_t* pasrc_ctrl) +{ + int* piData; + unsigned int uiR; + int iDither; + __int64_t i64Acc; + unsigned int ui; + + + // Apply dither if required + if(pasrc_ctrl->uiDitherOnOff == ASRC_DITHER_ON) + { + // Get data buffer + piData = pasrc_ctrl->piOut; + // Get random seed + uiR = pasrc_ctrl->psState->uiRndSeed; + + // Loop through samples + for(ui = 0; ui < pasrc_ctrl->uiNASRCOutSamples * pasrc_ctrl->uiNchannels; ui += pasrc_ctrl->uiNchannels) + { + // Compute dither sample (TPDF) + iDither = ASRC_DITHER_BIAS; + + uiR = (unsigned int)(ASRC_R_BASE * uiR); + uiR = (unsigned int)(ASRC_R_CONS + uiR); + iDither += ((uiR>>ASRC_RPDF_BITS_SHIFT) & ASRC_RPDF_MASK); + + uiR = (unsigned int)(ASRC_R_BASE * uiR); + uiR = (unsigned int)(ASRC_R_CONS + uiR); + iDither += ((uiR>>ASRC_RPDF_BITS_SHIFT) & ASRC_RPDF_MASK); + + //unsigned iACCl = 0; + //int iACCh = iDither; + //pi_Data[ui] = dither_maths_asm(piData[ui],iACCh, iACCl); + + // Use MACC instruction to saturate and dither + signal + i64Acc = ((__int64_t)iDither <<32); // On XMOS this is not necessary, just load dither in the top word of the ACC register + MACC(&i64Acc, piData[ui], 0x7FFFFFFF); + LSAT30(&i64Acc); + // Extract 32bits result + EXT30(&piData[ui], i64Acc); + + // Mask to 24bits + piData[ui] &= ASRC_DATA24_MASK; + + } + + // Write random seed back + pasrc_ctrl->psState->uiRndSeed = uiR; + } + + return ASRC_NO_ERROR; +} diff --git a/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc.h b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc.h new file mode 100644 index 0000000..4783f2f --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc.h @@ -0,0 +1,298 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// Top level definition file for the ASRC +// +// Target: MS Windows +// Version: 1.0 +// +// =========================================================================== +// =========================================================================== + +#ifndef _SRC_MRHF_ASRC_H_ +#define _SRC_MRHF_ASRC_H_ + + // =========================================================================== + // + // Includes + // + // =========================================================================== + #include "src_mrhf_fir.h" + #include "src_mrhf_filter_defs.h" + #include "src.h" + #include "src_mrhf_spline_coeff_gen_inner_loop_asm.h" + #include "src_mrhf_adfir_inner_loop_asm.h" + + // =========================================================================== + // + // Defines + // + // =========================================================================== + + // General defines + // --------------- + #define ASRC_FS_RATIO_UNIT_BIT 28 + #define ASRC_STACK_LENGTH_MULT (ASRC_N_CHANNELS * 4) // Multiplier for stack length (stack length = this value x the number of input samples to process) + #define ASRC_ADFIR_COEFS_LENGTH FILTER_DEFS_ADFIR_PHASE_N_TAPS // Length of AD FIR coefficients buffer + #define ASRC_NOMINAL_FS_SCALE (1 << ASRC_FS_RATIO_UNIT_BIT) + + + // Parameter values + // ---------------- + #define ASRC_DITHER_OFF 0 + #define ASRC_DITHER_ON 1 + #define ASRC_DITHER_ON_OFF_MIN ASRC_DITHER_OFF + #define ASRC_DITHER_ON_OFF_MAX ASRC_DITHER_ON + + + + + // =========================================================================== + // + // Defines + // + // =========================================================================== + + + // =========================================================================== + // + // TypeDefs + // + // =========================================================================== + + // To avoid C type definitions when including this file from assembler + #ifndef INCLUDE_FROM_ASM + + // ASRC Return Codes + // ----------------- + typedef enum _ASRCReturnCodes + { + ASRC_NO_ERROR = 0, + ASRC_ERROR = 1 + } ASRCReturnCodes_t; + + + // Sampling rate codes + // ------------------- + typedef enum _ASRCFs + { + ASRC_FS_44 = 0, // Fs = 44.1kHz code + ASRC_FS_48 = 1, // Fs = 48kHz code + ASRC_FS_88 = 2, // Fs = 88.2kHz code + ASRC_FS_96 = 3, // Fs = 96kHz code + ASRC_FS_176 = 4, // Fs = 176.4kHz code + ASRC_FS_192 = 5, // Fs = 192kHz code + } ASRCFs_t; + #define ASRC_N_FS (ASRC_FS_192 + 1) + #define ASRC_FS_MIN ASRC_FS_44 + #define ASRC_FS_MAX ASRC_FS_192 + + + // ASRC Filters IDs structure + // -------------------------- + #define ASRC_F1_INDEX 0 + #define ASRC_F2_INDEX 1 + #define ASRC_N_F (ASRC_F2_INDEX + 1) + + typedef struct _ASRCFiltersIDs + { + unsigned int uiFID[ASRC_N_F]; + } ASRCFiltersIDs_t; + + // ASRC time ratio configurations + // ------------------------------ + typedef struct _ASRCFsRatioConfigs + { + unsigned int uiNominalFsRatio; + unsigned int uiNominalFsRatio_lo; + unsigned int uiMinFsRatio; + unsigned int uiMaxFsRatio; + int iFsRatioShift; + } ASRCFsRatioConfigs_t; + + // ASRC State structure + // -------------------- + typedef struct _ASRCState + { + long long pad_to_64b_alignment; //Force compiler to 64b align + unsigned int uiRndSeed; // Dither random seeds current values + int iDelayFIRLong[2 * FILTER_DEFS_FIR_MAX_TAPS_LONG]; // Doubled length for circular buffer simulation + int iDelayFIRShort[2 * FILTER_DEFS_FIR_MAX_TAPS_SHORT]; // Doubled length for circular buffer simulation + int iDelayADFIR[2 * FILTER_DEFS_ADFIR_PHASE_N_TAPS]; // Doubled length for circular buffer simulation + } asrc_state_t; + + + // ASRC Control structure + // ---------------------- + typedef struct _ASRCCtrl + { +#ifdef __XC__ + long long pad_to_64b_alignment; //Force compiler to 64b align + unsigned int uiNchannels; // Number of channels in this instance + int* unsafe piIn; // Input buffer pointer (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int uiNInSamples; // Number of input samples to process in one call to the processing function + unsigned int uiNSyncSamples; // Number of synchronous samples produced in one call to the processing function + ASRCFs_t eInFs; // Input sampling rate code + int* unsafe piOut; // Output buffer poin ter (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int uiNASRCOutSamples; // Number of output samples produced during last call to the asynchronous processing function + ASRCFs_t eOutFs; // Output sampling rate code + + FIRCtrl_t sFIRF1Ctrl; // F1 FIR controller + FIRCtrl_t sFIRF2Ctrl; // F2 FIR controller + ADFIRCtrl_t sADFIRF3Ctrl; // F3 ADFIR controller + + unsigned int uiFsRatio; // Fs ratio: Fsin / Fsout + unsigned int uiFsRatio_lo; + + int iTimeInt; // Integer part of time + unsigned int uiTimeFract; // Fractional part of time + int iTimeStepInt; // Integer part of time step + unsigned int uiTimeStepFract; // Fractional part of time step + + unsigned int uiDitherOnOff; // Dither on/off flag + unsigned int uiRndSeedInit; // Dither random seed initial value + + asrc_state_t* unsafe psState; // Pointer to state structure + int* unsafe piStack; // Pointer to stack buffer + int* unsafe piADCoefs; // Pointer to AD coefficients +#else + long long pad_to_64b_alignment; //Force compiler to 64b align + unsigned int uiNchannels; // Number of channels in this instance + int* piIn; // Input buffer pointer (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int uiNInSamples; // Number of input samples to process in one call to the processing function + unsigned int uiNSyncSamples; // Number of synchronous samples produced in one call to the processing function + ASRCFs_t eInFs; // Input sampling rate code + int* piOut; // Output buffer poin ter (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int uiNASRCOutSamples; // Number of output samples produced during last call to the asynchronous processing function + ASRCFs_t eOutFs; // Output sampling rate code + + FIRCtrl_t sFIRF1Ctrl; // F1 FIR controller + FIRCtrl_t sFIRF2Ctrl; // F2 FIR controller + ADFIRCtrl_t sADFIRF3Ctrl; // F3 ADFIR controller + + unsigned int uiFsRatio; // Fs ratio: Fsin / Fsout + unsigned int uiFsRatio_lo; + + int iTimeInt; // Integer part of time + unsigned int uiTimeFract; // Fractional part of time + int iTimeStepInt; // Integer part of time step + unsigned int uiTimeStepFract; // Fractional part of time step + + unsigned int uiDitherOnOff; // Dither on/off flag + unsigned int uiRndSeedInit; // Dither random seed initial value + + asrc_state_t* psState; // Pointer to state structure + int* piStack; // Pointer to stack buffer + int* piADCoefs; // Pointer to AD coefficients +#endif + } asrc_ctrl_t; + + + // Adaptive filter coefficients. Note this is a workaround to force the compiler to align the array to 64b boundary (required by inner loop assembler that uses load/store double) + // ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- + + typedef struct _asrc_adfir_coefs_t + { + long long padding_to_64b; //Force 64b alignment + int iASRCADFIRCoefs[ASRC_ADFIR_COEFS_LENGTH]; //Adaptive FIR coefficients (one per instance) + } asrc_adfir_coefs_t; + + + + + + // =========================================================================== + // + // Function prototypes + // + // =========================================================================== + + // ==================================================================== // + // Function: ASRC_prepare_coefs // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Prepares the ASRC coefficients from the prototype // + // Needs to be called only once // + // ==================================================================== // + ASRCReturnCodes_t ASRC_prepare_coefs(void); + + // ==================================================================== // + // Function: ASRC_init // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Inits the ASRC passed as argument // + // ==================================================================== // + ASRCReturnCodes_t ASRC_init(asrc_ctrl_t* pasrc_ctrl); + + // ==================================================================== // + // Function: ASRC_sync // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Syncs the ASRC passed as argument // + // ==================================================================== // + ASRCReturnCodes_t ASRC_sync(asrc_ctrl_t* pasrc_ctrl); + + // ==================================================================== // + // Function: ASRC_proc_F1_F2 // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Processes F1 and F2 for a channel // + // ==================================================================== // + ASRCReturnCodes_t ASRC_proc_F1_F2(asrc_ctrl_t* pasrc_ctrl); + + // ==================================================================== // + // Function: ASRC_update_fs_ratio // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Updates the ASRC with the new Fs ratio // + // ==================================================================== // + ASRCReturnCodes_t ASRC_update_fs_ratio(asrc_ctrl_t* pasrc_ctrl); + + // ==================================================================== // + // Function: ASRC_proc_F3_in_spl // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // int iInSample: new input sample // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Writes new input sample to F3 delay line // + // ==================================================================== // + ASRCReturnCodes_t ASRC_proc_F3_in_spl(asrc_ctrl_t* pasrc_ctrl, int iInSample); + + // ==================================================================== // + // Function: ASRC_proc_F3_time // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR if an output sample must be produced // + // ASRC_ERROR if no output sample needs to be produced // + // Description: Processes F3 time // + // ==================================================================== // + ASRCReturnCodes_t ASRC_proc_F3_time(asrc_ctrl_t* pasrc_ctrl); + + // ==================================================================== // + // Function: ASRC_proc_F3_macc // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // int* piOutSample: Address of output sample // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Processes F3 for a channel // + // ==================================================================== // + ASRCReturnCodes_t ASRC_proc_F3_macc(asrc_ctrl_t* pasrc_ctrl, int* piOutSample); + + // ==================================================================== // + // Function: ASRC_proc_dither // + // Arguments: asrc_ctrl_t *pasrc_ctrl: Ctrl strct. // + // Return values: ASRC_NO_ERROR on success // + // ASRC_ERROR on failure // + // Description: Processes dither for a channel // + // ==================================================================== // + ASRCReturnCodes_t ASRC_proc_dither(asrc_ctrl_t* pasrc_ctrl); + + #endif // nINCLUDE_FROM_ASM + +#endif // _SRC_MRHF_ASRC_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc_checks.h b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc_checks.h new file mode 100644 index 0000000..1dbe7a4 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc_checks.h @@ -0,0 +1,37 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_MRHF_ASRC_CHECKS_H_ +#define _SRC_MRHF_ASRC_CHECKS_H_ + +#include "src.h" + +//Compile time checks on SRC configuration defines +#if (ASRC_N_CHANNELS % ASRC_N_INSTANCES != 0) +#error "Each core must process an integer number of channels. Check ASRC_N_CHANNELS & ASRC_N_INSTANCES." +#endif +#if (ASRC_N_CHANNELS < ASRC_N_INSTANCES) +#error "Each instance (logical core) must process at least one channel. Check ASRC_N_CHANNELS & ASRC_N_INSTANCES." +#endif +#if (ASRC_N_INSTANCES < 1) +#error "Number of instances (logical cores) must be at least 1. Check ASRC_N_INSTANCES." +#endif +#if (ASRC_N_CHANNELS < 1) +#error "Number of audio channels must be at least 1. Check ASRC_N_CHANNELS." +#endif +#if (ASRC_N_IN_SAMPLES < 4) +#error "Number of input audio samples in each block must be at least 4. Check ASRC_N_IN_SAMPLES." +#endif +#if ((ASRC_N_IN_SAMPLES & (ASRC_N_IN_SAMPLES - 1)) != 0) +#error "Number of input audio samples in each block must be a power of two. Check ASRC_N_IN_SAMPLES." +#endif +#if (ASRC_N_OUT_IN_RATIO_MAX < 5) +#warning "SRC buffering configured so that fs out <= 4 * fs in" +#endif +#if (ASRC_N_OUT_IN_RATIO_MAX < 3) +#warning "SRC buffering configured so that fs out <= 2 * fs in" +#endif +#if (ASRC_N_OUT_IN_RATIO_MAX < 1) +#warning "SRC buffering configured so that fs out <= fs in" +#endif + +#endif // _SRC_MRHF_ASRC_CHECKS_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc_wrapper.c b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc_wrapper.c new file mode 100644 index 0000000..a01a94a --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/asrc/src_mrhf_asrc_wrapper.c @@ -0,0 +1,280 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// General includes +#include +#include +#include +#include +#include +#include "debug_print.h" + +// ASRC includes +#include "src.h" +#include "use_vpu.h" + +extern ASRCFsRatioConfigs_t sFsRatioConfigs[ASRC_N_FS][ASRC_N_FS]; + +#define DO_FS_BOUNDS_CHECK 1 //This is important to prevent pointers going out of bounds when invalid fs_ratios are sent + +static void asrc_error(int code) +{ + debug_printf("ASRC_proc Error code %d\n", code); + delay_milliseconds(1); //Allow xscope to display message before quit + _Exit(code); +} + + +uint64_t asrc_init(const fs_code_t sr_in, const fs_code_t sr_out, asrc_ctrl_t asrc_ctrl[], const unsigned n_channels_per_instance, + const unsigned n_in_samples, const dither_flag_t dither_on_off) +{ + unsigned ui; + + ASRCReturnCodes_t ret_code; + + ret_code = ASRC_prepare_coefs(); + + if (ret_code != ASRC_NO_ERROR) asrc_error(10); + + //Check to see if n_channels_per_instance, n_in_samples are reasonable + if ((n_in_samples & 0x1) || (n_in_samples < 4)) asrc_error(100); + if (n_channels_per_instance < 1) asrc_error(101); + + for(ui = 0; ui < n_channels_per_instance; ui++) + { + // Set number of channels per instance + asrc_ctrl[ui].uiNchannels = n_channels_per_instance; + + // Set input/output sampling rate codes + asrc_ctrl[ui].eInFs = (int)sr_in; + asrc_ctrl[ui].eOutFs = (int)sr_out; + + // Set number of samples + asrc_ctrl[ui].uiNInSamples = n_in_samples; + + // Set dither flag and random seeds + asrc_ctrl[ui].uiDitherOnOff = dither_on_off; + asrc_ctrl[ui].uiRndSeedInit = 12345 * ui; //Some randomish numbers. Value not critical + + // Init ASRC instances + ret_code = ASRC_init(&asrc_ctrl[ui]); + + if (ret_code != ASRC_NO_ERROR) asrc_error(11); + } + + // Sync + // ---- + // Sync ASRC. This is just to show that the function works and returns success + + for(ui = 0; ui < n_channels_per_instance; ui++) { + ret_code = ASRC_sync(&asrc_ctrl[ui]); + if (ret_code != ASRC_NO_ERROR) asrc_error(12); + } + + return (uint64_t)((((uint64_t)asrc_ctrl[0].uiFsRatio) << 32) | asrc_ctrl[0].uiFsRatio_lo); +} + +unsigned asrc_process(int *in_buff, int *out_buff, uint64_t fs_ratio, asrc_ctrl_t asrc_ctrl[]){ + + int ui, uj; //General counters + int uiSplCntr; //Spline counter + + // Get the number of channels per instance from first channel + const unsigned n_channels_per_instance = asrc_ctrl[0].uiNchannels; + + uint32_t fs_ratio_hi = (uint32_t)(fs_ratio >> 32); + uint32_t fs_ratio_lo = (uint32_t)(fs_ratio); + + for(ui = 0; ui < n_channels_per_instance; ui++) + { + // Update Fs Ratio + asrc_ctrl[ui].uiFsRatio = fs_ratio_hi; + asrc_ctrl[ui].uiFsRatio_lo = fs_ratio_lo; + +#if DO_FS_BOUNDS_CHECK + // Check for bounds of new Fs ratio + if( (fs_ratio_hi < sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].uiMinFsRatio) || + (fs_ratio_hi > sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].uiMaxFsRatio) ) + { + //debug_printf("Passed = %x, Nominal = 0x%x\n", fs_ratio_hi, sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].uiNominalFsRatio); + fs_ratio_hi = sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].uiNominalFsRatio; //Important to prevent buffer overflow if fs_ratio requests too many samples. + fs_ratio_lo = sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].uiNominalFsRatio_lo; + //debug_printf("!"); + } +#endif + // Apply shift to time ratio to build integer and fractional parts of time step + asrc_ctrl[ui].iTimeStepInt = fs_ratio_hi >> (sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].iFsRatioShift); + asrc_ctrl[ui].uiTimeStepFract = fs_ratio_hi << (32 - sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].iFsRatioShift); + asrc_ctrl[ui].uiTimeStepFract |= (uint32_t)(fs_ratio_lo >> sFsRatioConfigs[asrc_ctrl[ui].eInFs][asrc_ctrl[ui].eOutFs].iFsRatioShift); + + + + + // Set input and output data pointers + asrc_ctrl[ui].piIn = in_buff + ui; + asrc_ctrl[ui].piOut = out_buff + ui; + + + // Process synchronous part (F1 + F2) + // ================================== + + // Note: this is block based similar to SSRC, output will be on stack + // and there will be asrc_ctrl[chan_start].uiNSyncSamples samples per channel produced + if(ASRC_proc_F1_F2(&asrc_ctrl[ui]) != ASRC_NO_ERROR) + { + asrc_error(12); + } + + + + // Run the asynchronous part (F3) + // ============================== + // Clear number of output samples (note that this sample counter would actually not be needed if all was sample by sampe) + + asrc_ctrl[ui].uiNASRCOutSamples = 0; + } + + uiSplCntr = 0; // This is actually only used because of the bizarre mix of block and sample based processing + + // Driven by samples produced during the synchronous phase + for(ui = 0; ui < asrc_ctrl[0].uiNSyncSamples; ui++) + { + // Push new samples into F3 delay line (input from stack) for each new "synchronous" sample (i.e. output of F1, respectively F2) + for(uj = 0; uj < n_channels_per_instance; uj++) + { + + //The following is replicated/inlined code from ASRC_proc_F3_in_spl in ASRC.c + asrc_ctrl[uj].sADFIRF3Ctrl.iIn = asrc_ctrl[uj].piStack[ui]; + + //The following is replicated/inlined code from ADFIR_proc_in_spl in FIR.c + // Double write to simulate circular buffer + *asrc_ctrl[uj].sADFIRF3Ctrl.piDelayI = asrc_ctrl[uj].sADFIRF3Ctrl.iIn; + *(asrc_ctrl[uj].sADFIRF3Ctrl.piDelayI + asrc_ctrl[uj].sADFIRF3Ctrl.uiDelayO) = asrc_ctrl[uj].sADFIRF3Ctrl.iIn; + // Step delay (with circular simulation) + asrc_ctrl[uj].sADFIRF3Ctrl.piDelayI++; + if(asrc_ctrl[uj].sADFIRF3Ctrl.piDelayI >= asrc_ctrl[uj].sADFIRF3Ctrl.piDelayW) + asrc_ctrl[uj].sADFIRF3Ctrl.piDelayI =asrc_ctrl[uj].sADFIRF3Ctrl.piDelayB; + + // Decrease next output time (this is an integer value, so no influence on fractional part) + asrc_ctrl[uj].iTimeInt -= FILTER_DEFS_ADFIR_N_PHASES; + + + } + // Run macc loop for F3 + // Check if a new output sample needs to be produced + // Note that this will also update the adaptive filter coefficients + // These must be computed for one channel only and reused in the macc loop of other channels + while(asrc_ctrl[0].iTimeInt < FILTER_DEFS_ADFIR_N_PHASES) + { + unsigned int uiTemp; + int iAlpha; + + int iH[3]; //iH0, iH1, iH2; + long long i64Acc0; + int* piPhase0; + int* piADCoefs; + + // Compute adative coefficients spline factors + // The fractional part of time gives alpha + iAlpha = asrc_ctrl[0].uiTimeFract>>1; // Now alpha can be seen as a signed number + i64Acc0 = (long long)iAlpha * (long long)iAlpha; + +#if SRC_USE_VPU + iH[2] = (int)(i64Acc0>>32); + iH[0] = 0x40000000; // Load H2 with 0.5; + iH[1] = iH[0] - iH[2]; // H1 = 0.5 - 0.5 * alpha * alpha; + iH[1] = iH[1] - iH[2]; // H1 = 0.5 - alpha * alpha + iH[1] = iH[1] + iAlpha; // H1 = 0.5 + alpha - alpha * alpha; + iH[0] = iH[0] - iAlpha; // H2 = 0.5 - alpha + iH[0] = iH[0] + iH[2]; // H2 = 0.5 - alpha + 0.5 * alpha * alpha + + // The integer part of time gives the phase + piPhase0 = &iADFirCoefs[0][asrc_ctrl[0].iTimeInt]; + // These are calculated by the asm funcion piPhase1 = piPhase0 + FILTER_DEFS_ADFIR_PHASE_N_TAPS; + // piPhase2 = piPhase1 + FILTER_DEFS_ADFIR_PHASE_N_TAPS; + piADCoefs = asrc_ctrl[0].piADCoefs; // Given limited number of registers, this could be DP + // Apply spline coefficients to filter coefficients + src_mrhf_spline_coeff_gen_inner_loop_asm_xs3(piPhase0, iH, piADCoefs, FILTER_DEFS_ADFIR_PHASE_N_TAPS); +#else + iH[0] = (int)(i64Acc0>>32); + iH[2] = 0x40000000; // Load H2 with 0.5; + iH[1] = iH[2] - iH[0]; // H1 = 0.5 - 0.5 * alpha * alpha; + iH[1] = iH[1] - iH[0]; // H1 = 0.5 - alpha * alpha + iH[1] = iH[1] + iAlpha; // H1 = 0.5 + alpha - alpha * alpha; + iH[2] = iH[2] - iAlpha; // H2 = 0.5 - alpha + iH[2] = iH[2] + iH[0]; // H2 = 0.5 - alpha + 0.5 * alpha * alpha + + // The integer part of time gives the phase + piPhase0 = iADFirCoefs[asrc_ctrl[0].iTimeInt]; + // These are calculated by the asm funcion piPhase1 = piPhase0 + FILTER_DEFS_ADFIR_PHASE_N_TAPS; + // piPhase2 = piPhase1 + FILTER_DEFS_ADFIR_PHASE_N_TAPS; + piADCoefs = asrc_ctrl[0].piADCoefs; // Given limited number of registers, this could be DP + + // Apply spline coefficients to filter coefficients + src_mrhf_spline_coeff_gen_inner_loop_asm(piPhase0, iH, piADCoefs, FILTER_DEFS_ADFIR_PHASE_N_TAPS); + +#endif + + // Step time for next output sample + // -------------------------------- + // Step to next output time (add integer and fractional parts) + asrc_ctrl[0].iTimeInt += asrc_ctrl[0].iTimeStepInt; + // For fractional part, this can be optimized using the add with carry instruction of XS2 + uiTemp = asrc_ctrl[0].uiTimeFract; + asrc_ctrl[0].uiTimeFract += asrc_ctrl[0].uiTimeStepFract; + if(asrc_ctrl[0].uiTimeFract < uiTemp) + asrc_ctrl[0].iTimeInt++; + + + // Not really needed, just for the beauty of it... + //asrc_ctrl[0+1].iTimeInt = asrc_ctrl[0].iTimeInt; + //asrc_ctrl[0+1].uiTimeFract = asrc_ctrl[0].uiTimeFract; + + // Apply filter F3 with just computed adaptive coefficients + for(uj = 0; uj < n_channels_per_instance; uj++) { + + //The following is replicated/inlined code from ADFIR_F3_proc_macc in ASRC.c + asrc_ctrl[uj].sADFIRF3Ctrl.piOut = (asrc_ctrl[uj].piOut + n_channels_per_instance * uiSplCntr); + + //The following is replicated/inlined code from ADFIR_proc_macc in FIR.c + int* piData; + int* piCoefs; + int iData; + // Clear accumulator and set access pointers + piData = asrc_ctrl[uj].sADFIRF3Ctrl.piDelayI; + piCoefs = asrc_ctrl[uj].sADFIRF3Ctrl.piADCoefs; + + // Do FIR +#if SRC_USE_VPU + src_mrhf_adfir_inner_loop_asm_xs3(piData, piCoefs, &iData, asrc_ctrl[uj].sADFIRF3Ctrl.uiNLoops); +#else + if ((unsigned)piData & 0b0100) src_mrhf_adfir_inner_loop_asm_odd(piData, piCoefs, &iData, asrc_ctrl[uj].sADFIRF3Ctrl.uiNLoops); + else src_mrhf_adfir_inner_loop_asm(piData, piCoefs, &iData, asrc_ctrl[uj].sADFIRF3Ctrl.uiNLoops); +#endif + + // Write output + *(asrc_ctrl[uj].sADFIRF3Ctrl.piOut) = iData; + asrc_ctrl[uj].uiNASRCOutSamples++; + } + uiSplCntr++; // This is actually only used because of the bizarre mix of block and sample based processing + } + } + + +#if (ASRC_DITHER_SETTING != ASRC_DITHER_OFF) //Removed for speed optimisation + // Process dither part + // =================== + // We are back to block based processing. This is where the number of ASRC output samples is required again + // (would not be used if sample by sample based (on output samples)) + for(ui = 0; ui < n_channels_per_instance; ui++) + { + // Note: this is block based similar to SSRC + if(ASRC_proc_dither(&asrc_ctrl[ui]) != ASRC_NO_ERROR) + { + asrc_error(4); + } + } +#endif + + unsigned n_samps_out = asrc_ctrl[0].uiNASRCOutSamples; + return n_samps_out; +} diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm.S b/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm.S new file mode 100644 index 0000000..4eae24e --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm.S @@ -0,0 +1,253 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_adfir_inner_loop_asm.function + .globl src_mrhf_adfir_inner_loop_asm + .align 8 + .type src_mrhf_adfir_inner_loop_asm,@function + +src_mrhf_adfir_inner_loop_asm: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 + + + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 8 + {stw iDataRet_p, sp[6]; shr counter, counter, 3} + + //Constant for adding onto stuff. Gets updated later + ldc step, 0x40 + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + + bf counter, src_mrhf_adfir_done +src_mrhf_adfir_main_loop: + sub counter, counter, 1 + + ldd iData0, iData1, piData_p[0] + ldd iCoef0, iCoef1, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[1] + ldd iCoef0, iCoef1, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[2] + ldd iCoef0, iCoef1, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[3] + ldd iCoef0, iCoef1, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[4] + ldd iCoef0, iCoef1, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[5] + ldd iCoef0, iCoef1, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[6] + ldd iCoef0, iCoef1, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[7] + ldd iCoef0, iCoef1, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + //Decrement loop counter and increment pointers and branch if still running + {add piData_p, piData_p, step; add piCoefs_p, piCoefs_p, step} + + bt counter, src_mrhf_adfir_main_loop + +src_mrhf_adfir_done: + //pop return value pointer from stack so we can use it to write back + //Write back the two return values + {ldw iDataRet_p, sp[6]; ldc counter, 30} //Reuse counter (r3) + + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size + +.atmp: + .size src_mrhf_adfir_inner_loop_asm, .atmp-src_mrhf_adfir_inner_loop_asm + .align 8 + .cc_bottom src_mrhf_adfir_inner_loop_asm.function + + .set src_mrhf_adfir_inner_loop_asm.nstackwords, stack_size + .globl src_mrhf_adfir_inner_loop_asm.nstackwords + .set src_mrhf_adfir_inner_loop_asm.maxcores, 1 + .globl src_mrhf_adfir_inner_loop_asm.maxcores + .set src_mrhf_adfir_inner_loop_asm.maxtimers,0 + .globl src_mrhf_adfir_inner_loop_asm.maxtimers + .set src_mrhf_adfir_inner_loop_asm.maxchanends,0 + .globl src_mrhf_adfir_inner_loop_asm.maxchanends + + +// Odd data alignment (4byte odd instead of 8byte) version + + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_adfir_inner_loop_asm_odd.function + .globl src_mrhf_adfir_inner_loop_asm_odd + .align 8 + .type src_mrhf_adfir_inner_loop_asm_odd,@function + +src_mrhf_adfir_inner_loop_asm_odd: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 + + + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 8 + {stw iDataRet_p, sp[6]; shr counter, counter, 3} + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + bf counter, src_mrhf_adfir_done_odd +src_mrhf_adfir_main_loop_odd: + + {sub counter, counter, 1; ldc step, 0x38} + + //Constant for adding onto stuff. Gets updated later + + {ldw iData0, piData_p[0]; add piData_p, piData_p, 4} //Now 64b aligned + + ldd iCoef1, iCoef0, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[0] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[1] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[2] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[3] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[4] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[5] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[6] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + + add piData_p, piData_p, step + + {ldw iData1, piData_p[0]; add piData_p, piData_p, 4} //0x4 + 0x38 + 0x4 = 0x40) + maccs Acc0_h, Acc0_l, iData1, iCoef1 + //Increment pointers and branch if still running + + ldc step, 0x40 + {bt counter, src_mrhf_adfir_main_loop_odd; add piCoefs_p, piCoefs_p, step} + +src_mrhf_adfir_done_odd: + //pop return value pointer from stack so we can use it to write back + {ldw iDataRet_p, sp[6]; ldc counter, 30} //Reuse counter (r3) + + //Write back the return value + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size + +.atmp_odd: + .size src_mrhf_adfir_inner_loop_asm_odd, .atmp_odd-src_mrhf_adfir_inner_loop_asm_odd + .align 8 + .cc_bottom src_mrhf_adfir_inner_loop_asm_odd.function + + .set src_mrhf_adfir_inner_loop_asm_odd.nstackwords, stack_size + .globl src_mrhf_adfir_inner_loop_asm_odd.nstackwords + .set src_mrhf_adfir_inner_loop_asm_odd.maxcores, 1 + .globl src_mrhf_adfir_inner_loop_asm_odd.maxcores + .set src_mrhf_adfir_inner_loop_asm_odd.maxtimers,0 + .globl src_mrhf_adfir_inner_loop_asm_odd.maxtimers + .set src_mrhf_adfir_inner_loop_asm_odd.maxchanends,0 + .globl src_mrhf_adfir_inner_loop_asm_odd.maxchanends diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm.h new file mode 100644 index 0000000..3c5e311 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm.h @@ -0,0 +1,10 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_MRHF_ADFIR_INNER_LOOP_ASM_H_ +#define _SRC_MRHF_ADFIR_INNER_LOOP_ASM_H_ + +void src_mrhf_adfir_inner_loop_asm(int *piData, int *piCoefs, int iData[], int count); +void src_mrhf_adfir_inner_loop_asm_odd(int *piData, int *piCoefs, int iData[], int count); +void src_mrhf_adfir_inner_loop_asm_xs3(int *piData, int *piCoefs, int iData[], int count); + +#endif // _SRC_MRHF_ADFIR_INNER_LOOP_ASM_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm_xs3.S b/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm_xs3.S new file mode 100644 index 0000000..6f57ca7 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_adfir_inner_loop_asm_xs3.S @@ -0,0 +1,241 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#if defined(__XS3A__) + .text + +#define NSTACKWORDS 8 + .issue_mode dual + + .align 16 + + .cc_top src_mrhf_adfir_inner_loop_asm_xs3.function + .globl src_mrhf_adfir_inner_loop_asm_xs3 + .type src_mrhf_adfir_inner_loop_asm_xs3,@function + +src_mrhf_adfir_inner_loop_asm_xs3: + { DUALENTSP_u6 NSTACKWORDS ; ldc r11, 0 } + { vsetc r11 ; shr r3, r3, 3} + { ldc r11, 0x20 ; vclrdr } + { bf r3, src_mrhf_adfir_done2 ; sub r3, r3, 1 } + +src_mrhf_adfir_main_loop2: + { vldc r0[0] ; add r0, r0, r11 } + { vlmaccr r1[0] ; add r1, r1, r11 } + { vldc r0[0] ; add r0, r0, r11 } + { vlmaccr r1[0] ; add r1, r1, r11 } + { bt r3, src_mrhf_adfir_main_loop2 ; sub r3, r3, 1 } + +src_mrhf_adfir_done2: + ldap r11, shifts1 + { vlsat r11[0] ; ldaw r0, sp[0] } + vstr r0[0] + { vldc r0[0] ; ldap r11, twos } + vclrdr + { vlmaccr r11[0] ; ldap r11, shifts0 } + { vlsat r11[0] ; mkmsk r0, 4 } + vstrpv r2[0], r0 + + retsp NSTACKWORDS + +.atmp: + .size src_mrhf_adfir_inner_loop_asm_xs3, .atmp-src_mrhf_adfir_inner_loop_asm_xs3 + + .set src_mrhf_adfir_inner_loop_asm_xs3.nstackwords, NSTACKWORDS + .globl src_mrhf_adfir_inner_loop_asm_xs3.nstackwords + .set src_mrhf_adfir_inner_loop_asm_xs3.maxcores, 1 + .globl src_mrhf_adfir_inner_loop_asm_xs3.maxcores + .set src_mrhf_adfir_inner_loop_asm_xs3.maxtimers,0 + .globl src_mrhf_adfir_inner_loop_asm_xs3.maxtimers + .set src_mrhf_adfir_inner_loop_asm_xs3.maxchanends,0 + .globl src_mrhf_adfir_inner_loop_asm_xs3.maxchanends + + .globl src_mrhf_fir_inner_loop_asm_xs3 + .type src_mrhf_fir_inner_loop_asm_xs3,@function + +#undef NSTACKWORDS +#define NSTACKWORDS 8 + + +twos: + .word 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff + .word 0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff +shifts0: + .word 0, 0, 0, 0, 0, 0, 0, 0 +shifts1: + .word 1, 1, 1, 1, 1, 1, 1, 1 +shifts2: + .word 2, 2, 2, 2, 2, 2, 2, 2 + + .align 16 + +src_mrhf_fir_inner_loop_asm_xs3: + { DUALENTSP_u6 NSTACKWORDS ; ldc r11, 0 } + { vsetc r11 ; shr r3, r3, 3} + { ldc r11, 0x20 ; vclrdr } + { bf r3, src_mrhf_fir_done2 ; sub r3, r3, 1 } + +src_mrhf_fir_main_loop2: + { vldc r0[0] ; add r0, r0, r11 } + { vlmaccr r1[0] ; add r1, r1, r11 } + { vldc r0[0] ; add r0, r0, r11 } + { vlmaccr r1[0] ; add r1, r1, r11 } + { bt r3, src_mrhf_fir_main_loop2 ; sub r3, r3, 1 } + +src_mrhf_fir_done2: + ldap r11, shifts2 + { vlsat r11[0] ; ldaw r0, sp[0] } + vstr r0[0] + { vldc r0[0] ; ldap r11, twos } + vclrdr + { vlmaccr r11[0] ; ldap r11, shifts0 } + { vlsat r11[0] ; mkmsk r0, 4 } + vstrpv r2[0], r0 + + retsp NSTACKWORDS + +.btmp: + .size src_mrhf_fir_inner_loop_asm_xs3, .btmp-src_mrhf_fir_inner_loop_asm_xs3 + + .set src_mrhf_fir_inner_loop_asm_xs3.nstackwords, NSTACKWORDS + .globl src_mrhf_fir_inner_loop_asm_xs3.nstackwords + .set src_mrhf_fir_inner_loop_asm_xs3.maxcores, 1 + .globl src_mrhf_fir_inner_loop_asm_xs3.maxcores + .set src_mrhf_fir_inner_loop_asm_xs3.maxtimers,0 + .globl src_mrhf_fir_inner_loop_asm_xs3.maxtimers + .set src_mrhf_fir_inner_loop_asm_xs3.maxchanends,0 + .globl src_mrhf_fir_inner_loop_asm_xs3.maxchanends + + .globl src_mrhf_fir_os_inner_loop_asm_xs3 + .type src_mrhf_fir_os_inner_loop_asm_xs3,@function + +#undef NSTACKWORDS +#define NSTACKWORDS 8 + +evens: + .word 0x7fffffff +odds: + .word 0, 0x7fffffff, 0, 0x7fffffff, 0, 0x7fffffff, 0, 0x7fffffff + + .align 16 +src_mrhf_fir_os_inner_loop_asm_xs3: + + { DUALENTSP_u6 NSTACKWORDS ; ldc r11, 0x0 } + { vsetc r11 ; shr r3, r3, 2 } + { ldc r11, 0x20 ; vclrdr } + { bf r3, src_mrhf_fir_os_done2 ; sub r3, r3, 1 } + +src_mrhf_fir_os_main_loop2: + + { vldc r0[0] ; add r0, r0, r11 } + { vlmaccr r1[0] ; add r1, r1, r11 } + { vlmaccr r1[0] ; add r1, r1, r11 } + + //Decrement loop r3 + { bt r3, src_mrhf_fir_os_main_loop2 ; sub r3, r3, 1 } + +src_mrhf_fir_os_done2: + ldap r11, shifts2 + { vlsat r11[0] ; ldaw r0, sp[0] } + vstr r0[0] + { vldc r0[0] ; ldap r11, evens } + vclrdr + { vlmaccr r11[0] ; add r11, r11, 4 } + { vlmaccr r11[0] ; ldap r11, shifts0 } + { vlsat r11[0] ; mkmsk r0, 8 } + vstrpv r2[0], r0 + + //Pop registers + retsp NSTACKWORDS + +.ctmp: + .size src_mrhf_fir_os_inner_loop_asm_xs3, .ctmp-src_mrhf_fir_os_inner_loop_asm_xs3 + + .set src_mrhf_fir_os_inner_loop_asm_xs3.nstackwords, NSTACKWORDS + .globl src_mrhf_fir_os_inner_loop_asm_xs3.nstackwords + .set src_mrhf_fir_os_inner_loop_asm_xs3.maxcores, 1 + .globl src_mrhf_fir_os_inner_loop_asm_xs3.maxcores + .set src_mrhf_fir_os_inner_loop_asm_xs3.maxtimers,0 + .globl src_mrhf_fir_os_inner_loop_asm_xs3.maxtimers + .set src_mrhf_fir_os_inner_loop_asm_xs3.maxchanends,0 + .globl src_mrhf_fir_os_inner_loop_asm_xs3.maxchanends + +#define FILTER_DEFS_ADFIR_N_PHASES 128 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm_xs3 + .align 16 + .type src_mrhf_spline_coeff_gen_inner_loop_asm_xs3,@function + +#undef NSTACKWORDS +#define NSTACKWORDS 8 + +src_mrhf_spline_coeff_gen_inner_loop_asm_xs3: + DUALENTSP_lu6 NSTACKWORDS + + ldc r3, (FILTER_DEFS_ADFIR_N_PHASES + 2)<< 2 + // p0, p1, p2, p3, ..., p15 + // p0+N, p1+N, p2+N, ....,p15+N + // p0+2N, p1+2N, p2+2N, ....,p15+2N + // p0+3N, p1+3N, p2+3N, ....,p15+3N + // ... + // p0+257N, p1+257N, p2+257N, ....,p15+257N + + // **** + // p0, p0+N, p0+2N, ...., p0+257N + // p1, p1+N, p1+2N, ...., p1+257N + // ... + +// a0 = p[0] * H[2] + p[0+N] * H[1] * p[0+2N] * H[0] +// a1 = p[1] * H[2] + p[1+N] * H[1] * p[1+2N] * H[0] +// a2 = p[2] * H[2] + p[2+N] * H[1] * p[2+2N] * H[0] +// a3 = p[3] * H[2] + p[3+N] * H[1] * p[3+2N] * H[0] + + // Ensure that H is padded with five zeroes. + // There may be a faster way to achieve this with VLMUL + + { vldd r1[0] ; ldaw r1, sp[0] } + { vstd r1[0] ; ldc r11, 0 } + vsetc r11 + stw r11, sp[3] + std r11, r11, sp[2] + std r11, r11, sp[3] +src_mrhf_spline_coeff_gen_main_loop2: + { vclrdr ; ldap r11, shifts2 } + vldc r1[0] + + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + vlsat r11[0] + vstr r2[0] + ldaw r2, r2[8] + vclrdr + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + { vlmaccr r0[0] ; add r0, r0, r3 } + vlsat r11[0] + vstr r2[0] +src_mrhf_spline_coeff_gen_done2: + retsp NSTACKWORDS + +.dtmp: + .size src_mrhf_spline_coeff_gen_inner_loop_asm_xs3, .dtmp-src_mrhf_spline_coeff_gen_inner_loop_asm_xs3 + .cc_bottom src_mrhf_adfir_inner_loop_asm_xs3.function + + .set src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.nstackwords, NSTACKWORDS + .globl src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.nstackwords + .set src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.maxcores, 1 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.maxcores + .set src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.maxtimers,0 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.maxtimers + .set src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.maxchanends,0 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm_xs3.maxchanends +#endif diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_dither_maths_asm.S b/lib_src/lib_src/src/multirate_hifi/src_mrhf_dither_maths_asm.S new file mode 100644 index 0000000..9f88f2a --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_dither_maths_asm.S @@ -0,0 +1,73 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + .section .dp.data,"awd",@progbits + .text + + .cc_top dither_maths_asm.function + .globl dither_maths_asm + .align 8 + .type dither_maths_asm,@function + +dither_maths_asm: + +#define piData r0 +#define ACCh r1 +#define ACCl r2 + + +//In 32b words +#define stack_size 0 + +#if 0 +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 8 + {stw iDataRet_p, sp[6]; shr counter, counter, 3} + + //Constant for adding onto stuff. Gets updated later + ldc step, 0x40 + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + ldd iData0, iData1, piData_p[0] + ldd iCoef0, iCoef1, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + //pop return value pointer from stack so we can use it to write back + //Write back the two return values + {ldw iDataRet_p, sp[6]; ldc counter, 31} //Reuse counter (r3) + + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size +#endif +.atmp: + .size dither_maths_asm, .atmp-dither_maths_asm + .align 8 + .cc_bottom dither_maths_asm.function + + .set dither_maths_asm.nstackwords, stack_size + .globl dither_maths_asm.nstackwords + .set dither_maths_asm.maxcores, 1 + .globl dither_maths_asm.maxcores + .set dither_maths_asm.maxtimers,0 + .globl dither_maths_asm.maxtimers + .set dither_maths_asm.maxchanends,0 + .globl dither_maths_asm.maxchanends + + + diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_filter_defs.c b/lib_src/lib_src/src/multirate_hifi/src_mrhf_filter_defs.c new file mode 100644 index 0000000..b77d50b --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_filter_defs.c @@ -0,0 +1,167 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// Filters Definitions implementation file for the SRC +// +// =========================================================================== +// =========================================================================== + + +// =========================================================================== +// +// Includes +// +// =========================================================================== +#include +#include +#include +#include + +// FIR and FilterDefs includes +#include "src_mrhf_fir.h" +#include "src_mrhf_filter_defs.h" + +// =========================================================================== +// +// Defines +// +// =========================================================================== + + + + +// =========================================================================== +// +// Variables +// +// =========================================================================== + +// SSRC FIR filters descriptors (ordered by ID) +FIRDescriptor_t sSSRCFirDescriptor[FILTER_DEFS_SSRC_N_FIR_ID] = +{ + {FIR_TYPE_DS2, FILTER_DEFS_FIR_BL_N_TAPS, iFirBLCoefs}, // FILTER_DEFS_FIR_BL_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL9644_N_TAPS, iFirBL9644Coefs}, // FILTER_DEFS_FIR_BL9644_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL8848_N_TAPS, iFirBL8848}, // FILTER_DEFS_FIR_BL8848_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL19288_N_TAPS, iFirBL19288Coefs}, // FILTER_DEFS_FIR_BL19288_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL17696_N_TAPS, iFirBL17696}, // FILTER_DEFS_FIR_BL17696_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UP_N_TAPS, iFirUPCoefs}, // FILTER_DEFS_FIR_UP_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UP4844_N_TAPS, iFirUP4844Coefs}, // FILTER_DEFS_FIR_UP4844_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UPF_N_TAPS, iFirUPFCoefs}, // FILTER_DEFS_FIR_UPF_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UP192176_N_TAPS, iFirUP192176Coefs}, // FILTER_DEFS_FIR_UP192176_ID + {FIR_TYPE_DS2, FILTER_DEFS_FIR_DS_N_TAPS, iFirDSCoefs}, // FILTER_DEFS_FIR_DS_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_OS_N_TAPS, iFirOSCoefs}, // FILTER_DEFS_FIR_OS_ID + {FIR_TYPE_SYNC, 0, 0} // FILTER_DEFS_FIR_NONE_ID +}; +// ASRC FIR filters descriptors (ordered by ID) +FIRDescriptor_t sASRCFirDescriptor[FILTER_DEFS_ASRC_N_FIR_ID] = +{ + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL_N_TAPS, iFirBLCoefs}, // FILTER_DEFS_FIR_BL_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL9644_N_TAPS, iFirBL9644Coefs}, // FILTER_DEFS_FIR_BL9644_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL8848_N_TAPS, iFirBL8848}, // FILTER_DEFS_FIR_BL8848_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BLF_N_TAPS, iFirBLFCoefs}, // FILTER_DEFS_FIR_BLF_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL19288_N_TAPS, iFirBL19288Coefs}, // FILTER_DEFS_FIR_BL19288_ID + {FIR_TYPE_SYNC, FILTER_DEFS_FIR_BL17696_N_TAPS, iFirBL17696}, // FILTER_DEFS_FIR_BL17696_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UP_N_TAPS, iFirUPCoefs}, // FILTER_DEFS_FIR_UP_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UP4844_N_TAPS, iFirUP4844Coefs}, // FILTER_DEFS_FIR_UP4844_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UPF_N_TAPS, iFirUPFCoefs}, // FILTER_DEFS_FIR_UPF_ID + {FIR_TYPE_OS2, FILTER_DEFS_FIR_UP192176_N_TAPS, iFirUP192176Coefs}, // FILTER_DEFS_FIR_UP192176_ID + {FIR_TYPE_DS2, FILTER_DEFS_FIR_DS_N_TAPS, iFirDSCoefs}, // FILTER_DEFS_FIR_DS_ID + {FIR_TYPE_SYNC, 0, 0} // FILTER_DEFS_FIR_NONE_ID +}; + +// FIR filters coefficients +int iFirBLCoefs[FILTER_DEFS_FIR_BL_N_TAPS] = { + #include FILTER_DEFS_FIR_BL_FILE +}; +int iFirBL9644Coefs[FILTER_DEFS_FIR_BL9644_N_TAPS] = { + #include FILTER_DEFS_FIR_BL9644_FILE +}; +int iFirBL8848[FILTER_DEFS_FIR_BL8848_N_TAPS] = { + #include FILTER_DEFS_FIR_BL8848_FILE +}; +int iFirBLFCoefs[FILTER_DEFS_FIR_BLF_N_TAPS] = { + #include FILTER_DEFS_FIR_BLF_FILE +}; +int iFirBL19288Coefs[FILTER_DEFS_FIR_BL19288_N_TAPS] = { + #include FILTER_DEFS_FIR_BL19288_FILE +}; +int iFirBL17696[FILTER_DEFS_FIR_BL17696_N_TAPS] = { + #include FILTER_DEFS_FIR_BL17696_FILE +}; +int iFirUPCoefs[FILTER_DEFS_FIR_UP_N_TAPS] = { + #include FILTER_DEFS_FIR_UP_FILE +}; +int iFirUP4844Coefs[FILTER_DEFS_FIR_UP4844_N_TAPS] = { + #include FILTER_DEFS_FIR_UP4844_FILE +}; +int iFirUPFCoefs[FILTER_DEFS_FIR_UPF_N_TAPS] = { + #include FILTER_DEFS_FIR_UPF_FILE +}; +int iFirUP192176Coefs[FILTER_DEFS_FIR_UP192176_N_TAPS] = { + #include FILTER_DEFS_FIR_UP192176_FILE +}; +int iFirDSCoefs[FILTER_DEFS_FIR_DS_N_TAPS] = { + #include FILTER_DEFS_FIR_DS_FILE +}; +int iFirOSCoefs[FILTER_DEFS_FIR_OS_N_TAPS] = { + #include FILTER_DEFS_FIR_OS_FILE +}; + + + +// ADFIR filters descriptor +ADFIRDescriptor_t sADFirDescriptor = +{ + FILTER_DEFS_ADFIR_PHASE_N_TAPS, FILTER_DEFS_ADFIR_N_PHASES + 2, (int *)iADFirCoefs +}; + +// ADFIR filter coefficients +int iADFirPrototypeCoefs[FILTER_DEFS_ADFIR_PROTOTYPE_N_TAPS] = { + #include FILTER_DEFS_ADFIR_PROTOTYPE_FILE +}; +#if SRC_USE_VPU +int iADFirCoefs[FILTER_DEFS_ADFIR_PHASE_N_TAPS][FILTER_DEFS_ADFIR_N_PHASES + 2]; +#else +int iADFirCoefs[FILTER_DEFS_ADFIR_N_PHASES + 2][FILTER_DEFS_ADFIR_PHASE_N_TAPS]; +#endif + +// PPFIR filters descriptors (ordered by ID) +PPFIRDescriptor_t sPPFirDescriptor[FILTER_DEFS_N_PPFIR_ID] = +{ + {FILTER_DEFS_PPFIR_HS294_N_TAPS, FILTER_DEFS_PPFIR_HS294_N_PHASES, iPPFirHS294Coefs}, // FILTER_DEFS_PPFIR_HS294_ID + {FILTER_DEFS_PPFIR_HS320_N_TAPS, FILTER_DEFS_PPFIR_HS320_N_PHASES, iPPFirHS320Coefs}, // FILTER_DEFS_PPFIR_HS320_ID + {0, 0, 0} // FILTER_DEFS_PPFIR_NONE_ID +}; + +// PPFIR filters coefficients +int iPPFirHS294Coefs[FILTER_DEFS_PPFIR_HS294_N_TAPS] = { + #include FILTER_DEFS_PPFIR_HS294_FILE +}; +int iPPFirHS320Coefs[FILTER_DEFS_PPFIR_HS320_N_TAPS] = { + #include FILTER_DEFS_PPFIR_HS320_FILE +}; + + + + +// =========================================================================== +// +// Local Functions prototypes +// +// =========================================================================== + + + + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + + + + + diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_filter_defs.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_filter_defs.h new file mode 100644 index 0000000..b3083c0 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_filter_defs.h @@ -0,0 +1,185 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// Filters Definitions definition file for the SRC +// +// =========================================================================== +// =========================================================================== + +#ifndef _SRC_MRHF_FILTER_DEFS_H_ +#define _SRC_MRHF_FILTER_DEFS_H_ + +#include "use_vpu.h" + + // =========================================================================== + // + // Defines + // + // =========================================================================== + + // General defines + // --------------- + // SSRC FIR filters IDs + #define FILTER_DEFS_SSRC_FIR_BL_ID 0 // ID of BL FIR filter + #define FILTER_DEFS_SSRC_FIR_BL9644_ID 1 // ID of BL9644 FIR filter + #define FILTER_DEFS_SSRC_FIR_BL8848_ID 2 // ID of BL8848 FIR filter + #define FITLER_DEFS_SSRC_FIR_BL19288_ID 3 // ID of BL19288 FIR filter + #define FILTER_DEFS_SSRC_FIR_BL17696_ID 4 // ID of BL17696 FIR filter + #define FILTER_DEFS_SSRC_FIR_UP_ID 5 // ID of UP FIR filter + #define FILTER_DEFS_SSRC_FIR_UP4844_ID 6 // ID of UP4844 FIR filter + #define FILTER_DEFS_SSRC_FIR_UPF_ID 7 // ID of UPF FIR filter + #define FILTER_DEFS_SSRC_FIR_UP192176_ID 8 // ID of UP192176 FIR filter + #define FILTER_DEFS_SSRC_FIR_DS_ID 9 // ID of DS FIR filter + #define FILTER_DEFS_SSRC_FIR_OS_ID 10 // ID of OS FIR filter + #define FILTER_DEFS_SSRC_FIR_NONE_ID 11 // ID of disabled FIR filter + + // ASRC FIR filters IDs + #define FILTER_DEFS_ASRC_FIR_BL_ID 0 // ID of BL FIR filter + #define FILTER_DEFS_ASRC_FIR_BL9644_ID 1 // ID of BL9644 FIR filter + #define FILTER_DEFS_ASRC_FIR_BL8848_ID 2 // ID of BL8848 FIR filter + #define FITLER_DEFS_ASRC_FIR_BLF_ID 3 // ID of BLF FIR filter + #define FITLER_DEFS_ASRC_FIR_BL19288_ID 4 // ID of BL19288 FIR filter + #define FILTER_DEFS_ASRC_FIR_BL17696_ID 5 // ID of BL17696 FIR filter + #define FILTER_DEFS_ASRC_FIR_UP_ID 6 // ID of UP FIR filter + #define FILTER_DEFS_ASRC_FIR_UP4844_ID 7 // ID of UP4844 FIR filter + #define FILTER_DEFS_ASRC_FIR_UPF_ID 8 // ID of UPF FIR filter + #define FILTER_DEFS_ASRC_FIR_UP192176_ID 9 // ID of UP192176 FIR filter + #define FILTER_DEFS_ASRC_FIR_DS_ID 10 // ID of DS FIR filter + #define FILTER_DEFS_ASRC_FIR_NONE_ID 11 // ID of disabled FIR filter + + + #define FILTER_DEFS_SSRC_N_FIR_ID (FILTER_DEFS_SSRC_FIR_NONE_ID + 1) // Number of FIR IDs corresponding to real FIRs + #define FILTER_DEFS_ASRC_N_FIR_ID (FILTER_DEFS_ASRC_FIR_NONE_ID + 1) // Number of FIR IDs corresponding to real FIRs + + // FIR filter number of taps + #define FILTER_DEFS_FIR_BL_N_TAPS 144 // Number of taps of BL FIR filter + #define FILTER_DEFS_FIR_BL9644_N_TAPS 160 // Number of taps of BL9644 FIR filter + #define FILTER_DEFS_FIR_BL8848_N_TAPS 144 // Number of taps of BL8848 filter + #define FILTER_DEFS_FIR_BLF_N_TAPS 96 // Number of taps of BLF FIR filter + #define FILTER_DEFS_FIR_BL19288_N_TAPS 96 // Number of taps of BL19288 filter + #define FILTER_DEFS_FIR_BL17696_N_TAPS 96 // Number of taps of BL17696 filter + #define FILTER_DEFS_FIR_UP_N_TAPS 144 // Number of taps of UP filter + #define FILTER_DEFS_FIR_UP4844_N_TAPS 160 // Number of taps of UP4844 filter + #define FILTER_DEFS_FIR_UPF_N_TAPS 96 // Number of taps of UPF filter + #define FILTER_DEFS_FIR_UP192176_N_TAPS 96 // Number of taps of UP192176 filter + #define FILTER_DEFS_FIR_DS_N_TAPS 32 // Number of taps of DS filter + #define FILTER_DEFS_FIR_OS_N_TAPS 32 // Number of taps of OS filter + + #define FILTER_DEFS_FIR_MAX_TAPS_LONG FILTER_DEFS_FIR_BL9644_N_TAPS // Maximum number of taps for long FIR filter + #define FILTER_DEFS_FIR_MAX_TAPS_SHORT FILTER_DEFS_FIR_DS_N_TAPS // Maximum number of taps for short FIR filter + + // FIR filter coefficients files +#if SRC_USE_VPU + #define FILTER_DEFS_FIR_BL_FILE "FilterData/BL.dat" // Coefficients file for BL FIR filter + #define FILTER_DEFS_FIR_BL9644_FILE "FilterData/BL9644.dat" // Coefficients file for BL9644 FIR filter + #define FILTER_DEFS_FIR_BL8848_FILE "FilterData/BL8848.dat" // Coefficients file for BL8848 filter + #define FILTER_DEFS_FIR_BLF_FILE "FilterData/BLF.dat" // Coefficients file for BLF FIR filter + #define FILTER_DEFS_FIR_BL19288_FILE "FilterData/BL19288.dat" // Coefficients file for BL19288 FIR filter + #define FILTER_DEFS_FIR_BL17696_FILE "FilterData/BL17696.dat" // Coefficients file for BL17696 filter + #define FILTER_DEFS_FIR_UP_FILE "FilterData/UP_xs3.dat" // Coefficients file for UP filter + #define FILTER_DEFS_FIR_UP4844_FILE "FilterData/UP4844_xs3.dat" // Coefficients file for UP4844 filter + #define FILTER_DEFS_FIR_UPF_FILE "FilterData/UPF_xs3.dat" // Coefficients file for UPF filter + #define FILTER_DEFS_FIR_UP192176_FILE "FilterData/UP192176_xs3.dat" // Coefficients file for UP192176 filter + #define FILTER_DEFS_FIR_OS_FILE "FilterData/OS_xs3.dat" // Coefficients file for OS filter +#else + #define FILTER_DEFS_FIR_BL_FILE "FilterData/BL.dat" // Coefficients file for BL FIR filter + #define FILTER_DEFS_FIR_BL9644_FILE "FilterData/BL9644.dat" // Coefficients file for BL9644 FIR filter + #define FILTER_DEFS_FIR_BL8848_FILE "FilterData/BL8848.dat" // Coefficients file for BL8848 filter + #define FILTER_DEFS_FIR_BLF_FILE "FilterData/BLF.dat" // Coefficients file for BLF FIR filter + #define FILTER_DEFS_FIR_BL19288_FILE "FilterData/BL19288.dat" // Coefficients file for BL19288 FIR filter + #define FILTER_DEFS_FIR_BL17696_FILE "FilterData/BL17696.dat" // Coefficients file for BL17696 filter + #define FILTER_DEFS_FIR_UP_FILE "FilterData/UP.dat" // Coefficients file for UP filter + #define FILTER_DEFS_FIR_UP4844_FILE "FilterData/UP4844.dat" // Coefficients file for UP4844 filter + #define FILTER_DEFS_FIR_UPF_FILE "FilterData/UPF.dat" // Coefficients file for UPF filter + #define FILTER_DEFS_FIR_UP192176_FILE "FilterData/UP192176.dat" // Coefficients file for UP192176 filter + #define FILTER_DEFS_FIR_OS_FILE "FilterData/OS.dat" // Coefficients file for OS filter +#endif + #define FILTER_DEFS_FIR_DS_FILE "FilterData/DS.dat" // Coefficients file for DS filter + + // ADFIR filter number of taps and phases + #define FILTER_DEFS_ADFIR_PROTOTYPE_N_TAPS 1920 // Number of taps of ADFIR filter prototype + + #define FILTER_DEFS_ADFIR_N_PHASES 128 // Number of phases of ADFIR filter + #define FILTER_DEFS_ADFIR_PHASE_N_TAPS ((FILTER_DEFS_ADFIR_PROTOTYPE_N_TAPS / FILTER_DEFS_ADFIR_N_PHASES) + 1) // Number of taps per phase + #define FILTER_DEFS_ADFIR_N_TAPS (FILTER_DEFS_ADFIR_N_PHASES + 2) * FILTER_DEFS_ADFIR_PHASE_N_TAPS // Here 130 phases of 16 taps = 2080 coefs + + // ADFIR filter coefficients files + #define FILTER_DEFS_ADFIR_PROTOTYPE_FILE "FilterData/ADFir.dat" // Coefficients file for the ADFIR filter (prototype) + + // PPFIR filters IDs + #define FILTER_DEFS_PPFIR_HS294_ID 0 // ID of HS294 PPFIR filter + #define FILTER_DEFS_PPFIR_HS320_ID 1 // ID of HS320 PPFIR filter + #define FILTER_DEFS_PPFIR_NONE_ID 2 // ID of disabled PPFIR filter + + #define FILTER_DEFS_N_PPFIR_ID (FILTER_DEFS_PPFIR_NONE_ID + 1) // Number of PPFIR IDs corresponding to real PPFIRs + + // PPFIR filter number of taps and phases + #define FILTER_DEFS_PPFIR_HS294_N_TAPS 2352 // Number of taps of HS294 PPFIR filter + #define FILTER_DEFS_PPFIR_HS294_N_PHASES 147 // Number of phases of HS294 PPFIR filter + #define FILTER_DEFS_PPFIR_HS320_N_TAPS 2560 // Number of taps of HS320 PPFIR filter + #define FILTER_DEFS_PPFIR_HS320_N_PHASES 160 // Number of phases of HS284 PPFIR filter + + #define FILTER_DEFS_PPFIR_PHASE_MAX_TAPS (FILTER_DEFS_PPFIR_HS320_N_TAPS / FILTER_DEFS_PPFIR_HS320_N_PHASES) // Maximum number of taps per phase + + #define FILTER_DEFS_PPFIR_PHASE_STEP_0 0 + #define FILTER_DEFS_PPFIR_PHASE_STEP_147 147 + #define FILTER_DEFS_PPFIR_PHASE_STEP_294 294 + #define FILTER_DEFS_PPFIR_PHASE_STEP_160 160 + #define FILTER_DEFS_PPFIR_PHASE_STEP_320 320 + + // PPFIR filter coefficients files + #define FILTER_DEFS_PPFIR_HS294_FILE "FilterData/HS294.dat" // Coefficients file for HS294 PPFIR filter + #define FILTER_DEFS_PPFIR_HS320_FILE "FilterData/HS320.dat" // Coefficients file for HS320 PPFIR filter + + + + // =========================================================================== + // + // Variables + // + // =========================================================================== + + // FIR filters descriptors (ordered by ID) + extern FIRDescriptor_t sSSRCFirDescriptor[FILTER_DEFS_SSRC_N_FIR_ID]; + extern FIRDescriptor_t sASRCFirDescriptor[FILTER_DEFS_ASRC_N_FIR_ID]; + + // FIR filters coefficients + extern int iFirBLCoefs[FILTER_DEFS_FIR_BL_N_TAPS]; + extern int iFirBL9644Coefs[FILTER_DEFS_FIR_BL9644_N_TAPS]; + extern int iFirBL8848[FILTER_DEFS_FIR_BL8848_N_TAPS]; + extern int iFirBLFCoefs[FILTER_DEFS_FIR_BLF_N_TAPS]; + extern int iFirBL19288Coefs[FILTER_DEFS_FIR_BL19288_N_TAPS]; + extern int iFirBL17696[FILTER_DEFS_FIR_BL17696_N_TAPS]; + extern int iFirUPCoefs[FILTER_DEFS_FIR_UP_N_TAPS]; + extern int iFirUP4844Coefs[FILTER_DEFS_FIR_UP4844_N_TAPS]; + extern int iFirUPFCoefs[FILTER_DEFS_FIR_UPF_N_TAPS]; + extern int iFirUP192176Coefs[FILTER_DEFS_FIR_UP192176_N_TAPS]; + extern int iFirDSCoefs[FILTER_DEFS_FIR_DS_N_TAPS]; + extern int iFirOSCoefs[FILTER_DEFS_FIR_OS_N_TAPS]; + + // ADFIR filter descriptor + extern ADFIRDescriptor_t sADFirDescriptor; + // ADFIR filters coefficients + extern int iADFirPrototypeCoefs[FILTER_DEFS_ADFIR_PROTOTYPE_N_TAPS]; +#if SRC_USE_VPU + extern int iADFirCoefs[FILTER_DEFS_ADFIR_PHASE_N_TAPS][FILTER_DEFS_ADFIR_N_PHASES + 2]; +#else + extern int iADFirCoefs[FILTER_DEFS_ADFIR_N_PHASES + 2][FILTER_DEFS_ADFIR_PHASE_N_TAPS]; +#endif + + // PPFIR filters descriptors (ordered by ID) + extern PPFIRDescriptor_t sPPFirDescriptor[FILTER_DEFS_N_PPFIR_ID]; + // FIR filters coefficients + extern int iPPFirHS294Coefs[FILTER_DEFS_PPFIR_HS294_N_TAPS]; + extern int iPPFirHS320Coefs[FILTER_DEFS_PPFIR_HS320_N_TAPS]; + + // =========================================================================== + // + // TypeDefs + // + // =========================================================================== + + +#endif // _SRC_MRHF_FILTER_DEFS_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir.c b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir.c new file mode 100644 index 0000000..525f585 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir.c @@ -0,0 +1,723 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// FIR functions implementation file for the ASRC and SSRC +// +// +// =========================================================================== +// =========================================================================== + + +// =========================================================================== +// +// Includes +// +// =========================================================================== +#include +#include +#include +#include + +// Optimised assembler inner loop functions +#include "src_mrhf_fir_os_inner_loop_asm.h" +#include "src_mrhf_fir_inner_loop_asm.h" +#include "src_mrhf_adfir_inner_loop_asm.h" +#include "src_mrhf_spline_coeff_gen_inner_loop_asm.h" + +// FIR includes +#include "src_mrhf_fir.h" +#include "use_vpu.h" + +// =========================================================================== +// +// Defines +// +// =========================================================================== + + +// State init value +#define FIR_STATE_INIT 0 + + + + + +// =========================================================================== +// +// Variables +// +// =========================================================================== + + + +// =========================================================================== +// +// Local Functions prototypes +// +// =========================================================================== + + + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + +// ==================================================================== // +// Function: FIR_init_from_desc // +// Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // +// FIRDescriptor_t *psFIRDescriptor: Desc. strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Inits the FIR from the Descriptor // +// ==================================================================== // +FIRReturnCodes_t FIR_init_from_desc(FIRCtrl_t* psFIRCtrl, FIRDescriptor_t* psFIRDescriptor) +{ + + // Check if FIR is disabled (this is given by the number of coefficients being zero) + if( psFIRDescriptor->uiNCoefs == 0) + { + // Number of coefficients is zero, so disable FIR + psFIRCtrl->eEnable = FIR_OFF; + psFIRCtrl->uiNOutSamples = 0; + psFIRCtrl->pvProc = 0; + psFIRCtrl->uiDelayL = 0; + psFIRCtrl->piDelayW = 0; + psFIRCtrl->uiDelayO = 0; + psFIRCtrl->uiNLoops = 0; + psFIRCtrl->uiNCoefs = 0; + psFIRCtrl->piCoefs = 0; + + return FIR_NO_ERROR; + } + + // FIR is not disabled + // Check that delay line base has been set + if(psFIRCtrl->piDelayB == 0) + return FIR_ERROR; + + // Check that number of samples has been set and is a multiple of 2 + if(psFIRCtrl->uiNInSamples == 0) + return FIR_ERROR; + if((psFIRCtrl->uiNInSamples & 0x1) != 0x0) + return FIR_ERROR; + + // Check the input and output samples steps have been set + if(psFIRCtrl->uiInStep == 0) + return FIR_ERROR; + if(psFIRCtrl->uiOutStep == 0) + return FIR_ERROR; + + // Setup depending on FIR descriptor + switch(psFIRDescriptor->eType) + { + // Over-sampler by 2 type + case FIR_TYPE_OS2: + if( (psFIRDescriptor->uiNCoefs & 0x3) != 0x0) // Check that number of coefficients is a multiple of 4 + return FIR_ERROR; + psFIRCtrl->eEnable = FIR_ON; + psFIRCtrl->uiNOutSamples = (psFIRCtrl->uiNInSamples)<<1; // Os2 FIR doubles the number of samples + psFIRCtrl->pvProc = (FIRReturnCodes_t (*)(int *)) FIR_proc_os2; + psFIRCtrl->uiDelayL = psFIRDescriptor->uiNCoefs; // Double length for circular buffer simulation, but only half length due to OS2 + psFIRCtrl->piDelayW = psFIRCtrl->piDelayB + (psFIRDescriptor->uiNCoefs>>1); + psFIRCtrl->uiDelayO = psFIRDescriptor->uiNCoefs>>1; + psFIRCtrl->uiNLoops = psFIRDescriptor->uiNCoefs>>2; // Due to 2 x 32bits read for data and 4 x 32bits for coefs per inner loop + psFIRCtrl->uiNCoefs = psFIRDescriptor->uiNCoefs; + psFIRCtrl->piCoefs = psFIRDescriptor->piCoefs; + break; + + // Asynchronous type + case FIR_TYPE_SYNC: + if( (psFIRDescriptor->uiNCoefs & 0x1) != 0x0) // Check that number of coefficients is a multiple of 2 + return FIR_ERROR; + // Non zero coefficients number, so it is a true filter + psFIRCtrl->eEnable = FIR_ON; + psFIRCtrl->uiNOutSamples = psFIRCtrl->uiNInSamples; // Sync FIR does not change number of samples + psFIRCtrl->pvProc = (FIRReturnCodes_t (*)(int *)) FIR_proc_sync; + psFIRCtrl->uiDelayL = psFIRDescriptor->uiNCoefs<<1; // Double length for circular buffer simulation + psFIRCtrl->piDelayW = psFIRCtrl->piDelayB + psFIRDescriptor->uiNCoefs; + psFIRCtrl->uiDelayO = psFIRDescriptor->uiNCoefs; + psFIRCtrl->uiNLoops = psFIRDescriptor->uiNCoefs>>1; // Due to 2 x 32bits read for data and coefs per inner loop + psFIRCtrl->uiNCoefs = psFIRDescriptor->uiNCoefs; + psFIRCtrl->piCoefs = psFIRDescriptor->piCoefs; + break; + + // Down-sample by 2 type + case FIR_TYPE_DS2: + if( (psFIRDescriptor->uiNCoefs & 0x1) != 0x0) // Check that number of coefficients is a multiple of 2 + return FIR_ERROR; + psFIRCtrl->eEnable = FIR_ON; + psFIRCtrl->uiNOutSamples = psFIRCtrl->uiNInSamples>>1; // Ds2 FIR divides the number of samples by two + psFIRCtrl->pvProc = (FIRReturnCodes_t (*)(int *)) FIR_proc_ds2; + psFIRCtrl->uiDelayL = psFIRDescriptor->uiNCoefs<<1; // Double length for circular buffer simulation + psFIRCtrl->piDelayW = psFIRCtrl->piDelayB + psFIRDescriptor->uiNCoefs; + psFIRCtrl->uiDelayO = psFIRDescriptor->uiNCoefs; + psFIRCtrl->uiNLoops = psFIRDescriptor->uiNCoefs>>1; // Due to 2 x 32bits read for data and coefs per inner loop + psFIRCtrl->uiNCoefs = psFIRDescriptor->uiNCoefs; + psFIRCtrl->piCoefs = psFIRDescriptor->piCoefs; + break; + + // Unrecognized type + default: + return FIR_ERROR; + } + + // Sync the FIR + if(FIR_sync(psFIRCtrl) != FIR_NO_ERROR) + return FIR_ERROR; + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: FIR_sync // +// Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Syncs the FIR // +// ==================================================================== // +FIRReturnCodes_t FIR_sync(FIRCtrl_t* psFIRCtrl) +{ + unsigned int ui; + + if(psFIRCtrl->eEnable == FIR_ON) + { + // Set delay line index back to base + psFIRCtrl->piDelayI = psFIRCtrl->piDelayB; + + // Clear delay line + for(ui = 0; ui < psFIRCtrl->uiDelayL; ui++) + psFIRCtrl->piDelayB[ui] = FIR_STATE_INIT; + } + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: FIR_proc_os2 // +// Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Processes the FIR in over-sample by 2 mode // +// ==================================================================== // + __attribute__((fptrgroup("MRHF_G1"))) +FIRReturnCodes_t FIR_proc_os2(FIRCtrl_t* psFIRCtrl) +{ + int* piIn = psFIRCtrl->piIn; + unsigned int uiInStep = psFIRCtrl->uiInStep; + int* piOut = psFIRCtrl->piOut; + unsigned int uiOutStep = psFIRCtrl->uiOutStep; + int* piDelayB = psFIRCtrl->piDelayB; + int* piDelayI = psFIRCtrl->piDelayI; + int* piDelayW = psFIRCtrl->piDelayW; + unsigned int uiDelayO = psFIRCtrl->uiDelayO; + int* piCoefsB = psFIRCtrl->piCoefs; + unsigned int uiNLoops = psFIRCtrl->uiNLoops; + int* piData; + int* piCoefs; + int DWORD_ALIGNED iData[2]; + unsigned ui; + + for(ui = 0; ui < psFIRCtrl->uiNInSamples; ui+=2) //Note step by 2 as inner loop unrolled twice + { + // Get new data sample to delay line (double write for circular buffer simulation) with step + iData[0] = *piIn; + piIn += uiInStep; + // Double write to simulate circular buffer + *piDelayI = iData[0]; + *(piDelayI + uiDelayO) = iData[0]; + + // Step delay (with circular simulation) + piDelayI++; + if(piDelayI >= piDelayW) + piDelayI = piDelayB; + + // Set access pointers + piData = piDelayI; + piCoefs = piCoefsB; + + //printf("piData = %p, piCoefs = %p\n", piData, piCoefs); +#if SRC_USE_VPU + src_mrhf_fir_os_inner_loop_asm_xs3(piData, piCoefs, iData, uiNLoops); +#else + if ((unsigned)piData & 0b0100) + src_mrhf_fir_os_inner_loop_asm_odd(piData, piCoefs, iData, uiNLoops); + else + src_mrhf_fir_os_inner_loop_asm(piData, piCoefs, iData, uiNLoops); +#endif + + // Write output with step + // NOTE OUTPUT WRITE ORDER: First iData[1], then iData[0] + *piOut = iData[1]; + piOut += uiOutStep; + *piOut = iData[0]; + piOut += uiOutStep; + + // Get new data sample to delay line (double write for circular buffer simulation) with step + iData[0] = *piIn; + piIn += uiInStep; + // Double write to simulate circular buffer + *piDelayI = iData[0]; + *(piDelayI + uiDelayO) = iData[0]; + + // Step delay (with circular simulation) + piDelayI++; + if(piDelayI >= piDelayW) + piDelayI = piDelayB; + + // Set access pointers + piData = piDelayI; + piCoefs = piCoefsB; + + //printf("piData = %p, piCoefs = %p\n", piData, piCoefs); +#if SRC_USE_VPU + src_mrhf_fir_os_inner_loop_asm_xs3(piData, piCoefs, iData, uiNLoops); +#else + if ((unsigned)piData & 0b0100) + src_mrhf_fir_os_inner_loop_asm_odd(piData, piCoefs, iData, uiNLoops); + else + src_mrhf_fir_os_inner_loop_asm(piData, piCoefs, iData, uiNLoops); +#endif + + // Write output with step + // NOTE OUTPUT WRITE ORDER: First iData[1], then iData[0] + *piOut = iData[1]; + piOut += uiOutStep; + *piOut = iData[0]; + piOut += uiOutStep; + } + // Write delay line index back for next round + psFIRCtrl->piDelayI = piDelayI; + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: FIR_proc_sync // +// Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Processes the FIR in asynchronous mode // +// ==================================================================== // +__attribute__((fptrgroup("MRHF_G1"))) +FIRReturnCodes_t FIR_proc_sync(FIRCtrl_t* psFIRCtrl) +{ + int* piIn = psFIRCtrl->piIn; + unsigned int uiInStep = psFIRCtrl->uiInStep; + int* piOut = psFIRCtrl->piOut; + unsigned int uiOutStep = psFIRCtrl->uiOutStep; + int* piDelayB = psFIRCtrl->piDelayB; + int* piDelayI = psFIRCtrl->piDelayI; + int* piDelayW = psFIRCtrl->piDelayW; + unsigned int uiDelayO = psFIRCtrl->uiDelayO; + int* piCoefsB = psFIRCtrl->piCoefs; + unsigned int uiNLoops = psFIRCtrl->uiNLoops; + int* piData; + int* piCoefs; + int iData0; + unsigned ui; + + for(ui = 0; ui < psFIRCtrl->uiNInSamples; ui++) + { + // Get new data sample to delay line (double write for circular buffer simulation) with step + iData0 = *piIn; + piIn += uiInStep; + // Double write to simulate circular buffer + *piDelayI = iData0; + *(piDelayI + uiDelayO) = iData0; + // Step delay (with circular simulation) + piDelayI++; + if(piDelayI >= piDelayW) + piDelayI = piDelayB; + + // Clear accumulator and set access pointers + piData = piDelayI; + piCoefs = piCoefsB; + +#if SRC_USE_VPU + src_mrhf_fir_inner_loop_asm_xs3(piData, piCoefs, &iData0, uiNLoops); +#else + if ((unsigned)piData & 0b0100) src_mrhf_fir_inner_loop_asm_odd(piData, piCoefs, &iData0, uiNLoops); + else src_mrhf_fir_inner_loop_asm(piData, piCoefs, &iData0, uiNLoops); +#endif + + // Write output with step + *piOut = iData0; + piOut += uiOutStep; + } + + // Write delay line index back for next round + psFIRCtrl->piDelayI = piDelayI; + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: FIR_proc_ds2 // +// Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Processes the FIR in down-sample by 2 mode // +// ==================================================================== // +__attribute__((fptrgroup("MRHF_G1"))) +FIRReturnCodes_t FIR_proc_ds2(FIRCtrl_t* psFIRCtrl) +{ + int* piIn = psFIRCtrl->piIn; + unsigned int uiInStep = psFIRCtrl->uiInStep; + int* piOut = psFIRCtrl->piOut; + unsigned int uiOutStep = psFIRCtrl->uiOutStep; + int* piDelayB = psFIRCtrl->piDelayB; + int* piDelayI = psFIRCtrl->piDelayI; + int* piDelayW = psFIRCtrl->piDelayW; + unsigned int uiDelayO = psFIRCtrl->uiDelayO; + int* piCoefsB = psFIRCtrl->piCoefs; + unsigned int uiNLoops = psFIRCtrl->uiNLoops; + int* piData; + int* piCoefs; + int iData0, iData1; + unsigned ui; + + for(ui = 0; ui < psFIRCtrl->uiNInSamples>>1; ui++) + { + // Get two new data samples to delay line (double write for circular buffer simulation), with input buffer step + iData0 = *piIn; + piIn += uiInStep; + iData1 = *piIn; + piIn += uiInStep; + // Double write to simulate circular buffer with DUAL store instruction + *piDelayI = iData0; + *(piDelayI + 1) = iData1; + *(piDelayI + uiDelayO) = iData0; + *(piDelayI + uiDelayO + 1) = iData1; + // Step delay with circular simulation + piDelayI += 2; + if(piDelayI >= piDelayW) + piDelayI = piDelayB; + + // Clear accumulator and set access pointers + piData = piDelayI; + piCoefs = piCoefsB; +#if SRC_USE_VPU + src_mrhf_fir_inner_loop_asm_xs3(piData, piCoefs, &iData0, uiNLoops); +#else + if ((unsigned)piData & 0b0100) src_mrhf_fir_inner_loop_asm_odd(piData, piCoefs, &iData0, uiNLoops); + else src_mrhf_fir_inner_loop_asm(piData, piCoefs, &iData0, uiNLoops); +#endif + // Write output with step + *piOut = iData0; + piOut += uiOutStep; + } + + // Write delay line index back for next round + psFIRCtrl->piDelayI = piDelayI; + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: ADFIR_init_from_desc // +// Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // +// ADFIRDescriptor_t *psADFIRDescriptor: Desc. strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Inits the ADFIR from the Descriptor // +// ==================================================================== // +FIRReturnCodes_t ADFIR_init_from_desc(ADFIRCtrl_t* psADFIRCtrl, ADFIRDescriptor_t* psADFIRDescriptor) +{ + unsigned int uiPhaseLength; + + // Check that delay line base has been set + if(psADFIRCtrl->piDelayB == 0) + return FIR_ERROR; + + // Check that adaptive coefs buffer has been set + if(psADFIRCtrl->piADCoefs == 0) + return FIR_ERROR; + + // Check that number of phases and number of coefficients per phaseare set + if(psADFIRDescriptor->uiNPhases == 0) + return FIR_ERROR; + if(psADFIRDescriptor->uiNCoefsPerPhase == 0) + return FIR_ERROR; + + uiPhaseLength = psADFIRDescriptor->uiNCoefsPerPhase; + // Setup ADFIR + psADFIRCtrl->uiDelayL = uiPhaseLength<<1; // Double length for circular buffer simulation + psADFIRCtrl->piDelayW = psADFIRCtrl->piDelayB + uiPhaseLength; + psADFIRCtrl->uiDelayO = uiPhaseLength; + psADFIRCtrl->uiNLoops = uiPhaseLength>>1; // Due to 2 x 32bits read for data and coefs per inner loop + + // Sync the ADFIR + if(ADFIR_sync(psADFIRCtrl) != FIR_NO_ERROR) + return FIR_ERROR; + + return FIR_NO_ERROR; +} + +// ==================================================================== // +// Function: ADFIR_snyc // +// Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Syncs the ADFIR filter // +// ==================================================================== // +FIRReturnCodes_t ADFIR_sync(ADFIRCtrl_t* psADFIRCtrl) +{ + unsigned int ui; + + // Set delay line index back to base + psADFIRCtrl->piDelayI = psADFIRCtrl->piDelayB; + + // Clear delay line + for(ui = 0; ui < psADFIRCtrl->uiDelayL; ui++) + psADFIRCtrl->piDelayB[ui] = FIR_STATE_INIT; + + return FIR_NO_ERROR; +} + +// ==================================================================== // +// Function: ADFIR_proc_in_sample // +// Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Gets new input sample to delay line with step // +// ==================================================================== // +FIRReturnCodes_t ADFIR_proc_in_spl(ADFIRCtrl_t* psADFIRCtrl) +{ + // Double write to simulate circular buffer + *psADFIRCtrl->piDelayI = psADFIRCtrl->iIn; + *(psADFIRCtrl->piDelayI + psADFIRCtrl->uiDelayO) = psADFIRCtrl->iIn; + // Step delay (with circular simulation) + psADFIRCtrl->piDelayI++; + if(psADFIRCtrl->piDelayI >= psADFIRCtrl->piDelayW) + psADFIRCtrl->piDelayI = psADFIRCtrl->piDelayB; + + return FIR_NO_ERROR; +} + +// ==================================================================== // +// Function: ADFIR_proc_macc // +// Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Processes the macc loop for the ADFIR filter // +// ==================================================================== // +FIRReturnCodes_t ADFIR_proc_macc(ADFIRCtrl_t* psADFIRCtrl) +{ + int* piData; + int* piCoefs; + int iData; + + + + //*(psADFIRCtrl->piOut) = *psADFIRCtrl->piDelayI; + + // Clear accumulator and set access pointers + piData = psADFIRCtrl->piDelayI; + piCoefs = psADFIRCtrl->piADCoefs; + if ((unsigned)piData & 0b0100) src_mrhf_adfir_inner_loop_asm_odd(piData, piCoefs, &iData, psADFIRCtrl->uiNLoops); + else src_mrhf_adfir_inner_loop_asm(piData, piCoefs, &iData, psADFIRCtrl->uiNLoops); + + // Write output + *(psADFIRCtrl->piOut) = iData; + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: PPFIR_init_from_desc // +// Arguments: PPFIRCtrl_t *psPPFIRCtrl: Ctrl strct. // +// PPFIRDescriptor_t *psPPFIRDescriptor: Desc. strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Inits the PPFIR from the Descriptor // +// ==================================================================== // +FIRReturnCodes_t PPFIR_init_from_desc(PPFIRCtrl_t* psPPFIRCtrl, PPFIRDescriptor_t* psPPFIRDescriptor) +{ + unsigned int uiPhaseLength; + + // Check if PPFIR is disabled (this is given by the number of coefficients being zero) + if( psPPFIRDescriptor->uiNCoefs == 0) + { + // Number of coefficients is zero, so disable FIR + psPPFIRCtrl->eEnable = FIR_OFF; + psPPFIRCtrl->uiNOutSamples = 0; + psPPFIRCtrl->uiDelayL = 0; + psPPFIRCtrl->piDelayW = 0; + psPPFIRCtrl->uiDelayO = 0; + psPPFIRCtrl->uiNLoops = 0; + psPPFIRCtrl->uiNCoefs = 0; + psPPFIRCtrl->piCoefs = 0; + psPPFIRCtrl->uiNPhases = 0; + psPPFIRCtrl->uiPhaseStep = 0; + psPPFIRCtrl->uiCoefsPhaseStep = 0; + psPPFIRCtrl->uiCoefsPhase = 0; + return FIR_NO_ERROR; + } + + // Check that delay line base has been set + if(psPPFIRCtrl->piDelayB == 0) + return FIR_ERROR; + + // Check that number of samples has been set and is a multiple of 2 + if(psPPFIRCtrl->uiNInSamples == 0) + return FIR_ERROR; + + // Check the input and output samples steps have been set + if(psPPFIRCtrl->uiInStep == 0) + return FIR_ERROR; + if(psPPFIRCtrl->uiOutStep == 0) + return FIR_ERROR; + + // Check that phase step has been set properly + if(psPPFIRCtrl->uiPhaseStep == 0) + return FIR_ERROR; + + // Check that number of phases and number of coefficients are compatible + uiPhaseLength = (psPPFIRDescriptor->uiNCoefs / psPPFIRDescriptor->uiNPhases); + if(uiPhaseLength == 0) + return FIR_ERROR; + if((uiPhaseLength * psPPFIRDescriptor->uiNPhases) != psPPFIRDescriptor->uiNCoefs) + return FIR_ERROR; + if((uiPhaseLength & 0x1) != 0) + return FIR_ERROR; + + // Setup PPFIR + psPPFIRCtrl->eEnable = FIR_ON; + psPPFIRCtrl->uiDelayL = uiPhaseLength<<1; // Double length for circular buffer simulation + psPPFIRCtrl->piDelayW = psPPFIRCtrl->piDelayB + uiPhaseLength; + psPPFIRCtrl->uiDelayO = uiPhaseLength; + psPPFIRCtrl->uiNLoops = uiPhaseLength>>1; // Due to 2 x 32bits read for data and coefs per inner loop + psPPFIRCtrl->uiNCoefs = psPPFIRDescriptor->uiNCoefs; + psPPFIRCtrl->piCoefs = psPPFIRDescriptor->piCoefs; + psPPFIRCtrl->uiNPhases = psPPFIRDescriptor->uiNPhases; + psPPFIRCtrl->uiCoefsPhaseStep = psPPFIRCtrl->uiPhaseStep * uiPhaseLength; // Length (number of coefs) of a phase step + + // Sync the PPFIR + if(PPFIR_sync(psPPFIRCtrl) != FIR_NO_ERROR) + return FIR_ERROR; + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: PPFIR_snyc // +// Arguments: PPFIRCtrl_t *psPPFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Syncs the PPFIR polyphase filter // +// ==================================================================== // +FIRReturnCodes_t PPFIR_sync(PPFIRCtrl_t* psPPFIRCtrl) +{ + unsigned int ui; + + if(psPPFIRCtrl->eEnable == FIR_ON) + { + // Set delay line index back to base + psPPFIRCtrl->piDelayI = psPPFIRCtrl->piDelayB; + + // Clear delay line + for(ui = 0; ui < psPPFIRCtrl->uiDelayL; ui++) + psPPFIRCtrl->piDelayB[ui] = FIR_STATE_INIT; + + // Set coefficients phase to zero + psPPFIRCtrl->uiCoefsPhase = 0; + + // Clear number of output sampes + psPPFIRCtrl->uiNOutSamples = 0; + } + + + return FIR_NO_ERROR; +} + + +// ==================================================================== // +// Function: PPFIR_proc // +// Arguments: PPFIRCtrl_t *psPPFIRCtrl: Ctrl strct. // +// Return values: FIR_NO_ERROR on success // +// FIR_ERROR on failure // +// Description: Processes the PPFIR polyphase filter // +// ==================================================================== // +FIRReturnCodes_t PPFIR_proc(PPFIRCtrl_t* psPPFIRCtrl) +{ + int* piIn = psPPFIRCtrl->piIn; + unsigned int uiInStep = psPPFIRCtrl->uiInStep; + int* piOut = psPPFIRCtrl->piOut; + unsigned int uiOutStep = psPPFIRCtrl->uiOutStep; + int* piDelayB = psPPFIRCtrl->piDelayB; + int* piDelayI = psPPFIRCtrl->piDelayI; + int* piDelayW = psPPFIRCtrl->piDelayW; + unsigned int uiDelayO = psPPFIRCtrl->uiDelayO; + int* piCoefsB = psPPFIRCtrl->piCoefs; + unsigned int uiNLoops = psPPFIRCtrl->uiNLoops; + unsigned int uiNCoefs = psPPFIRCtrl->uiNCoefs; + unsigned int uiCoefsPhase = psPPFIRCtrl->uiCoefsPhase; + unsigned int uiCoefsPhaseStep = psPPFIRCtrl->uiCoefsPhaseStep; + int* piData; + int* piCoefs; + int iData[2]; + unsigned int uiNOutSamples = 0; + unsigned ui; + + + for(ui = 0; ui < psPPFIRCtrl->uiNInSamples; ui++) + { + // Get new data sample to delay line (double write for circular buffer simulation) with step + iData[0] = *piIn; + piIn += uiInStep; + // Double write to simulate circular buffer + *piDelayI = iData[0]; + *(piDelayI + uiDelayO) = iData[0]; + // Step delay (with circular simulation) + piDelayI++; + if(piDelayI >= piDelayW) + piDelayI = piDelayB; + + // Do while the current phase coefficient pointer points to phase coefficients + // This is equivalent to know if the output sample is between the current and next input sample + + while(uiCoefsPhase < uiNCoefs) + { + // Clear accumulator and set access pointers + piData = piDelayI; + piCoefs = piCoefsB + uiCoefsPhase; + + if ((unsigned)piData & 0b0100) src_mrhf_fir_inner_loop_asm_odd(piData, piCoefs, iData, uiNLoops); + else src_mrhf_fir_inner_loop_asm(piData, piCoefs, iData, uiNLoops); + + + // Write output with step + *piOut = iData[0]; + piOut += uiOutStep; + + // Step phase coefficient offset for next output phase + uiCoefsPhase += uiCoefsPhaseStep; + + // Increase output sample counter + uiNOutSamples++; + } + + // Reduce phase for next input sample (one input sample corresponds to all coefficients in the PP filter) + uiCoefsPhase -= uiNCoefs; + } + + // Write delay line index back for next round + psPPFIRCtrl->piDelayI = piDelayI; + // Write coefs phase back for next round + psPPFIRCtrl->uiCoefsPhase = uiCoefsPhase; + // Write number of samples + psPPFIRCtrl->uiNOutSamples = uiNOutSamples; + + return FIR_NO_ERROR; +} diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir.h new file mode 100644 index 0000000..7ae4945 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir.h @@ -0,0 +1,412 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// FIR functions definition file for the SRC +// +// =========================================================================== +// =========================================================================== + +#ifndef _SRC_MRHF_FIR_H +#define _SRC_MRHF_FIR_H +#ifndef ALIGNMENT +# ifdef __xcore__ +# define ALIGNMENT(N) __attribute__((aligned (N))) +# else +# define ALIGNMENT(N) +# endif +#endif + +/// (on xcore) Force variable to word alignment +#ifndef WORD_ALIGNED +# define WORD_ALIGNED ALIGNMENT(4) +#endif + +/// (on xcore) Force variable to double word alignment +#ifndef DWORD_ALIGNED +# define DWORD_ALIGNED ALIGNMENT(8) +#endif + // =========================================================================== + // + // Defines + // + // =========================================================================== + + // General defines + // --------------- + + + // Parameter values + // ---------------- + + + + + // =========================================================================== + // + // Defines + // + // =========================================================================== + + + // =========================================================================== + // + // TypeDefs + // + // =========================================================================== + + // To avoid C type definitions when including this file from assembler + #ifndef INCLUDE_FROM_ASM + + // FIR Return Codes + // ---------------- + typedef enum _FIRReturnCodes + { + FIR_NO_ERROR = 0, + FIR_ERROR = 1 + } FIRReturnCodes_t; + + // FIR On/Off Codes + // ---------------- + typedef enum _FIROnOffCodes + { + FIR_OFF = 0, + FIR_ON = 1 + } FIROnOffCodes_t; + + + // FIR Type Codes + // -------------- + typedef enum _FIRTypeCodes + { + FIR_TYPE_OS2 = 0, // Over-sampler by two FIR + FIR_TYPE_SYNC = 1, // Asynchronous (low-pass) FIR + FIR_TYPE_DS2 = 2, // Down-sampler by two FIR + } FIRTypeCodes_t; + +#ifdef __XC__ + // FIR Descriptor + // -------------- + typedef struct _FIRDescriptor + { + FIRTypeCodes_t eType; // Type of filter + unsigned int uiNCoefs; // Number of coefficients + int* unsafe piCoefs; // Pointer to coefficients + } FIRDescriptor_t; + + + // FIR Ctrl + // -------- + typedef struct _FIRCtrl + { + FIROnOffCodes_t eEnable; // FIR on/off + + int* unsafe piIn; // Pointer to input data + unsigned int uiNInSamples; // Number of input samples to process + unsigned int uiInStep; // Step between input data samples + int* unsafe piOut; // Pointer to output data + unsigned int uiNOutSamples; // Number of output samples produced + unsigned int uiOutStep; // Step between output data samples + + FIRReturnCodes_t * unsafe pvProc; // Processing function address + + int* unsafe piDelayB; // Pointer to delay line base + unsigned int uiDelayL; // Total length of delay line + int* unsafe piDelayI; // Pointer to current position in delay line + int* unsafe piDelayW; // Delay buffer wrap around address (for circular buffer simulation) + unsigned int uiDelayO; // Delay line offset for second write (for circular buffer simulation) + + unsigned int uiNLoops; // Number of inner loop iterations + unsigned int uiNCoefs; // Number of coefficients + int* unsafe piCoefs; // Pointer to coefficients + } FIRCtrl_t; + + + // ADFIR Descriptor + // ---------------- + typedef struct _ADFIRDescriptor + { + unsigned int uiNCoefsPerPhase; // Number of coefficients + unsigned int uiNPhases; // Number of phases + int* unsafe piCoefs; // Pointer to coefficients + } ADFIRDescriptor_t; + + // ADFIR Ctrl + // ---------- + typedef struct _ADFIRCtrl + { + int iIn; // Input sample + int* unsafe piOut; // Pointer to output sample + + int* unsafe piDelayB; // Pointer to delay line base + unsigned int uiDelayL; // Total length of delay line + int* unsafe piDelayI; // Pointer to current position in delay line + int* unsafe piDelayW; // Delay buffer wrap around address (for circular buffer simulation) + unsigned int uiDelayO; // Delay line offset for second write (for circular buffer simulation) + + unsigned int uiNLoops; // Number of inner loop iterations + int* unsafe piADCoefs; // Pointer to adaptive coefficients + } ADFIRCtrl_t; + + + // PPFIR Descriptor + // -------------- + typedef struct _PPFIRDescriptor + { + unsigned int uiNCoefs; // Number of coefficients + unsigned int uiNPhases; // Number of phases + int* unsafe piCoefs; // Pointer to coefficients + } PPFIRDescriptor_t; + + // PPFIR Ctrl + // ---------- + typedef struct _PPFIRCtrl + { + FIROnOffCodes_t eEnable; // PPFIR on/off + + int* unsafe piIn; // Pointer to input data + unsigned int uiNInSamples; // Number of input samples to process + unsigned int uiInStep; // Step between input data samples + int* unsafe piOut; // Pointer to output data + unsigned int uiNOutSamples; // Number of output samples produced + unsigned int uiOutStep; // Step between output data samples + + int* unsafe piDelayB; // Pointer to delay line base + unsigned int uiDelayL; // Total length of delay line + int* unsafe piDelayI; // Pointer to current position in delay line + int* unsafe piDelayW; // Delay buffer wrap around address (for circular buffer simulation) + unsigned int uiDelayO; // Delay line offset for second write (for circular buffer simulation) + + unsigned int uiNLoops; // Number of inner loop iterations + unsigned int uiNCoefs; // Number of coefficients + int* unsafe piCoefs; // Pointer to coefficients + unsigned int uiNPhases; // Number of phases + unsigned int uiPhaseStep; // Phase step + unsigned int uiCoefsPhaseStep; // Number of coefficients for a phase step + unsigned int uiCoefsPhase; // Current phase coefficient offset from base + + } PPFIRCtrl_t; +#else + // FIR Descriptor + // -------------- + typedef struct _FIRDescriptor + { + FIRTypeCodes_t eType; // Type of filter + unsigned int uiNCoefs; // Number of coefficients + int* piCoefs; // Pointer to coefficients + } FIRDescriptor_t; + + + // FIR Ctrl + // -------- + typedef struct _FIRCtrl + { + FIROnOffCodes_t eEnable; // FIR on/off + + int* piIn; // Pointer to input data + unsigned int uiNInSamples; // Number of input samples to process + unsigned int uiInStep; // Step between input data samples + int* piOut; // Pointer to output data + unsigned int uiNOutSamples; // Number of output samples produced + unsigned int uiOutStep; // Step between output data samples + +__attribute__((fptrgroup("MRHF_G1"))) + FIRReturnCodes_t (*pvProc)(int *);// Processing function address + + int* piDelayB; // Pointer to delay line base + unsigned int uiDelayL; // Total length of delay line + int* piDelayI; // Pointer to current position in delay line + int* piDelayW; // Delay buffer wrap around address (for circular buffer simulation) + unsigned int uiDelayO; // Delay line offset for second write (for circular buffer simulation) + + unsigned int uiNLoops; // Number of inner loop iterations + unsigned int uiNCoefs; // Number of coefficients + int* piCoefs; // Pointer to coefficients + } FIRCtrl_t; + + // ADFIR Descriptor + // ---------------- + typedef struct _ADFIRDescriptor + { + unsigned int uiNCoefsPerPhase; // Number of coefficients + unsigned int uiNPhases; // Number of phases + int* piCoefs; // Pointer to coefficients + } ADFIRDescriptor_t; + + // ADFIR Ctrl + // ---------- + typedef struct _ADFIRCtrl + { + int iIn; // Input sample + int* piOut; // Pointer to output sample + + int* piDelayB; // Pointer to delay line base + unsigned int uiDelayL; // Total length of delay line + int* piDelayI; // Pointer to current position in delay line + int* piDelayW; // Delay buffer wrap around address (for circular buffer simulation) + unsigned int uiDelayO; // Delay line offset for second write (for circular buffer simulation) + + unsigned int uiNLoops; // Number of inner loop iterations + int* piADCoefs; // Pointer to adaptive coefficients + } ADFIRCtrl_t; + + + // PPFIR Descriptor + // -------------- + typedef struct _PPFIRDescriptor + { + unsigned int uiNCoefs; // Number of coefficients + unsigned int uiNPhases; // Number of phases + int* piCoefs; // Pointer to coefficients + } PPFIRDescriptor_t; + + // PPFIR Ctrl + // ---------- + typedef struct _PPFIRCtrl + { + FIROnOffCodes_t eEnable; // PPFIR on/off + + int* piIn; // Pointer to input data + unsigned int uiNInSamples; // Number of input samples to process + unsigned int uiInStep; // Step between input data samples + int* piOut; // Pointer to output data + unsigned int uiNOutSamples; // Number of output samples produced + unsigned int uiOutStep; // Step between output data samples + + int* piDelayB; // Pointer to delay line base + unsigned int uiDelayL; // Total length of delay line + int* piDelayI; // Pointer to current position in delay line + int* piDelayW; // Delay buffer wrap around address (for circular buffer simulation) + unsigned int uiDelayO; // Delay line offset for second write (for circular buffer simulation) + + unsigned int uiNLoops; // Number of inner loop iterations + unsigned int uiNCoefs; // Number of coefficients + int* piCoefs; // Pointer to coefficients + unsigned int uiNPhases; // Number of phases + unsigned int uiPhaseStep; // Phase step + unsigned int uiCoefsPhaseStep; // Number of coefficients for a phase step + unsigned int uiCoefsPhase; // Current phase coefficient offset from base + + } PPFIRCtrl_t; +#endif + + // =========================================================================== + // + // Function prototypes + // + // =========================================================================== + + // ==================================================================== // + // Function: FIR_init_from_desc // + // Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // + // FIRDescriptor_t *psFIRDescriptor: Desc. strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Inits the FIR from the Descriptor // + // ==================================================================== // + FIRReturnCodes_t FIR_init_from_desc(FIRCtrl_t* psFIRCtrl, FIRDescriptor_t* psFIRDescriptor); + + // ==================================================================== // + // Function: FIR_sync // + // Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Syncs the FIR // + // ==================================================================== // + FIRReturnCodes_t FIR_sync(FIRCtrl_t* psFIRCtrl); + + // ==================================================================== // + // Function: FIR_proc_os2 // + // Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Processes the FIR in over-sample by 2 mode // + // ==================================================================== // + FIRReturnCodes_t FIR_proc_os2(FIRCtrl_t* psFIRCtrl); + + // ==================================================================== // + // Function: FIR_proc_sync // + // Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Processes the FIR in asynchronous mode // + // ==================================================================== // + FIRReturnCodes_t FIR_proc_sync(FIRCtrl_t* psFIRCtrl); + + // ==================================================================== // + // Function: FIR_proc_ds2 // + // Arguments: FIRCtrl_t *psFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Processes the FIR in down-sample by 2 mode // + // ==================================================================== // + FIRReturnCodes_t FIR_proc_ds2(FIRCtrl_t* psFIRCtrl); + + // ==================================================================== // + // Function: ADFIR_init_from_desc // + // Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // + // ADFIRDescriptor_t *psADFIRDescriptor: Desc. strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Inits the ADFIR from the Descriptor // + // ==================================================================== // + FIRReturnCodes_t ADFIR_init_from_desc(ADFIRCtrl_t* psADFIRCtrl, ADFIRDescriptor_t* psADFIRDescriptor); + + // ==================================================================== // + // Function: ADFIR_snyc // + // Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Syncs the ADFIR filter // + // ==================================================================== // + FIRReturnCodes_t ADFIR_sync(ADFIRCtrl_t* psADFIRCtrl); + + // ==================================================================== // + // Function: ADFIR_proc_in_sample // + // Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Gets new input sample to delay line with step // + // ==================================================================== // + FIRReturnCodes_t ADFIR_proc_in_spl(ADFIRCtrl_t* psADFIRCtrl); + + // ==================================================================== // + // Function: ADFIR_proc_macc // + // Arguments: ADFIRCtrl_t *psADFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Processes the macc loop for the ADFIR filter // + // ==================================================================== // + FIRReturnCodes_t ADFIR_proc_macc(ADFIRCtrl_t* psADFIRCtrl); + + // ==================================================================== // + // Function: PPFIR_init_from_desc // + // Arguments: PPFIRCtrl_t *psPPFIRCtrl: Ctrl strct. // + // PPFIRDescriptor_t *psPPFIRDescriptor: Desc. strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Inits the PPFIR from the Descriptor // + // ==================================================================== // + FIRReturnCodes_t PPFIR_init_from_desc(PPFIRCtrl_t* psPPFIRCtrl, PPFIRDescriptor_t* psPPFIRDescriptor); + + // ==================================================================== // + // Function: PPFIR_snyc // + // Arguments: PPFIRCtrl_t *psPPFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Syncs the PPFIR polyphase filter // + // ==================================================================== // + FIRReturnCodes_t PPFIR_sync(PPFIRCtrl_t* psPPFIRCtrl); + + // ==================================================================== // + // Function: PPFIR_proc // + // Arguments: PPFIRCtrl_t *psPPFIRCtrl: Ctrl strct. // + // Return values: FIR_NO_ERROR on success // + // FIR_ERROR on failure // + // Description: Processes the PPFIR polyphase filter // + // ==================================================================== // + FIRReturnCodes_t PPFIR_proc(PPFIRCtrl_t* psPPFIRCtrl); + #endif // nINCLUDE_FROM_ASM + +#endif // _SRC_MRHF_FIR_H diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_inner_loop_asm.S b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_inner_loop_asm.S new file mode 100644 index 0000000..cfc4c4a --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_inner_loop_asm.S @@ -0,0 +1,251 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_fir_inner_loop_asm.function + .globl src_mrhf_fir_inner_loop_asm + .align 8 + .type src_mrhf_fir_inner_loop_asm,@function + +src_mrhf_fir_inner_loop_asm: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 + + + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 8 + {stw iDataRet_p, sp[6]; shr counter, counter, 3} + + //Constant for adding onto stuff. Gets updated later + ldc step, 0x40 + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + + bf counter, src_mrhf_fir_done +src_mrhf_fir_main_loop: + sub counter, counter, 1 + + ldd iData0, iData1, piData_p[0] + ldd iCoef0, iCoef1, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[1] + ldd iCoef0, iCoef1, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[2] + ldd iCoef0, iCoef1, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[3] + ldd iCoef0, iCoef1, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[4] + ldd iCoef0, iCoef1, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[5] + ldd iCoef0, iCoef1, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[6] + ldd iCoef0, iCoef1, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iData0, iData1, piData_p[7] + ldd iCoef0, iCoef1, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + //Decrement loop counter and increment pointers and branch if still running + {add piData_p, piData_p, step; add piCoefs_p, piCoefs_p, step} + + bt counter, src_mrhf_fir_main_loop + +src_mrhf_fir_done: + //pop return value pointer from stack so we can use it to write back + //Write back the two return values + {ldw iDataRet_p, sp[6]; ldc counter, 31} //Reuse counter (r3) + + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size + +.atmp: + .size src_mrhf_fir_inner_loop_asm, .atmp-src_mrhf_fir_inner_loop_asm + .align 8 + .cc_bottom src_mrhf_fir_inner_loop_asm.function + + .set src_mrhf_fir_inner_loop_asm.nstackwords, stack_size + .globl src_mrhf_fir_inner_loop_asm.nstackwords + .set src_mrhf_fir_inner_loop_asm.maxcores, 1 + .globl src_mrhf_fir_inner_loop_asm.maxcores + .set src_mrhf_fir_inner_loop_asm.maxtimers,0 + .globl src_mrhf_fir_inner_loop_asm.maxtimers + .set src_mrhf_fir_inner_loop_asm.maxchanends,0 + .globl src_mrhf_fir_inner_loop_asm.maxchanends + + + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_fir_inner_loop_asm_odd.function + .globl src_mrhf_fir_inner_loop_asm_odd + .align 8 + .type src_mrhf_fir_inner_loop_asm_odd,@function + +src_mrhf_fir_inner_loop_asm_odd: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 + + + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 8 + {stw iDataRet_p, sp[6]; shr counter, counter, 3} + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + + bf counter, src_mrhf_fir_done +src_mrhf_fir_main_loop_odd: + + {sub counter, counter, 1; ldc step, 0x38} + + //Constant for adding onto stuff. Gets updated later + + {ldw iData0, piData_p[0]; add piData_p, piData_p, 4} //Now 64b aligned + + ldd iCoef1, iCoef0, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[0] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[1] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[2] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[3] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[4] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[5] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + ldd iData0, iData1, piData_p[6] + maccs Acc0_h, Acc0_l, iData1, iCoef1 + + ldd iCoef1, iCoef0, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + + add piData_p, piData_p, step + + {ldw iData1, piData_p[0]; add piData_p, piData_p, 4} //0x4 + 0x38 + 0x4 = 0x40) + maccs Acc0_h, Acc0_l, iData1, iCoef1 + //Increment pointers and branch if still running + + ldc step, 0x40 + {bt counter, src_mrhf_fir_main_loop_odd; add piCoefs_p, piCoefs_p, step} + +src_mrhf_fir_done_odd: + //pop return value pointer from stack so we can use it to write back + {ldw iDataRet_p, sp[6]; ldc counter, 31} //Reuse counter (r3) + + //Write back the return value + lsats Acc0_h, Acc0_l, r3 //Saturate first + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + stw iData0, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + retsp stack_size + +.atmp_odd: + .size src_mrhf_fir_inner_loop_asm_odd, .atmp_odd-src_mrhf_fir_inner_loop_asm_odd + .align 8 + .cc_bottom src_mrhf_fir_inner_loop_asm_odd.function + + .set src_mrhf_fir_inner_loop_asm_odd.nstackwords, stack_size + .globl src_mrhf_fir_inner_loop_asm_odd.nstackwords + .set src_mrhf_fir_inner_loop_asm_odd.maxcores, 1 + .globl src_mrhf_fir_inner_loop_asm_odd.maxcores + .set src_mrhf_fir_inner_loop_asm_odd.maxtimers,0 + .globl src_mrhf_fir_inner_loop_asm_odd.maxtimers + .set src_mrhf_fir_inner_loop_asm_odd.maxchanends,0 + .globl src_mrhf_fir_inner_loop_asm_odd.maxchanends diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_inner_loop_asm.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_inner_loop_asm.h new file mode 100644 index 0000000..198d561 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_inner_loop_asm.h @@ -0,0 +1,10 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_MRHF_FIR_INNER_LOOP_ASM_H_ +#define _SRC_MRHF_FIR_INNER_LOOP_ASM_H_ + +void src_mrhf_fir_inner_loop_asm(int *piData, int *piCoefs, int iData[], int count); +void src_mrhf_fir_inner_loop_asm_odd(int *piData, int *piCoefs, int iData[], int count); +void src_mrhf_fir_inner_loop_asm_xs3(int *piData, int *piCoefs, int iData[], int count); + +#endif // _SRC_MRHF_FIR_INNER_LOOP_ASM_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_os_inner_loop_asm.S b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_os_inner_loop_asm.S new file mode 100644 index 0000000..fec8696 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_os_inner_loop_asm.S @@ -0,0 +1,265 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_fir_os_inner_loop_asm.function + .globl src_mrhf_fir_os_inner_loop_asm + .align 8 + .type src_mrhf_fir_os_inner_loop_asm,@function + +src_mrhf_fir_os_inner_loop_asm: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 +#define Acc1_l r10 +#define Acc1_h r11 + + + +#define stack_size 10 //In words + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + std r10, r11, sp[3] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 4 + {stw iDataRet_p, sp[8]; shr counter, counter, 2} + + //Constant for adding onto stuff. Gets updated later + ldc step, 0x40 + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + {ldc Acc1_h, 0; ldc Acc1_l, 0} + + bf counter, src_mrhf_fir_os_done +src_mrhf_fir_os_main_loop: + sub counter, counter, 1 + + ldd iData1, iData0, piData_p[0] + ldd iCoef0, iCoef1, piCoefs_p[0] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + ldd iData1, iData0, piData_p[1] + ldd iCoef0, iCoef1, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + ldd iData1, iData0, piData_p[2] + ldd iCoef0, iCoef1, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + ldd iData1, iData0, piData_p[3] + ldd iCoef0, iCoef1, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[7] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + //Increment coeffs by step + {add piCoefs_p, piCoefs_p, step; shr step, step, 1} + //Increment data by step/2 + {add piData_p, piData_p, step; shl step, step, 1} + + //Decrement loop counter + bt counter, src_mrhf_fir_os_main_loop + +src_mrhf_fir_os_done: + //pop return value pointer from stack so we can use it to write back + //Resuse counter (r3) + {ldw iDataRet_p, sp[8]; ldc counter, 31} + + //Write back the two return values and do sat/ext + lsats Acc0_h, Acc0_l, r3 //Saturate first + lsats Acc1_h, Acc1_l, r3 + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + lextract iData1, Acc1_h, Acc1_l, counter, 32 + //stw iData0, iDataRet_p[1] + //stw iData1, iDataRet_p[0] + std iData0, iData1, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + ldd r10, r11, sp[3] + retsp stack_size + +.atmp: + .size src_mrhf_fir_os_inner_loop_asm, .atmp-src_mrhf_fir_os_inner_loop_asm + .align 8 + .cc_bottom src_mrhf_fir_os_inner_loop_asm.function + + .set src_mrhf_fir_os_inner_loop_asm.nstackwords, stack_size + .globl src_mrhf_fir_os_inner_loop_asm.nstackwords + .set src_mrhf_fir_os_inner_loop_asm.maxcores, 1 + .globl src_mrhf_fir_os_inner_loop_asm.maxcores + .set src_mrhf_fir_os_inner_loop_asm.maxtimers,0 + .globl src_mrhf_fir_os_inner_loop_asm.maxtimers + .set src_mrhf_fir_os_inner_loop_asm.maxchanends,0 + .globl src_mrhf_fir_os_inner_loop_asm.maxchanends + + + + + + + + + + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_fir_os_inner_loop_asm_odd.function + .globl src_mrhf_fir_os_inner_loop_asm_odd + .align 8 + .type src_mrhf_fir_os_inner_loop_asm_odd,@function + +src_mrhf_fir_os_inner_loop_asm_odd: + +#define piData_p r0 +#define piCoefs_p r1 +#define iDataRet_p r2 +#define step r2 +#define counter r3 +#define iCoef0 r4 +#define iCoef1 r5 +#define iData0 r6 +#define iData1 r7 +#define Acc0_l r8 +#define Acc0_h r9 +#define Acc1_l r10 +#define Acc1_h r11 + + + +#define stack_size 10 //In words + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + std r10, r11, sp[3] + + //push return value pointers onto stack. Frees up r2 + //Divide counter by 4 + {stw iDataRet_p, sp[8] ; shr counter, counter, 2} + + //Initilise MACC regsiters to zero + {ldc Acc0_h, 0; ldc Acc0_l, 0} + {ldc Acc1_h, 0; ldc Acc1_l, 0} + + bf counter, src_mrhf_fir_os_done_odd +src_mrhf_fir_os_main_loop_odd: + //Constant for adding onto stuff. Gets updated later + {ldc step, 0x18; sub counter, counter, 1} + + {ldw iData0, piData_p[0]; add piData_p, piData_p, 0x4} //Single word data load + ldd iCoef0, iCoef1, piCoefs_p[0] //Double word coef load + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + + //Now double word aligned for 64b goodness + + ldd iData1, iData0, piData_p[0] + ldd iCoef0, iCoef1, piCoefs_p[1] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[2] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + ldd iData1, iData0, piData_p[1] + ldd iCoef0, iCoef1, piCoefs_p[3] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[4] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + ldd iData1, iData0, piData_p[2] + ldd iCoef0, iCoef1, piCoefs_p[5] + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + ldd iCoef0, iCoef1, piCoefs_p[6] + maccs Acc0_h, Acc0_l, iData1, iCoef0 + maccs Acc1_h, Acc1_l, iData1, iCoef1 + + add piData_p, piData_p, step //Back to word alignment + + //Single word data load + {ldw iData0, piData_p[0]; add piData_p, piData_p, 0x4} // Increment pointer (will not be done until after this bundle) + ldd iCoef0, iCoef1, piCoefs_p[7] //Double word coef load + maccs Acc0_h, Acc0_l, iData0, iCoef0 + maccs Acc1_h, Acc1_l, iData0, iCoef1 + + //Increment pointers and branch if still running + + ldc step, 0x40 + {add piCoefs_p, piCoefs_p, step; bt counter, src_mrhf_fir_os_main_loop_odd} + + +src_mrhf_fir_os_done_odd: + //pop return value pointer from stack so we can use it to write back + {ldw iDataRet_p, sp[8]; ldc counter, 31} //Resuse counter (r3) + + + //Write back the two return values + lsats Acc0_h, Acc0_l, r3 //Saturate first + lsats Acc1_h, Acc1_l, r3 + lextract iData0, Acc0_h, Acc0_l, counter, 32 //Extract + lextract iData1, Acc1_h, Acc1_l, counter, 32 + stw iData0, iDataRet_p[1] + stw iData1, iDataRet_p[0] + + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + ldd r10, r11, sp[3] + retsp stack_size + +.atmp_odd: + .size src_mrhf_fir_os_inner_loop_asm_odd, .atmp_odd-src_mrhf_fir_os_inner_loop_asm_odd + .align 8 + .cc_bottom src_mrhf_fir_os_inner_loop_asm_odd.function + + .set src_mrhf_fir_os_inner_loop_asm_odd.nstackwords, stack_size + .globl src_mrhf_fir_os_inner_loop_asm_odd.nstackwords + .set src_mrhf_fir_os_inner_loop_asm_odd.maxcores, 1 + .globl src_mrhf_fir_os_inner_loop_asm_odd.maxcores + .set src_mrhf_fir_os_inner_loop_asm_odd.maxtimers,0 + .globl src_mrhf_fir_os_inner_loop_asm_odd.maxtimers + .set src_mrhf_fir_os_inner_loop_asm_odd.maxchanends,0 + .globl src_mrhf_fir_os_inner_loop_asm_odd.maxchanends + + diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_os_inner_loop_asm.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_os_inner_loop_asm.h new file mode 100644 index 0000000..b90aac0 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_fir_os_inner_loop_asm.h @@ -0,0 +1,10 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef SRC_MRHF_FIR_OS_INNER_LOOP_ASM_H_ +#define SRC_MRHF_FIR_OS_INNER_LOOP_ASM_H_ + +void src_mrhf_fir_os_inner_loop_asm_odd(int *piData, int *piCoefs, int iData[], int count); +void src_mrhf_fir_os_inner_loop_asm(int *piData, int *piCoefs, int iData[], int count); +void src_mrhf_fir_os_inner_loop_asm_xs3(int *piData, int *piCoefs, int iData[], int count); + +#endif // SRC_MRHF_FIR_OS_INNER_LOOP_ASM_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_int_arithmetic.c b/lib_src/lib_src/src/multirate_hifi/src_mrhf_int_arithmetic.c new file mode 100644 index 0000000..ad0ccc4 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_int_arithmetic.c @@ -0,0 +1,129 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// File: IntArithmetic.c +// +// Integer arithmetic implementation file for the ASRC +// +// Target: MS Windows +// Version: 1.0 +// +// =========================================================================== +// =========================================================================== + + +// =========================================================================== +// +// Includes +// +// =========================================================================== +#include +#include +#include +#include + +// Integer arithmetic includes +#include "src_mrhf_int_arithmetic.h" + +// =========================================================================== +// +// Defines +// +// =========================================================================== + + + + +// =========================================================================== +// +// Variables +// +// =========================================================================== + + + +// =========================================================================== +// +// Local Functions prototypes +// +// =========================================================================== + + + + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + +// ==================================================================== // +// Function: MACC // +// Description: 32i x 32i -> 64i Multiply-Accumulate // +// ==================================================================== // +void MACC(__int64* plAcc, int ix, int iy) +{ + *plAcc += (__int64)ix * (__int64)iy; +} + +// ==================================================================== // +// Function: LMUL // +// Description: 32i x 32i +32i + 32i -> 64i Multiply (and add) // +// ==================================================================== // +void LMUL(__int64* plAcc, int ix, int iy, int ic, int id) +{ + *plAcc = (__int64)ix * (__int64)iy; + *plAcc += (__int64)ic; + *plAcc += (__int64)id; +} + + +// ==================================================================== // +// Function: LATS30 // +// Description: Saturate 64i to 2^62-1, -2^62 // +// ==================================================================== // +void LSAT30(__int64 *plx) +{ + if(*plx > MAX_VAL64_30) + *plx = MAX_VAL64_30; + if(*plx < MIN_VAL64_30) + *plx = MIN_VAL64_30; +} + + +// ==================================================================== // +// Function: EXT30 // +// Description: Extracts bits [62-31] into 32i // +// ==================================================================== // +void EXT30(int *pr, __int64 lx) +{ + *pr = (int)(lx>>31); +} + + +// ==================================================================== // +// Function: LATS29 // +// Description: Saturate 64i to 2^61-1, -2^61 // +// ==================================================================== // +void LSAT29(__int64 *plx) +{ + if(*plx > MAX_VAL64_29) + *plx = MAX_VAL64_29; + if(*plx < MIN_VAL64_29) + *plx = MIN_VAL64_29; +} + + +// ==================================================================== // +// Function: EXT29 // +// Description: Extracts bits [61-30] into 32i // +// ==================================================================== // +void EXT29(int *pr, __int64 lx) +{ + *pr = (int)(lx>>30); +} + + + diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_int_arithmetic.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_int_arithmetic.h new file mode 100644 index 0000000..182eb9c --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_int_arithmetic.h @@ -0,0 +1,78 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_MRHF_INT_ARITHEMTIC_H_ +#define _SRC_MRHF_INT_ARITHEMTIC_H_ + + // =========================================================================== + // + // Defines + // + // =========================================================================== + +#define __int64 long long + + // =========================================================================== + // + // Variables + // + // =========================================================================== + + + // =========================================================================== + // + // TypeDefs + // + // =========================================================================== + // To avoid C type definitions when including this file from assembler + #ifndef INCLUDE_FROM_ASM + + + // =========================================================================== + // + // Function prototypes + // + // =========================================================================== + + // ==================================================================== // + // Function: MACC // + // Description: 32i x 32i -> 64i Multiply-Accumulate // + // ==================================================================== // + void MACC(__int64* plAcc, int ix, int iy); + + // ==================================================================== // + // Function: LMUL // + // Description: 32i x 32i +32i + 32i -> 64i Multiply (and add) // + // ==================================================================== // + void LMUL(__int64* plAcc, int ix, int iy, int ic, int id); + + // ==================================================================== // + // Function: LATS30 // + // Description: Saturate 64i to 2^62-1, -2^62 // + // ==================================================================== // + #define MAX_VAL64_30 (__int64)0x3FFFFFFFFFFFFFFF + #define MIN_VAL64_30 (__int64)0xC000000000000000 + void LSAT30(__int64 *plx); + + // ==================================================================== // + // Function: EXT30 // + // Description: Extracts bits [62-31] into 32i // + // ==================================================================== // + void EXT30(int *pr, __int64 lx); + + // ==================================================================== // + // Function: LATS29 // + // Description: Saturate 64i to 2^61-1, -2^61 // + // ==================================================================== // + #define MAX_VAL64_29 (__int64)0x1FFFFFFFFFFFFFFF + #define MIN_VAL64_29 (__int64)0xE000000000000000 + void LSAT29(__int64 *plx); + + // ==================================================================== // + // Function: EXT29 // + // Description: Extracts bits [61-30] into 32i // + // ==================================================================== // + void EXT29(int *pr, __int64 lx); + + #endif // nINCLUDE_FROM_ASM + +#endif // _SRC_MRHF_INT_ARITHEMTIC_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_spline_coeff_gen_inner_loop_asm.S b/lib_src/lib_src/src/multirate_hifi/src_mrhf_spline_coeff_gen_inner_loop_asm.S new file mode 100644 index 0000000..c4e5522 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_spline_coeff_gen_inner_loop_asm.S @@ -0,0 +1,231 @@ +// Copyright 2016-2023 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. + +#define FILTER_DEFS_ADFIR_PHASE_N_TAPS ((1920 / 128) + 1) // Number of taps per phase + .section .dp.data,"awd",@progbits + .text + + .cc_top src_mrhf_spline_coeff_gen_inner_loop_asm.function + .globl src_mrhf_spline_coeff_gen_inner_loop_asm + .align 8 + .type src_mrhf_spline_coeff_gen_inner_loop_asm,@function + +src_mrhf_spline_coeff_gen_inner_loop_asm: + +#define piPhase r0 //Arg 1 +#define piH r1 //Arg 2 +#define piADCoefs r2 //Arg 3 +#define n_taps r3 //Arg 4 +#define Acc1_l r4 +#define Acc1_h r5 +#define Acc0_l r6 +#define Acc0_h r7 +#define iData0 r8 +#define iData1 r9 +#define tmp r10 +#define piPhase0 r11 //This one remains constant - saves on shuffling + +// piPhase1 = piPhase0 + FILTER_DEFS_ADFIR_PHASE_N_TAPS; +// piPhase2 = piPhase1 + FILTER_DEFS_ADFIR_PHASE_N_TAPS; + +// Following assumes that - FILTER_DEFS_ADFIR_PHASE_N_TAPS = (1920 / 128 ) + 1 = 16 +#if ((FILTER_DEFS_ADFIR_PHASE_N_TAPS) != 16) +#error "spline coeff asm hard coded to FILTER_DEFS_ADFIR_PHASE_N_TAPS = (1920 / 128 ) + 1 = 16" +#endif + +//In 32b words +#define stack_size 8 + +.issue_mode dual + //Push registers + DUALENTSP_lu6 stack_size + std r4, r5, sp[0] + std r6, r7, sp[1] + std r8, r9, sp[2] + std r10, r11, sp[3] + + + {add piPhase0, piPhase, 0; shl n_taps, n_taps, 2} //offset needs to be * 4 because is int + add piPhase, piPhase, n_taps //PiPhase is PiPhase1 now - will swap between PiPhase1/2 + +src_mrhf_spline_coeff_gen_main_loop: + //Loop = 0 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[0] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[0] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[0] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[0] + + //Loop = 2 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[1] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[1] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[1] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[1] + + //Loop = 4 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[2] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[2] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[2] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[2] + + //Loop = 6 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[3] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[3] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[3] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[3] + + //Loop = 8 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[4] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[4] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[4] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[4] + + //Loop = 10 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[5] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[5] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[5] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[5] + + //Loop = 12 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[6] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[6] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[6] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[6] + + //Loop = 14 + {ldc Acc0_h, 0; ldc Acc0_l, 0} //Initialise MACC registers to zero + {ldc Acc1_h, 0; ldc Acc1_l, 0} + ldd iData0, iData1, piPhase0[7] + ldw tmp, piH[2] + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[7] + {ldw tmp, piH[1]; add piPhase, piPhase, n_taps} //piPhase2 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + ldd iData0, iData1, piPhase[7] + {ldw tmp, piH[0]; sub piPhase, piPhase, n_taps} //piPhase1 now + maccs Acc0_h, Acc0_l, tmp, iData0 + maccs Acc1_h, Acc1_l, tmp, iData1 + + std Acc0_h, Acc1_h, piADCoefs[7] +src_mrhf_spline_coeff_gen_done: + //Pop registers + ldd r4, r5, sp[0] + ldd r6, r7, sp[1] + ldd r8, r9, sp[2] + ldd r10, r11, sp[3] + retsp stack_size + +.atmp: + .size src_mrhf_spline_coeff_gen_inner_loop_asm, .atmp-src_mrhf_spline_coeff_gen_inner_loop_asm + .align 8 + .cc_bottom src_mrhf_spline_coeff_gen_inner_loop_asm.function + + .set src_mrhf_spline_coeff_gen_inner_loop_asm.nstackwords, stack_size + .globl src_mrhf_spline_coeff_gen_inner_loop_asm.nstackwords + .set src_mrhf_spline_coeff_gen_inner_loop_asm.maxcores, 1 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm.maxcores + .set src_mrhf_spline_coeff_gen_inner_loop_asm.maxtimers,0 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm.maxtimers + .set src_mrhf_spline_coeff_gen_inner_loop_asm.maxchanends,0 + .globl src_mrhf_spline_coeff_gen_inner_loop_asm.maxchanends diff --git a/lib_src/lib_src/src/multirate_hifi/src_mrhf_spline_coeff_gen_inner_loop_asm.h b/lib_src/lib_src/src/multirate_hifi/src_mrhf_spline_coeff_gen_inner_loop_asm.h new file mode 100644 index 0000000..94b1584 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/src_mrhf_spline_coeff_gen_inner_loop_asm.h @@ -0,0 +1,9 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef SRC_MRHF_SPLINE_COEFF_GEN_INNER_LOOP_ASM_H_ +#define SRC_MRHF_SPLINE_COEFF_GEN_INNER_LOOP_ASM_H_ + +void src_mrhf_spline_coeff_gen_inner_loop_asm(int *piPhase0, int *iH, int* piADCoefs, const int n_taps); +void src_mrhf_spline_coeff_gen_inner_loop_asm_xs3(int *piPhase0, int *iH, int* piADCoefs, const int n_taps); + +#endif // SRC_MRHF_SPLINE_COEFF_GEN_INNER_LOOP_ASM_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc.c b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc.c new file mode 100644 index 0000000..4f70e23 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc.c @@ -0,0 +1,497 @@ +// Copyright 2016-2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// Top level implementation file for the SSRC +// +// Target: MS Windows +// Version: 1.0 +// +// =========================================================================== +// =========================================================================== + + +// =========================================================================== +// +// Includes +// +// =========================================================================== +#include +#include +#include + +// Integer arithmetic include +#include "src_mrhf_int_arithmetic.h" +// XMOS built in functions +#include +// SSRC include +#include "src.h" + +// =========================================================================== +// +// Defines +// +// =========================================================================== + + +// State init value +#define SSRC_STATE_INIT 0 + +// Random number generator / dithering +#define SSRC_R_CONS 32767 +#define SSRC_R_BASE 1664525 +#define SSRC_RPDF_BITS_SHIFT 16 // Shift to select bits in pseudo-random number +#define SSRC_RPDF_MASK 0x0000007F // For dithering at 24bits (in 2.30) +#define SSRC_DATA24_MASK 0xFFFFFF00 // Mask for 24bits data (once rescaled to 1.31) +#define SSRC_DITHER_BIAS 0xFFFFFFC0 // TPDF dither bias for compensating masking at 24bits but expressed in 2.30 + +// Cycle counter +#define SSRC_FIR_OS2_OVERHEAD_CYCLE_COUNT (15.0) +#define SSRC_FIR_OS2_TAP_CYCLE_COUNT (1.875) +#define SSRC_FIR_DS2_OVERHEAD_CYCLE_COUNT (15.0) +#define SSRC_FIR_DS2_TAP_CYCLE_COUNT (2.125) +#define SSRC_FIR_SYNC_OVERHEAD_CYCLE_COUNT (15.0) +#define SSRC_FIR_SYNC_TAP_CYCLE_COUNT (2.125) +#define SSRC_FIR_PP_OVERHEAD_CYCLE_COUNT (15.0 + SSRC_FIR_SYNC_OVERHEAD_CYCLE_COUNT) +#define SSRC_FIR_PP_TAP_CYCLE_COUNT (2.125) +#define SSRC_DITHER_SAMPLE_COUNT (20.0) + + + +// =========================================================================== +// +// Variables +// +// =========================================================================== + +SSRCFiltersIDs_t sFiltersIDs[SSRC_N_FS][SSRC_N_FS] = // Filter configuration table [Fsin][Fsout] +{ + { // Fsin = 44.1kHz + // F1 F2 F3 Phase step + {{FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 44.1kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_294}, // Fsout = 48kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 88.2kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_147}, // Fsout = 96kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_OS_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 176.4kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_OS_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_147} // Fsout = 192kHz + }, + { // Fsin = 48kHz + // F1 F2 F3 Phase step + {{FILTER_DEFS_SSRC_FIR_UP4844_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_320}, // Fsout = 44.1kHz + {{FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 48kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_160}, // Fsout = 88.2kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 96kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_OS_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_160}, // Fsout = 176.4kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_OS_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0} // Fsout = 192kHz + }, + { // Fsin = 88.2kHz + // F1 F2 F3 Phase step + {{FILTER_DEFS_SSRC_FIR_BL_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 44.1kHz + {{FILTER_DEFS_SSRC_FIR_BL8848_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_294}, // Fsout = 48kHz + {{FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 88.2kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_294}, // Fsout = 96kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 176.4kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_147} // Fsout = 192kHz + }, + { // Fsin = 96kHz + // F1 F2 F3 Phase step + {{FILTER_DEFS_SSRC_FIR_BL9644_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_320}, // Fsout = 44.1kHz + {{FILTER_DEFS_SSRC_FIR_BL_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 48kHz + {{FILTER_DEFS_SSRC_FIR_UP4844_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_320}, // Fsout = 88.2kHz + {{FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 96kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_160}, // Fsout = 176.4kHz + {{FILTER_DEFS_SSRC_FIR_UP_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0} // Fsout = 192kHz + }, + { // Fsin = 176.4kHz + // F1 F2 F3 Phase step + {{FILTER_DEFS_SSRC_FIR_DS_ID, FILTER_DEFS_SSRC_FIR_BL_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 44.1kHz + {{FILTER_DEFS_SSRC_FIR_DS_ID, FILTER_DEFS_SSRC_FIR_BL8848_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_294}, // Fsout = 48kHz + {{FILTER_DEFS_SSRC_FIR_BL_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 88.2kHz + {{FILTER_DEFS_SSRC_FIR_BL17696_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_294}, // Fsout = 96kHz + {{FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 176.4kHz + {{FILTER_DEFS_SSRC_FIR_UPF_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS320_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_294} // Fsout = 192kHz + }, + { // Fsin = 192kHz + // F1 F2 F3 Phase step + {{FILTER_DEFS_SSRC_FIR_DS_ID, FILTER_DEFS_SSRC_FIR_BL9644_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_320}, // Fsout = 44.1kHz + {{FILTER_DEFS_SSRC_FIR_DS_ID, FILTER_DEFS_SSRC_FIR_BL_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 48kHz + {{FITLER_DEFS_SSRC_FIR_BL19288_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_320}, // Fsout = 88.2kHz + {{FILTER_DEFS_SSRC_FIR_BL_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0}, // Fsout = 96kHz + {{FILTER_DEFS_SSRC_FIR_UP192176_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_HS294_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_320}, // Fsout = 176.4kHz + {{FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_SSRC_FIR_NONE_ID, FILTER_DEFS_PPFIR_NONE_ID}, FILTER_DEFS_PPFIR_PHASE_STEP_0} // Fsout = 192kHz + } +}; + + + +// =========================================================================== +// +// Local Functions prototypes +// +// =========================================================================== + + +SSRCReturnCodes_t SSRC_proc_F1_F2(ssrc_ctrl_t* pssrc_ctrl); +SSRCReturnCodes_t SSRC_proc_F3(ssrc_ctrl_t* pssrc_ctrl); +SSRCReturnCodes_t SSRC_proc_dither(ssrc_ctrl_t* pssrc_ctrl); + + +// =========================================================================== +// +// Functions implementations +// +// =========================================================================== + + + +// ==================================================================== // +// Function: SSRC_init // +// Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // +// Return values: SSRC_NO_ERROR on success // +// SSRC_ERROR on failure // +// Description: Inits the SSRC passed as argument // +// ==================================================================== // +SSRCReturnCodes_t SSRC_init(ssrc_ctrl_t* pssrc_ctrl) +{ + SSRCFiltersIDs_t* psFiltersID; + FIRDescriptor_t* psFIRDescriptor; + PPFIRDescriptor_t* psPPFIRDescriptor; + + + // Check if state is allocated + if(pssrc_ctrl->psState == 0) + return SSRC_ERROR; + + // Check if stack is allocated + if(pssrc_ctrl->piStack == 0) + return SSRC_ERROR; + + // Check if valid Fsin and Fsout have been provided + if( (pssrc_ctrl->eInFs < SSRC_FS_MIN) || (pssrc_ctrl->eInFs > SSRC_FS_MAX)) + return SSRC_ERROR; + if( (pssrc_ctrl->eOutFs < SSRC_FS_MIN) || (pssrc_ctrl->eOutFs > SSRC_FS_MAX)) + return SSRC_ERROR; + + // Check that number of input samples is allocated and is a multiple of 4 + if(pssrc_ctrl->uiNInSamples == 0) + return SSRC_ERROR; + if((pssrc_ctrl->uiNInSamples & 0x3) != 0x0) + return SSRC_ERROR; + + // Load filters ID and number of samples + psFiltersID = &sFiltersIDs[pssrc_ctrl->eInFs][pssrc_ctrl->eOutFs]; + + // Configure filters from filters ID and number of samples + + // Filter F1 + // --------- + psFIRDescriptor = &sSSRCFirDescriptor[psFiltersID->uiFID[SSRC_F1_INDEX]]; + // Set number of input samples and input samples step + pssrc_ctrl->sFIRF1Ctrl.uiNInSamples = pssrc_ctrl->uiNInSamples; + pssrc_ctrl->sFIRF1Ctrl.uiInStep = pssrc_ctrl->uiNchannels; + + // Set delay line base pointer + if( (psFiltersID->uiFID[SSRC_F1_INDEX] == FILTER_DEFS_SSRC_FIR_DS_ID) || (psFiltersID->uiFID[SSRC_F1_INDEX] == FILTER_DEFS_SSRC_FIR_OS_ID) ) + pssrc_ctrl->sFIRF1Ctrl.piDelayB = pssrc_ctrl->psState->iDelayFIRShort; + else + pssrc_ctrl->sFIRF1Ctrl.piDelayB = pssrc_ctrl->psState->iDelayFIRLong; + + // Set output buffer step + if(psFiltersID->uiFID[SSRC_F2_INDEX] == FILTER_DEFS_SSRC_FIR_OS_ID) + // F2 in use in over-sampling by 2 mode + pssrc_ctrl->sFIRF1Ctrl.uiOutStep = 2 * pssrc_ctrl->uiNchannels; + else + pssrc_ctrl->sFIRF1Ctrl.uiOutStep = pssrc_ctrl->uiNchannels; + + // Call init for FIR F1 + if(FIR_init_from_desc(&pssrc_ctrl->sFIRF1Ctrl, psFIRDescriptor) != FIR_NO_ERROR) + return SSRC_ERROR; + + + // Filter F2 + // --------- + psFIRDescriptor = &sSSRCFirDescriptor[psFiltersID->uiFID[SSRC_F2_INDEX]]; + + // Set number of input samples and input samples step + pssrc_ctrl->sFIRF2Ctrl.uiNInSamples = pssrc_ctrl->sFIRF1Ctrl.uiNOutSamples; + pssrc_ctrl->sFIRF2Ctrl.uiInStep = pssrc_ctrl->sFIRF1Ctrl.uiOutStep; + + // Set delay line base pointer + if( (psFiltersID->uiFID[SSRC_F2_INDEX] == FILTER_DEFS_SSRC_FIR_DS_ID) || (psFiltersID->uiFID[SSRC_F2_INDEX] == FILTER_DEFS_SSRC_FIR_OS_ID) ) + pssrc_ctrl->sFIRF2Ctrl.piDelayB = pssrc_ctrl->psState->iDelayFIRShort; + else + pssrc_ctrl->sFIRF2Ctrl.piDelayB = pssrc_ctrl->psState->iDelayFIRLong; + + // Set output buffer step + pssrc_ctrl->sFIRF2Ctrl.uiOutStep = pssrc_ctrl->uiNchannels; + + // Call init for FIR F1 + if(FIR_init_from_desc(&pssrc_ctrl->sFIRF2Ctrl, psFIRDescriptor) != FIR_NO_ERROR) + return SSRC_ERROR; + + + // Filter F3 + // --------- + psPPFIRDescriptor = &sPPFirDescriptor[psFiltersID->uiFID[SSRC_F3_INDEX]]; + + // Set number of input samples and input samples step + if(psFiltersID->uiFID[SSRC_F2_INDEX] == FILTER_DEFS_SSRC_FIR_NONE_ID) + pssrc_ctrl->sPPFIRF3Ctrl.uiNInSamples = pssrc_ctrl->sFIRF1Ctrl.uiNOutSamples; + else + pssrc_ctrl->sPPFIRF3Ctrl.uiNInSamples = pssrc_ctrl->sFIRF2Ctrl.uiNOutSamples; + pssrc_ctrl->sPPFIRF3Ctrl.uiInStep = pssrc_ctrl->sFIRF2Ctrl.uiOutStep; + + // Set delay line base pointer + pssrc_ctrl->sPPFIRF3Ctrl.piDelayB = pssrc_ctrl->psState->iDelayPPFIR; + + // Set output buffer step + pssrc_ctrl->sPPFIRF3Ctrl.uiOutStep = pssrc_ctrl->uiNchannels; + + // Set phase step + pssrc_ctrl->sPPFIRF3Ctrl.uiPhaseStep = psFiltersID->uiPPFIRPhaseStep; + + // Call init for PPFIR F3 + if(PPFIR_init_from_desc(&pssrc_ctrl->sPPFIRF3Ctrl, psPPFIRDescriptor) != FIR_NO_ERROR) + return SSRC_ERROR; + + + // Setup input/output buffers + // -------------------------- + // We first set them all to stack base (some will be overwritten depending on configuration) + + // F1 input is never from stack, so don't set it + pssrc_ctrl->sFIRF2Ctrl.piIn = pssrc_ctrl->piStack; + pssrc_ctrl->sPPFIRF3Ctrl.piIn = pssrc_ctrl->piStack; + + pssrc_ctrl->sFIRF1Ctrl.piOut = pssrc_ctrl->piStack; + pssrc_ctrl->sFIRF2Ctrl.piOut = pssrc_ctrl->piStack; + // F3 output is never to stack, so don't set it + + + // Finally setup pointer to output buffer that needs to be modified for data output depending on filter configuration + // Also set pointer to number of output samples + if(psFiltersID->uiFID[SSRC_F3_INDEX] != FILTER_DEFS_PPFIR_NONE_ID) + { + // F3 is in use so take output from F3 output + pssrc_ctrl->ppiOut = &pssrc_ctrl->sPPFIRF3Ctrl.piOut; + pssrc_ctrl->puiNOutSamples = &pssrc_ctrl->sPPFIRF3Ctrl.uiNOutSamples; + } + else + { + if(psFiltersID->uiFID[SSRC_F2_INDEX] != FILTER_DEFS_SSRC_FIR_NONE_ID) + { + // F3 not in use but F2 in use, take output from F2 output + pssrc_ctrl->ppiOut = &pssrc_ctrl->sFIRF2Ctrl.piOut; + pssrc_ctrl->puiNOutSamples = &pssrc_ctrl->sFIRF2Ctrl.uiNOutSamples; + } + else + { + // F3 and F2 not in use but F1 in use or not. Set output from F1 output + // Note that we also set it to F1 output, even if F1 is not in use (Fsin = Fsout case, this won't cause any problem) + pssrc_ctrl->ppiOut = &pssrc_ctrl->sFIRF1Ctrl.piOut; + + if(psFiltersID->uiFID[SSRC_F1_INDEX] != FILTER_DEFS_SSRC_FIR_NONE_ID) + // F1 in use so set number of output sample pointer to number of output sample field of F1 + pssrc_ctrl->puiNOutSamples = &pssrc_ctrl->sFIRF1Ctrl.uiNOutSamples; + else + // F1 not in use so set number of output sample pointer to number of input sample field + pssrc_ctrl->puiNOutSamples = &pssrc_ctrl->uiNInSamples; + } + } + + // Call sync function + if(SSRC_sync(pssrc_ctrl) != SSRC_NO_ERROR) + return SSRC_ERROR; + + return SSRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: SSRC_sync // +// Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // +// Return values: SSRC_NO_ERROR on success // +// SSRC_ERROR on failure // +// Description: Syncs the SSRC passed as argument // +// ==================================================================== // +SSRCReturnCodes_t SSRC_sync(ssrc_ctrl_t* pssrc_ctrl) +{ + // Sync the FIR and PPFIR + if(FIR_sync(&pssrc_ctrl->sFIRF1Ctrl) != FIR_NO_ERROR) + return SSRC_ERROR; + if(FIR_sync(&pssrc_ctrl->sFIRF2Ctrl) != FIR_NO_ERROR) + return SSRC_ERROR; + if(PPFIR_sync(&pssrc_ctrl->sPPFIRF3Ctrl) != FIR_NO_ERROR) + return SSRC_ERROR; + + // Reset random seeds to initial values + pssrc_ctrl->psState->uiRndSeed = pssrc_ctrl->uiRndSeedInit; + + return SSRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: SSRC_proc // +// Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // +// Return values: SSRC_NO_ERROR on success // +// SSRC_ERROR on failure // +// Description: Processes the SSRC passed as argument // +// ==================================================================== // +#if (XCC_VERSION_MAJOR < 1402) //Beyond 14.2.0 we have proper function pointer support for C +#pragma stackfunction 64 //Generous stack allocation (probably needs just a handful through F1_F2, ASM etc). +#endif +SSRCReturnCodes_t SSRC_proc(ssrc_ctrl_t* pssrc_ctrl) +{ + // Setup input / output buffers + // ---------------------------- + pssrc_ctrl->sFIRF1Ctrl.piIn = pssrc_ctrl->piIn; + *(pssrc_ctrl->ppiOut) = pssrc_ctrl->piOut; + + // F1 and F2 process + // ----------------- + if( SSRC_proc_F1_F2(pssrc_ctrl) != SSRC_NO_ERROR) + return SSRC_ERROR; + + // F3 process + // ---------- + if( SSRC_proc_F3(pssrc_ctrl) != SSRC_NO_ERROR) + return SSRC_ERROR; + + // Dither process + // -------------- + if( SSRC_proc_dither(pssrc_ctrl) != SSRC_NO_ERROR) + return SSRC_ERROR; + + return SSRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: SSRC_proc_F1_F2 // +// Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // +// Return values: SSRC_NO_ERROR on success // +// SSRC_ERROR on failure // +// Description: Processes F1 and F2 for a channel // +// ==================================================================== // +SSRCReturnCodes_t SSRC_proc_F1_F2(ssrc_ctrl_t* pssrc_ctrl) +{ + int* piIn = pssrc_ctrl->piIn; + int* piOut = pssrc_ctrl->piOut; + unsigned int ui; + + + // Check if F1 is disabled, in which case we just copy input to output as all filters are disabled + if(pssrc_ctrl->sFIRF1Ctrl.eEnable == FIR_OFF) + { + // F1 is not enabled, which means that we are in 1:1 rate, so just copy input to output + for(ui = 0; ui < pssrc_ctrl->uiNInSamples * pssrc_ctrl->uiNchannels; ui+= pssrc_ctrl->uiNchannels) + piOut[ui] = piIn[ui]; + + return SSRC_NO_ERROR; + } + + // F1 is enabled, so call F1 + __attribute__((fptrgroup("MRHF_G1"))) + FIRReturnCodes_t ret = pssrc_ctrl->sFIRF1Ctrl.pvProc((int *)&pssrc_ctrl->sFIRF1Ctrl); + if(ret != FIR_NO_ERROR) + return SSRC_ERROR; + + + // Check if F2 is enabled + if(pssrc_ctrl->sFIRF2Ctrl.eEnable == FIR_ON) + { + // F2 is enabled, so call F2 + __attribute__((fptrgroup("MRHF_G1"))) + FIRReturnCodes_t ret = pssrc_ctrl->sFIRF2Ctrl.pvProc((int *)&pssrc_ctrl->sFIRF2Ctrl); + if(ret != FIR_NO_ERROR) + return SSRC_ERROR; + } + + return SSRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: SSRC_proc_F3 // +// Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // +// Return values: SSRC_NO_ERROR on success // +// SSRC_ERROR on failure // +// Description: Processes F3 for a channel // +// ==================================================================== // +SSRCReturnCodes_t SSRC_proc_F3(ssrc_ctrl_t* pssrc_ctrl) +{ + + // Check if F3 is enabled + if(pssrc_ctrl->sPPFIRF3Ctrl.eEnable == FIR_ON) + { + // F3 is enabled, so call F3 + if(PPFIR_proc(&pssrc_ctrl->sPPFIRF3Ctrl) != FIR_NO_ERROR) + return SSRC_ERROR; + } + + return SSRC_NO_ERROR; +} + + +// ==================================================================== // +// Function: SSRC_proc_dither // +// Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // +// Return values: SSRC_NO_ERROR on success // +// SSRC_ERROR on failure // +// Description: Processes dither for a channel // +// ==================================================================== // +SSRCReturnCodes_t SSRC_proc_dither(ssrc_ctrl_t* pssrc_ctrl) +{ + int* piData; + unsigned int uiR; + int iDither; + __int64_t i64Acc; + unsigned int ui; + + + // Apply dither if required + if(pssrc_ctrl->uiDitherOnOff == SSRC_DITHER_ON) + { + // Get data buffer + piData = pssrc_ctrl->piOut; + // Get random seed + uiR = pssrc_ctrl->psState->uiRndSeed; + + // Loop through samples + for(ui = 0; ui < *(pssrc_ctrl->puiNOutSamples) * pssrc_ctrl->uiNchannels; ui += pssrc_ctrl->uiNchannels) + { + // Compute dither sample (TPDF) + iDither = SSRC_DITHER_BIAS; + + uiR = (unsigned int)(SSRC_R_BASE * uiR); + uiR = (unsigned int)(SSRC_R_CONS + uiR); + iDither += ((uiR>>SSRC_RPDF_BITS_SHIFT) & SSRC_RPDF_MASK); + + uiR = (unsigned int)(SSRC_R_BASE * uiR); + uiR = (unsigned int)(SSRC_R_CONS + uiR); + iDither += ((uiR>>SSRC_RPDF_BITS_SHIFT) & SSRC_RPDF_MASK); + + //TODO - optimise this and remove IntArithmetic + // Use MACC instruction to saturate and dither + signal + i64Acc = ((__int64_t)iDither <<32); // On XMOS this is not necessary, just load dither in the top word of the ACC register + MACC(&i64Acc, piData[ui], 0x7FFFFFFF); + + // Saturate to 31 bits + LSAT30(&i64Acc); + + // Extract 32bits result + EXT30(&piData[ui], i64Acc); + + // Mask to 24bits + piData[ui] &= SSRC_DATA24_MASK; + + } + + // Write random seed back + pssrc_ctrl->psState->uiRndSeed = uiR; + } + + return SSRC_NO_ERROR; +} diff --git a/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc.h b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc.h new file mode 100644 index 0000000..5662fef --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc.h @@ -0,0 +1,201 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// =========================================================================== +// =========================================================================== +// +// Top level definition file for the SSRC +// +// Target: MS Windows +// Version: 1.0 +// +// =========================================================================== +// =========================================================================== + +#ifndef _SRC_MRHF_SSRC_H_ +#define _SRC_MRHF_SSRC_H_ + + // =========================================================================== + // + // Includes + // + // =========================================================================== + #include "src_mrhf_fir.h" + #include "src_mrhf_filter_defs.h" + #include "src.h" + + // =========================================================================== + // + // Defines + // + // =========================================================================== + + // General defines + // --------------- + #define SSRC_STACK_LENGTH_MULT (SSRC_N_CHANNELS * SSRC_N_IN_SAMPLES) // Multiplier for stack length (stack length = this value x the number of input samples to process) + + + // Parameter values + // ---------------- + #define SSRC_DITHER_OFF 0 + #define SSRC_DITHER_ON 1 + #define SSRC_DITHER_ON_OFF_MIN SSRC_DITHER_OFF + #define SSRC_DITHER_ON_OFF_MAX SSRC_DITHER_ON + + + + + // =========================================================================== + // + // Defines + // + // =========================================================================== + + + // =========================================================================== + // + // TypeDefs + // + // =========================================================================== + + // To avoid C type definitions when including this file from assembler + #ifndef INCLUDE_FROM_ASM + + // SSRC Return Codes + // ----------------- + typedef enum _SSRCReturnCodes + { + SSRC_NO_ERROR = 0, + SSRC_ERROR = 1 + } SSRCReturnCodes_t; + + + // Sampling rate codes + // ------------------- + typedef enum _SSRCFs + { + SSRC_FS_44 = 0, // Fs = 44.1kHz code + SSRC_FS_48 = 1, // Fs = 48kHz code + SSRC_FS_88 = 2, // Fs = 88.2kHz code + SSRC_FS_96 = 3, // Fs = 96kHz code + SSRC_FS_176 = 4, // Fs = 176.4kHz code + SSRC_FS_192 = 5, // Fs = 192kHz code + } SSRCFs_t; + #define SSRC_N_FS (SSRC_FS_192 + 1) + #define SSRC_FS_MIN SSRC_FS_44 + #define SSRC_FS_MAX SSRC_FS_192 + + + // SSRC Filters IDs structure + // -------------------------- + #define SSRC_F1_INDEX 0 + #define SSRC_F2_INDEX 1 + #define SSRC_F3_INDEX 2 + #define SSRC_N_F (SSRC_F3_INDEX + 1) + + typedef struct _SSRCFiltersIDs + { + unsigned int uiFID[SSRC_N_F]; + unsigned int uiPPFIRPhaseStep; + } SSRCFiltersIDs_t; + + + // SSRC State structure + // -------------------- + typedef struct _SSRCState + { + long long pad_to_64b_alignment; + int iDelayFIRLong[2 * FILTER_DEFS_FIR_MAX_TAPS_LONG]; // Doubled length for circular buffer simulation + int iDelayFIRShort[2 * FILTER_DEFS_FIR_MAX_TAPS_SHORT]; // Doubled length for circular buffer simulation + int iDelayPPFIR[2 * FILTER_DEFS_PPFIR_PHASE_MAX_TAPS]; // Doubled length for circular buffer simulation + unsigned int uiRndSeed; // Dither random seeds current values + + } ssrc_state_t; + + + // SSRC Control structure + // ---------------------- + typedef struct _SSRCCtrl + { +#ifdef __XC__ + long long pad_to_64b_alignment; //Force compiler to 64b align + unsigned int uiNchannels; // Number of channels in this instance + int* unsafe piIn; // Input buffer pointer (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int uiNInSamples; // Number of input samples to process in one call to the processing function + SSRCFs_t eInFs; // Input sampling rate code + int* unsafe piOut; // Output buffer poin ter (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int* unsafe puiNOutSamples; // Pointer to number of output samples produced during last call to the processing function + SSRCFs_t eOutFs; // Output sampling rate code + + int* unsafe * unsafe ppiOut; // Pointer to (PP)FIR output data pointer for last filter in the chain + + FIRCtrl_t sFIRF1Ctrl; // F1 FIR controller + FIRCtrl_t sFIRF2Ctrl; // F2 FIR controller + PPFIRCtrl_t sPPFIRF3Ctrl; // F3 PPFIR controller + + unsigned int uiDitherOnOff; // Dither on/off flag + unsigned int uiRndSeedInit; // Dither random seed initial value + + ssrc_state_t* unsafe psState; // Pointer to state structure + int* unsafe piStack; // Pointer to stack buffer +#else + long long pad_to_64b_alignment; //Force compiler to 64b align + unsigned int uiNchannels; // Number of channels in this instance + + int* piIn; // Input buffer pointer (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int uiNInSamples; // Number of input samples to process in one call to the processing function + SSRCFs_t eInFs; // Input sampling rate code + int* piOut; // Output buffer poin ter (PCM, 32bits, 2 channels time domain interleaved data) + unsigned int* puiNOutSamples; // Pointer to number of output samples produced during last call to the processing function + SSRCFs_t eOutFs; // Output sampling rate code + + int* * ppiOut; // Pointer to (PP)FIR output data pointer for last filter in the chain + + FIRCtrl_t sFIRF1Ctrl; // F1 FIR controller + FIRCtrl_t sFIRF2Ctrl; // F2 FIR controller + PPFIRCtrl_t sPPFIRF3Ctrl; // F3 PPFIR controller + + unsigned int uiDitherOnOff; // Dither on/off flag + unsigned int uiRndSeedInit; // Dither random seed initial value + + ssrc_state_t* psState; // Pointer to state structure + int* piStack; // Pointer to stack buffer +#endif + } ssrc_ctrl_t; + + + // =========================================================================== + // + // Function prototypes + // + // =========================================================================== + + // ==================================================================== // + // Function: SSRC_init // + // Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // + // Return values: SSRC_NO_ERROR on success // + // SSRC_ERROR on failure // + // Description: Inits the SSRC passed as argument // + // ==================================================================== // + SSRCReturnCodes_t SSRC_init(ssrc_ctrl_t* pssrc_ctrl); + + // ==================================================================== // + // Function: SSRC_sync // + // Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // + // Return values: SSRC_NO_ERROR on success // + // SSRC_ERROR on failure // + // Description: Syncs the SSRC passed as argument // + // ==================================================================== // + SSRCReturnCodes_t SSRC_sync(ssrc_ctrl_t* pssrc_ctrl); + + // ==================================================================== // + // Function: SSRC_proc // + // Arguments: ssrc_ctrl_t *pssrc_ctrl: Ctrl strct. // + // Return values: SSRC_NO_ERROR on success // + // SSRC_ERROR on failure // + // Description: Processes the SSRC passed as argument // + // ==================================================================== // + SSRCReturnCodes_t SSRC_proc(ssrc_ctrl_t* pssrc_ctrl); + + #endif // nINCLUDE_FROM_ASM + +#endif // _SRC_MRHF_SSRC_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc_checks.h b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc_checks.h new file mode 100644 index 0000000..c2c21e8 --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc_checks.h @@ -0,0 +1,37 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef _SRC_MRHF_SSRC_CHECKS_H_ +#define _SRC_MRHF_SSRC_CHECKS_H_ + +#include "src_mrhf_ssrc.h" + +//Compile time checks on SRC configuration defines +#if (SSRC_N_CHANNELS % SSRC_N_INSTANCES != 0) +#error "Each core must process an integer number of channels. Check SSRC_N_CHANNELS & SSRC_N_INSTANCES." +#endif +#if (SSRC_N_CHANNELS < SSRC_N_INSTANCES) +#error "Each instance (logical core) must process at least one channel. Check SSRC_N_CHANNELS & SSRC_N_INSTANCES." +#endif +#if (SSRC_N_INSTANCES < 1) +#error "Number of instances (logical cores) must be at least 1. Check SSRC_N_INSTANCES." +#endif +#if (SSRC_N_CHANNELS < 1) +#error "Number of audio channels must be at least 1. Check SSRC_N_CHANNELS." +#endif +#if (SSRC_N_IN_SAMPLES < 4) +#error "Number of input audio samples in each block must be at least 4. Check SSRC_N_IN_SAMPLES." +#endif +#if ((SSRC_N_IN_SAMPLES & (SSRC_N_IN_SAMPLES - 1)) != 0) +#error "Number of input audio samples in each block must be a power of two. Check SSRC_N_IN_SAMPLES." +#endif +#if (SSRC_N_OUT_IN_RATIO_MAX < 5) +#warning "SRC buffering configured so that fs out <= 4 * fs in" +#endif +#if (SSRC_N_OUT_IN_RATIO_MAX < 3) +#warning "SRC buffering configured so that fs out <= 2 * fs in" +#endif +#if (SSRC_N_OUT_IN_RATIO_MAX < 1) +#warning "SRC buffering configured so that fs out <= fs in" +#endif + +#endif // _SRC_MRHF_SSRC_CHECKS_H_ diff --git a/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc_wrapper.c b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc_wrapper.c new file mode 100644 index 0000000..886f47d --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/ssrc/src_mrhf_ssrc_wrapper.c @@ -0,0 +1,70 @@ +// Copyright 2016-2021 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +// General includes +#include +#include +#include +#include +#include +#include "debug_print.h" + +// SSRC includes +#include "src.h" + +static void ssrc_error(int code) +{ + debug_printf("SSRC_proc Error code %d\n", code); + delay_milliseconds(1); //Allow xscope to display message before quit + _Exit(code); +} + + +void ssrc_init(const fs_code_t sr_in, const fs_code_t sr_out, ssrc_ctrl_t *ssrc_ctrl, + const unsigned n_channels_per_instance, const unsigned n_in_samples, const dither_flag_t dither_on_off) +{ + SSRCReturnCodes_t ret_code; + unsigned ui; + + //Check to see if n_channels_per_instance, n_in_samples are reasonable + if ((n_in_samples & 0x1) || (n_in_samples < 4)) ssrc_error(100); + if (n_channels_per_instance < 1) ssrc_error(101); + + for(ui = 0; ui < n_channels_per_instance; ui++) + { + // Set number of channels per instance + ssrc_ctrl[ui].uiNchannels = n_channels_per_instance; + + // Set number of samples + ssrc_ctrl[ui].uiNInSamples = n_in_samples; + + // Set dither flag and random seeds + ssrc_ctrl[ui].uiDitherOnOff = dither_on_off; + ssrc_ctrl[ui].uiRndSeedInit = 12345 * ui; //Some randomish numbers. Value not critical + + // Set the sample rate codes + ssrc_ctrl[ui].eInFs = (int)sr_in; + ssrc_ctrl[ui].eOutFs = (int)sr_out; + + // Init SSRC instances + ret_code = SSRC_init(&ssrc_ctrl[ui]) ; + if(ret_code != SSRC_NO_ERROR) ssrc_error(ret_code); + } +} + +unsigned ssrc_process(int in_buff[], int out_buff[], ssrc_ctrl_t *ssrc_ctrl){ + + unsigned ui; + unsigned n_samps_out; + + // Get the number of channels per instance from first channel + const unsigned n_channels_per_instance = ssrc_ctrl[0].uiNchannels; + + for(ui = 0; ui < n_channels_per_instance; ui++) + { + ssrc_ctrl[ui].piIn = in_buff + ui; + ssrc_ctrl[ui].piOut = out_buff + ui; + if(SSRC_proc(&ssrc_ctrl[ui]) != SSRC_NO_ERROR) ssrc_error(0); + n_samps_out = (*ssrc_ctrl[ui].puiNOutSamples); + } + return n_samps_out; +} diff --git a/lib_src/lib_src/src/multirate_hifi/use_vpu.h b/lib_src/lib_src/src/multirate_hifi/use_vpu.h new file mode 100644 index 0000000..de3348d --- /dev/null +++ b/lib_src/lib_src/src/multirate_hifi/use_vpu.h @@ -0,0 +1,13 @@ +// Copyright 2024 XMOS LIMITED. +// This Software is subject to the terms of the XMOS Public Licence: Version 1. +#ifndef SRC_USE_VPU + #if defined(__XS3A__) + #define SRC_USE_VPU 1 + #else + #define SRC_USE_VPU 0 + #endif +#else + #if(defined(__XS2A__) && (SRC_USE_VPU != 0)) + #error VPU optimisation in lib_src is only available on XS3 (xcore.ai) architecture + #endif +#endif diff --git a/lib_src/requirements.txt b/lib_src/requirements.txt new file mode 100644 index 0000000..4d53f60 --- /dev/null +++ b/lib_src/requirements.txt @@ -0,0 +1,6 @@ +# python_version 3.10 +# pip_version 23.* + +-e ./python + +# Files are specified in setup.py \ No newline at end of file diff --git a/lib_src/settings.yml b/lib_src/settings.yml new file mode 100644 index 0000000..541c33d --- /dev/null +++ b/lib_src/settings.yml @@ -0,0 +1,17 @@ +--- +project: lib_src +title: SAMPLE RATE CONVERSION +version: 2.5.0 + +documentation: + exclude_patterns_path: doc/exclude_patterns.inc + doxygen_projects: + lib_xcore_math: + doxyfile_path: doc/Doxyfile.inc + pdfs: + doc/programming_guide/index: + pdf_title: "{{title}} - Programming Guide" + pdf_filename: "{{project}}_programming_guide_v{{version}}" + doc/python/_build/rst/allPlots: + pdf_title: "{{title}} - \\\\ Performance Characterisation for SSRC ASRC DS3 and OS3" + pdf_filename: "{{project}}_performance_characterisation_v{{version}}" diff --git a/lib_uart/.gitignore b/lib_uart/.gitignore new file mode 100644 index 0000000..ca6e511 --- /dev/null +++ b/lib_uart/.gitignore @@ -0,0 +1,17 @@ +**/.build*/* +**/bin/* +*.o +*.xe +*.vcd +*.s +*.xi +*.i +*.a +**/_build/ +**/run_*.log +**/pdf/* +**/html/* +**/.settings/* +*.pyc +test_results.csv +xscope_out.xmt \ No newline at end of file diff --git a/lib_uart/CHANGELOG.rst b/lib_uart/CHANGELOG.rst new file mode 100644 index 0000000..3e14b45 --- /dev/null +++ b/lib_uart/CHANGELOG.rst @@ -0,0 +1,75 @@ +UART Library Change Log +======================= + +3.1.0 +----- + + * RESOLVED: Correct the documentation for the write() method of + uart_tx_buffered_if + * RESOLVED: Added calls to ready_to_transmit() to the uart_tx_buffered + component + * RESOLVED: Improved the uart_tx_buffered so that it can now drive at full + data rate without clock drift. Before it was limited to about 0.5% less than + the baud rate + +3.0.3 +----- + + * REMOVED: forward references to app notes + +3.0.2 +----- + + * CHANGE: Update to source code license and copyright + +3.0.1 +----- + + * CHANGE: Update fast rx and tx to match API prototypes & fix port directions + * RESOLVED: Fixed order of ports in api calls from example program + +3.0.0 +----- + + * CHANGE: Restructued version + + * Changes to dependencies: + + - lib_gpio: Added dependency 1.0.0 + + - lib_logging: Added dependency 2.0.0 + + - lib_xassert: Added dependency 2.0.0 + +2.3.2 +----- + + * CHANGE: Increment version for XPD release. Several minor docs bugs fixed. + +2.3.1 +----- + + * CHANGE: Tidied up uart_fast and targetted demo at L16 sliceKIT + +3.0.0 +----- + + * CHANGE: Major change to generic UART tx/rx components to use new xC features + with different api. + +2.3.0 +----- + + * ADDED: RS485 component and apps + +2.2.0 +----- + + * CHANGE: Updated documents for xSOFTip requirements + * ADDED: Metainfo and XPD items + +2.1.0 +----- + + * CHANGE: Documentation Updates + diff --git a/lib_uart/LICENSE.txt b/lib_uart/LICENSE.txt new file mode 100644 index 0000000..dcc68d8 --- /dev/null +++ b/lib_uart/LICENSE.txt @@ -0,0 +1,135 @@ +Software Release License Agreement + +Copyright (c) 2014-2018, XMOS, All rights reserved. + +BY ACCESSING, USING, INSTALLING OR DOWNLOADING THE XMOS SOFTWARE, YOU AGREE TO BE BOUND BY THE FOLLOWING TERMS. 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Entire agreement + +This License and the documents annexed as appendices to this License or otherwise referred to herein contain the whole agreement between the parties relating to the subject matter hereof and supersede all prior agreements, arrangements and understandings between the parties relating to that subject matter. + +16. Assignment + +The Customer shall not assign this License or any of the rights granted under it without XMOS's prior written consent. + +17. Governing law and jurisdiction + +This License shall be governed by and construed in accordance with English law and each party hereby submits to the non-exclusive jurisdiction of the English courts. + +This License has been entered into on the date stated at the beginning of it. + +Schedule +XMOS UART library software diff --git a/lib_uart/README.rst b/lib_uart/README.rst new file mode 100644 index 0000000..25eb243 --- /dev/null +++ b/lib_uart/README.rst @@ -0,0 +1,99 @@ +UART library +============ + +Summary +------- + +A software defined, industry-standard, UART (Universal Asynchronous +Receiver/Transmitter) library +that allows you to control a UART serial connection via the +xCORE GPIO ports. This library is controlled +via C using the XMOS multicore extensions. + +Features +........ + +.. sidebysidelist:: + + * UART receive and transmit + * Supports speeds up to 10MBit/s + * Half-duplex mode (applicable to RS485) + * Efficient multi-uart mode for implementing multiple connections + + +Resource Usage +.............. + +.. resusage:: + + + * - configuration: Standard TX + - globals: + - locals: output_gpio_if i_gpio_tx; interface uart_tx_if i_tx; + - fn: uart_tx(i_tx, null, + 115200, UART_PARITY_NONE, 8, 1, + i_gpio_tx); + - pins: 1 + - ports: 1 + + * - configuration: Standard TX (buffered) + - globals: + - locals: output_gpio_if i_gpio_tx; interface uart_tx_buffered_if i_tx; + - fn: uart_tx_buffered(i_tx, null, 5, + 115200, UART_PARITY_NONE, 8, 1, + i_gpio_tx); + - pins: 1 + - ports: 1 + + * - configuration: Standard RX + - globals: + - locals: input_gpio_if i_gpio_rx; interface uart_rx_if i_rx; + - fn: uart_rx(i_rx, null, 5, + 115200, UART_PARITY_NONE, 8, 1, + i_gpio_rx); + - pins: 1 + - ports: 1 + + * - configuration: Fast/streaming TX + - globals: out port p_uart_tx = XS1_PORT_1A; + - locals: streaming chan c; + - fn: uart_tx_streaming(p_uart_tx, c, 100); + - pins: 1 + - ports: 1 + + * - configuration: Fast/streaming RX + - globals: in port p_uart_tx = XS1_PORT_1A; + - locals: streaming chan c; + - fn: uart_rx_streaming(p_uart_tx, c, 100); + - pins: 1 + - ports: 1 + + * - configuration: Multi-UART TX (8 UARTs) + - globals: out buffered port:8 p_uart_tx = XS1_PORT_8B; + - locals: interface multi_uart_tx_if i_tx; chan c_tx; + - fn: multi_uart_tx(c_tx, i_tx, p_uart_tx, 8, 1843200, 115200, UART_PARITY_NONE, 8, 1); + - pins: 8 + - ports: 1 + - cores: 1 + + * - configuration: Multi-UART RX (8 UARTs) + - globals: in buffered port:32 p_uart_rx = XS1_PORT_8B; + - locals: interface multi_uart_rx_if i_rx; streaming chan c_rx; + - fn: multi_uart_rx(c_rx, i_rx, p_uart_rx, 8, 1843200, 115200, UART_PARITY_NONE, 8, 1); + - pins: 8 + - ports: 1 + - cores: 1 + + * - configuration: Half Duplex + - globals: port p_uart = XS1_PORT_1A; + - locals: interface uart_tx_buffered_if i_tx; uart_rx_if i_rx; uart_control_if i_ctl; + - fn: uart_half_duplex(i_tx, i_rx, i_ctl, null, 10, 10, 115200, UART_PARITY_NONE, 8, 1, p_uart); + - pins: 1 + - ports: 1 + - cores: 1 + + +Software version and dependencies +................................. + +.. libdeps:: diff --git a/lib_uart/examples/multi_uart_demo/.cproject b/lib_uart/examples/multi_uart_demo/.cproject new file mode 100644 index 0000000..12b7015 --- /dev/null +++ b/lib_uart/examples/multi_uart_demo/.cproject @@ -0,0 +1,968 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib_uart/examples/multi_uart_demo/.project b/lib_uart/examples/multi_uart_demo/.project new file mode 100644 index 0000000..827b688 --- /dev/null +++ b/lib_uart/examples/multi_uart_demo/.project @@ -0,0 +1,90 @@ + + + multi_uart_demo + + + + + + com.xmos.cdt.core.ProjectInfoSyncBuilder + + + + + com.xmos.cdt.core.LegacyProjectCheckerBuilder + + + + + com.xmos.cdt.core.ModulePathBuilder + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + CONFIG=Debug + + + org.eclipse.cdt.make.core.buildCommand + xmake + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.xmos.cdt.core.XdeProjectNature + + diff --git a/lib_uart/examples/multi_uart_demo/LICENSE.txt b/lib_uart/examples/multi_uart_demo/LICENSE.txt new file mode 100644 index 0000000..8148733 --- /dev/null +++ b/lib_uart/examples/multi_uart_demo/LICENSE.txt @@ -0,0 +1,135 @@ +Software Release License Agreement + +Copyright (c) 2015-2017, XMOS, All rights reserved. + +BY ACCESSING, USING, INSTALLING OR DOWNLOADING THE XMOS SOFTWARE, YOU AGREE TO BE BOUND BY THE FOLLOWING TERMS. IF YOU DO NOT AGREE TO THESE, DO NOT ATTEMPT TO DOWNLOAD, ACCESS OR USE THE XMOS Software. + +Parties: + +(1) XMOS Limited, incorporated and registered in England and Wales with company number 5494985 whose registered office is 107 Cheapside, London, EC2V 6DN (XMOS). + +(2) An individual or legal entity exercising permissions granted by this License (Customer). + +If you are entering into this Agreement on behalf of another legal entity such as a company, partnership, university, college etc. (for example, as an employee, student or consultant), you warrant that you have authority to bind that entity. + +1. Definitions + +"License" means this Software License and any schedules or annexes to it. + +"License Fee" means the fee for the XMOS Software as detailed in any schedules or annexes to this Software License + +"Licensee Modifications" means all developments and modifications of the XMOS Software developed independently by the Customer. + +"XMOS Modifications" means all developments and modifications of the XMOS Software developed or co-developed by XMOS. + +"XMOS Hardware" means any XMOS hardware devices supplied by XMOS from time to time and/or the particular XMOS devices detailed in any schedules or annexes to this Software License. + +"XMOS Software" comprises the XMOS owned circuit designs, schematics, source code, object code, reference designs, (including related programmer comments and documentation, if any), error corrections, improvements, modifications (including XMOS Modifications) and updates. + +The headings in this License do not affect its interpretation. Save where the context otherwise requires, references to clauses and schedules are to clauses and schedules of this License. + +Unless the context otherwise requires: + +- references to XMOS and the Customer include their permitted successors and assigns; +- references to statutory provisions include those statutory provisions as amended or re-enacted; and +- references to any gender include all genders. + +Words in the singular include the plural and in the plural include the singular. + +2. License + +XMOS grants the Customer a non-exclusive license to use, develop, modify and distribute the XMOS Software with, or for the purpose of being used with, XMOS Hardware. + +Open Source Software (OSS) must be used and dealt with in accordance with any license terms under which OSS is distributed. + +3. Consideration + +In consideration of the mutual obligations contained in this License, the parties agree to its terms. + +4. Term + +Subject to clause 12 below, this License shall be perpetual. + +5. Restrictions on Use + +The Customer will adhere to all applicable import and export laws and regulations of the country in which it resides and of the United States and United Kingdom, without limitation. The Customer agrees that it is its responsibility to obtain copies of and to familiarise itself fully with these laws and regulations to avoid violation. + +6. Modifications + +The Customer will own all intellectual property rights in the Licensee Modifications but will undertake to provide XMOS with any fixes made to correct any bugs found in the XMOS Software on a non-exclusive, perpetual and royalty free license basis. + +XMOS will own all intellectual property rights in the XMOS Modifications. +The Customer may only use the Licensee Modifications and XMOS Modifications on, or in relation to, XMOS Hardware. + +7. Support + +Support of the XMOS Software may be provided by XMOS pursuant to a separate support agreement. + +8. Warranty and Disclaimer + +The XMOS Software is provided "AS IS" without a warranty of any kind. XMOS and its licensors' entire liability and Customer's exclusive remedy under this warranty to be determined in XMOS's sole and absolute discretion, will be either (a) the corrections of defects in media or replacement of the media, or (b) the refund of the license fee paid (if any). + +Whilst XMOS gives the Customer the ability to load their own software and applications onto XMOS devices, the security of such software and applications when on the XMOS devices is the Customer's own responsibility and any breach of security shall not be deemed a defect or failure of the hardware. XMOS shall have no liability whatsoever in relation to any costs, damages or other losses Customer may incur as a result of any breaches of security in relation to your software or applications. + +XMOS AND ITS LICENSORS DISCLAIM ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY/ SATISFACTORY QUALITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT EXCEPT TO THE EXTENT THAT THESE DISCLAIMERS ARE HELD TO BE LEGALLY INVALID UNDER APPLICABLE LAW. + +9. High Risk Activities + +The XMOS Software is not designed or intended for use in conjunction with on-line control equipment in hazardous environments requiring fail-safe performance, including without limitation the operation of nuclear facilities, aircraft navigation or communication systems, air traffic control, life support machines, or weapons systems (collectively "High Risk Activities") in which the failure of the XMOS Software could lead directly to death, personal injury, or severe physical or environmental damage. XMOS and its licensors specifically disclaim any express or implied warranties relating to use of the XMOS Software in connection with High Risk Activities. + +10. Liability + +TO THE EXTENT NOT PROHIBITED BY APPLICABLE LAW, NEITHER XMOS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY LOST REVENUE, BUSINESS, PROFIT, CONTRACTS OR DATA, ADMINISTRATIVE OR OVERHEAD EXPENSES, OR FOR SPECIAL, INDIRECT, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE DAMAGES HOWEVER CAUSED AND REGARDLESS OF THEORY OF LIABILITY ARISING OUT OF THIS LICENSE, EVEN IF XMOS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall XMOS's liability to the Customer whether in contract, tort (including negligence), or otherwise exceed the License Fee. + +Customer agrees to indemnify, hold harmless, and defend XMOS and its licensors from and against any claims or lawsuits, including attorneys' fees and any other liabilities, demands, proceedings, damages, losses, costs, expenses fines and charges which are made or brought against or incurred by XMOS as a result of your use or distribution of the Licensee Modifications or your use or distribution of XMOS Software, or any development of it, other than in accordance with the terms of this License. + +11. Ownership + +The copyrights and all other intellectual and industrial property rights for the protection of information with respect to the XMOS Software (including the methods and techniques on which they are based) are retained by XMOS and/or its licensors. Nothing in this Agreement serves to transfer such rights. Customer may not sell, mortgage, underlet, sublease, sublicense, lend or transfer possession of the XMOS Software in any way whatsoever to any third party who is not bound by this Agreement. + +12. Termination + +Either party may terminate this License at any time on written notice to the other if the other: + +- is in material or persistent breach of any of the terms of this License and either that breach is incapable of remedy, or the other party fails to remedy that breach within 30 days after receiving written notice requiring it to remedy that breach; or + +- is unable to pay its debts (within the meaning of section 123 of the Insolvency Act 1986), or becomes insolvent, or is subject to an order or a resolution for its liquidation, administration, winding-up or dissolution (otherwise than for the purposes of a solvent amalgamation or reconstruction), or has an administrative or other receiver, manager, trustee, liquidator, administrator or similar officer appointed over all or any substantial part of its assets, or enters into or proposes any composition or arrangement with its creditors generally, or is subject to any analogous event or proceeding in any applicable jurisdiction. + +Termination by either party in accordance with the rights contained in clause 12 shall be without prejudice to any other rights or remedies of that party accrued prior to termination. + +On termination for any reason: + +- all rights granted to the Customer under this License shall cease; +- the Customer shall cease all activities authorised by this License; +- the Customer shall immediately pay any sums due to XMOS under this License; and +- the Customer shall immediately destroy or return to the XMOS (at the XMOS's option) all copies of the XMOS Software then in its possession, custody or control and, in the case of destruction, certify to XMOS that it has done so. + +Clauses 5, 8, 9, 10 and 11 shall survive any effective termination of this Agreement. + +13. Third party rights + +No term of this License is intended to confer a benefit on, or to be enforceable by, any person who is not a party to this license. + +14. Confidentiality and publicity + +Each party shall, during the term of this License and thereafter, keep confidential all, and shall not use for its own purposes nor without the prior written consent of the other disclose to any third party any, information of a confidential nature (including, without limitation, trade secrets and information of commercial value) which may become known to such party from the other party and which relates to the other party, unless such information is public knowledge or already known to such party at the time of disclosure, or subsequently becomes public knowledge other than by breach of this license, or subsequently comes lawfully into the possession of such party from a third party. + +The terms of this license are confidential and may not be disclosed by the Customer without the prior written consent of XMOS. +The provisions of clause 14 shall remain in full force and effect notwithstanding termination of this license for any reason. + +15. Entire agreement + +This License and the documents annexed as appendices to this License or otherwise referred to herein contain the whole agreement between the parties relating to the subject matter hereof and supersede all prior agreements, arrangements and understandings between the parties relating to that subject matter. + +16. Assignment + +The Customer shall not assign this License or any of the rights granted under it without XMOS's prior written consent. + +17. Governing law and jurisdiction + +This License shall be governed by and construed in accordance with English law and each party hereby submits to the non-exclusive jurisdiction of the English courts. + +This License has been entered into on the date stated at the beginning of it. + +Schedule +XMOS UART library software diff --git a/lib_uart/examples/multi_uart_demo/Makefile b/lib_uart/examples/multi_uart_demo/Makefile new file mode 100644 index 0000000..d313ab6 --- /dev/null +++ b/lib_uart/examples/multi_uart_demo/Makefile @@ -0,0 +1,31 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +XCC_FLAGS = -g -O3 -save-temps -DMUART_RX_CHAN_COUNT=8 -DMUART_TX_CHAN_COUNT=8 + +# The USED_MODULES variable lists other module used by the application. +USED_MODULES = lib_logging lib_uart + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_uart/examples/multi_uart_demo/src/main.xc b/lib_uart/examples/multi_uart_demo/src/main.xc new file mode 100644 index 0000000..f1bfe2b --- /dev/null +++ b/lib_uart/examples/multi_uart_demo/src/main.xc @@ -0,0 +1,65 @@ +// Copyright (c) 2015-2016, XMOS Ltd, All rights reserved +#include +#include +#include +#include + +// These ports are configures assuming the multi-UART slice is +// connected to the STAR slot. For other slots the ports will +// need to be changed. +in buffered port:32 p_uart_rx = XS1_PORT_8A; +out buffered port:8 p_uart_tx = XS1_PORT_8B; +in port p_uart_clk = XS1_PORT_1F; + +clock clk_uart = XS1_CLKBLK_4; + +void loopback(streaming chanend c_rx, client multi_uart_rx_if i_rx, + chanend c_tx, client multi_uart_tx_if i_tx) +{ + size_t slot; + + // Configure each task with a chanend + i_rx.init(c_rx); + i_tx.init(c_tx); + + while (1) { + select { + case multi_uart_data_ready(c_rx, slot): + uint8_t data; + if (i_rx.read(slot, data) == UART_RX_VALID_DATA) { + if (i_tx.is_slot_free(slot)) { + i_tx.write(slot, data); + } + else { + debug_printf("Warning: TX buffer overflow on channel %d\n", + slot); + } + } + break; + } + } +} + +int main(void) +{ + interface multi_uart_rx_if i_rx; + streaming chan c_rx; + chan c_tx; + interface multi_uart_tx_if i_tx; + + // Set the rx and tx lines to be clocked off the clk_uart clock block + configure_in_port(p_uart_rx, clk_uart); + configure_out_port(p_uart_tx, clk_uart, 0); + + // Configure an external clock for the clk_uart clock block + configure_clock_src(clk_uart, p_uart_clk); + start_clock(clk_uart); + + // Start the rx/tx tasks and the application task + par { + multi_uart_rx(c_rx, i_rx, p_uart_rx, 8, 1843200, 115200, UART_PARITY_NONE, 8, 1); + multi_uart_tx(c_tx, i_tx, p_uart_tx, 8, 1843200, 115200, UART_PARITY_NONE, 8, 1); + loopback(c_rx, i_rx, c_tx, i_tx); + } + return 0; +} diff --git a/lib_uart/examples/uart_demo/.cproject b/lib_uart/examples/uart_demo/.cproject new file mode 100644 index 0000000..5735ef8 --- /dev/null +++ b/lib_uart/examples/uart_demo/.cproject @@ -0,0 +1,634 @@ + + + + + + + + + + + + + + + + xmake + + all + true + true + true + + + xmake + + clean + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib_uart/examples/uart_demo/.project b/lib_uart/examples/uart_demo/.project new file mode 100644 index 0000000..9d02d0c --- /dev/null +++ b/lib_uart/examples/uart_demo/.project @@ -0,0 +1,95 @@ + + + uart_demo + + + + + + com.xmos.cdt.core.ModulePathBuilder + + + + + com.xmos.cdt.core.BuildMarkersBuilder + + + + + com.xmos.cdt.core.ProjectCheckerBuilder + + + + + com.xmos.cdt.core.ProjectInfoSyncBuilder + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?name?=outputEntries\|?children?=?name?=entry\\\\|\\|\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + CONFIG=Debug + + + org.eclipse.cdt.make.core.buildCommand + xmake + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.xmos.cdt.core.XdeProjectNature + + diff --git a/lib_uart/examples/uart_demo/.xproject b/lib_uart/examples/uart_demo/.xproject new file mode 100644 index 0000000..ce540a5 --- /dev/null +++ b/lib_uart/examples/uart_demo/.xproject @@ -0,0 +1 @@ +sc_uartXM-001906-SM \ No newline at end of file diff --git a/lib_uart/examples/uart_demo/LICENSE.txt b/lib_uart/examples/uart_demo/LICENSE.txt new file mode 100644 index 0000000..8b30cb4 --- /dev/null +++ b/lib_uart/examples/uart_demo/LICENSE.txt @@ -0,0 +1,135 @@ +Software Release License Agreement + +Copyright (c) 2014-2017, XMOS, All rights reserved. + +BY ACCESSING, USING, INSTALLING OR DOWNLOADING THE XMOS SOFTWARE, YOU AGREE TO BE BOUND BY THE FOLLOWING TERMS. IF YOU DO NOT AGREE TO THESE, DO NOT ATTEMPT TO DOWNLOAD, ACCESS OR USE THE XMOS Software. + +Parties: + +(1) XMOS Limited, incorporated and registered in England and Wales with company number 5494985 whose registered office is 107 Cheapside, London, EC2V 6DN (XMOS). + +(2) An individual or legal entity exercising permissions granted by this License (Customer). + +If you are entering into this Agreement on behalf of another legal entity such as a company, partnership, university, college etc. (for example, as an employee, student or consultant), you warrant that you have authority to bind that entity. + +1. Definitions + +"License" means this Software License and any schedules or annexes to it. + +"License Fee" means the fee for the XMOS Software as detailed in any schedules or annexes to this Software License + +"Licensee Modifications" means all developments and modifications of the XMOS Software developed independently by the Customer. + +"XMOS Modifications" means all developments and modifications of the XMOS Software developed or co-developed by XMOS. + +"XMOS Hardware" means any XMOS hardware devices supplied by XMOS from time to time and/or the particular XMOS devices detailed in any schedules or annexes to this Software License. + +"XMOS Software" comprises the XMOS owned circuit designs, schematics, source code, object code, reference designs, (including related programmer comments and documentation, if any), error corrections, improvements, modifications (including XMOS Modifications) and updates. + +The headings in this License do not affect its interpretation. Save where the context otherwise requires, references to clauses and schedules are to clauses and schedules of this License. + +Unless the context otherwise requires: + +- references to XMOS and the Customer include their permitted successors and assigns; +- references to statutory provisions include those statutory provisions as amended or re-enacted; and +- references to any gender include all genders. + +Words in the singular include the plural and in the plural include the singular. + +2. License + +XMOS grants the Customer a non-exclusive license to use, develop, modify and distribute the XMOS Software with, or for the purpose of being used with, XMOS Hardware. + +Open Source Software (OSS) must be used and dealt with in accordance with any license terms under which OSS is distributed. + +3. Consideration + +In consideration of the mutual obligations contained in this License, the parties agree to its terms. + +4. Term + +Subject to clause 12 below, this License shall be perpetual. + +5. Restrictions on Use + +The Customer will adhere to all applicable import and export laws and regulations of the country in which it resides and of the United States and United Kingdom, without limitation. The Customer agrees that it is its responsibility to obtain copies of and to familiarise itself fully with these laws and regulations to avoid violation. + +6. Modifications + +The Customer will own all intellectual property rights in the Licensee Modifications but will undertake to provide XMOS with any fixes made to correct any bugs found in the XMOS Software on a non-exclusive, perpetual and royalty free license basis. + +XMOS will own all intellectual property rights in the XMOS Modifications. +The Customer may only use the Licensee Modifications and XMOS Modifications on, or in relation to, XMOS Hardware. + +7. Support + +Support of the XMOS Software may be provided by XMOS pursuant to a separate support agreement. + +8. Warranty and Disclaimer + +The XMOS Software is provided "AS IS" without a warranty of any kind. XMOS and its licensors' entire liability and Customer's exclusive remedy under this warranty to be determined in XMOS's sole and absolute discretion, will be either (a) the corrections of defects in media or replacement of the media, or (b) the refund of the license fee paid (if any). + +Whilst XMOS gives the Customer the ability to load their own software and applications onto XMOS devices, the security of such software and applications when on the XMOS devices is the Customer's own responsibility and any breach of security shall not be deemed a defect or failure of the hardware. XMOS shall have no liability whatsoever in relation to any costs, damages or other losses Customer may incur as a result of any breaches of security in relation to your software or applications. + +XMOS AND ITS LICENSORS DISCLAIM ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY/ SATISFACTORY QUALITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT EXCEPT TO THE EXTENT THAT THESE DISCLAIMERS ARE HELD TO BE LEGALLY INVALID UNDER APPLICABLE LAW. + +9. High Risk Activities + +The XMOS Software is not designed or intended for use in conjunction with on-line control equipment in hazardous environments requiring fail-safe performance, including without limitation the operation of nuclear facilities, aircraft navigation or communication systems, air traffic control, life support machines, or weapons systems (collectively "High Risk Activities") in which the failure of the XMOS Software could lead directly to death, personal injury, or severe physical or environmental damage. XMOS and its licensors specifically disclaim any express or implied warranties relating to use of the XMOS Software in connection with High Risk Activities. + +10. Liability + +TO THE EXTENT NOT PROHIBITED BY APPLICABLE LAW, NEITHER XMOS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY LOST REVENUE, BUSINESS, PROFIT, CONTRACTS OR DATA, ADMINISTRATIVE OR OVERHEAD EXPENSES, OR FOR SPECIAL, INDIRECT, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE DAMAGES HOWEVER CAUSED AND REGARDLESS OF THEORY OF LIABILITY ARISING OUT OF THIS LICENSE, EVEN IF XMOS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall XMOS's liability to the Customer whether in contract, tort (including negligence), or otherwise exceed the License Fee. + +Customer agrees to indemnify, hold harmless, and defend XMOS and its licensors from and against any claims or lawsuits, including attorneys' fees and any other liabilities, demands, proceedings, damages, losses, costs, expenses fines and charges which are made or brought against or incurred by XMOS as a result of your use or distribution of the Licensee Modifications or your use or distribution of XMOS Software, or any development of it, other than in accordance with the terms of this License. + +11. Ownership + +The copyrights and all other intellectual and industrial property rights for the protection of information with respect to the XMOS Software (including the methods and techniques on which they are based) are retained by XMOS and/or its licensors. Nothing in this Agreement serves to transfer such rights. Customer may not sell, mortgage, underlet, sublease, sublicense, lend or transfer possession of the XMOS Software in any way whatsoever to any third party who is not bound by this Agreement. + +12. Termination + +Either party may terminate this License at any time on written notice to the other if the other: + +- is in material or persistent breach of any of the terms of this License and either that breach is incapable of remedy, or the other party fails to remedy that breach within 30 days after receiving written notice requiring it to remedy that breach; or + +- is unable to pay its debts (within the meaning of section 123 of the Insolvency Act 1986), or becomes insolvent, or is subject to an order or a resolution for its liquidation, administration, winding-up or dissolution (otherwise than for the purposes of a solvent amalgamation or reconstruction), or has an administrative or other receiver, manager, trustee, liquidator, administrator or similar officer appointed over all or any substantial part of its assets, or enters into or proposes any composition or arrangement with its creditors generally, or is subject to any analogous event or proceeding in any applicable jurisdiction. + +Termination by either party in accordance with the rights contained in clause 12 shall be without prejudice to any other rights or remedies of that party accrued prior to termination. + +On termination for any reason: + +- all rights granted to the Customer under this License shall cease; +- the Customer shall cease all activities authorised by this License; +- the Customer shall immediately pay any sums due to XMOS under this License; and +- the Customer shall immediately destroy or return to the XMOS (at the XMOS's option) all copies of the XMOS Software then in its possession, custody or control and, in the case of destruction, certify to XMOS that it has done so. + +Clauses 5, 8, 9, 10 and 11 shall survive any effective termination of this Agreement. + +13. Third party rights + +No term of this License is intended to confer a benefit on, or to be enforceable by, any person who is not a party to this license. + +14. Confidentiality and publicity + +Each party shall, during the term of this License and thereafter, keep confidential all, and shall not use for its own purposes nor without the prior written consent of the other disclose to any third party any, information of a confidential nature (including, without limitation, trade secrets and information of commercial value) which may become known to such party from the other party and which relates to the other party, unless such information is public knowledge or already known to such party at the time of disclosure, or subsequently becomes public knowledge other than by breach of this license, or subsequently comes lawfully into the possession of such party from a third party. + +The terms of this license are confidential and may not be disclosed by the Customer without the prior written consent of XMOS. +The provisions of clause 14 shall remain in full force and effect notwithstanding termination of this license for any reason. + +15. Entire agreement + +This License and the documents annexed as appendices to this License or otherwise referred to herein contain the whole agreement between the parties relating to the subject matter hereof and supersede all prior agreements, arrangements and understandings between the parties relating to that subject matter. + +16. Assignment + +The Customer shall not assign this License or any of the rights granted under it without XMOS's prior written consent. + +17. Governing law and jurisdiction + +This License shall be governed by and construed in accordance with English law and each party hereby submits to the non-exclusive jurisdiction of the English courts. + +This License has been entered into on the date stated at the beginning of it. + +Schedule +XMOS UART library software diff --git a/lib_uart/examples/uart_demo/Makefile b/lib_uart/examples/uart_demo/Makefile new file mode 100644 index 0000000..74bab7a --- /dev/null +++ b/lib_uart/examples/uart_demo/Makefile @@ -0,0 +1,32 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +XCC_FLAGS = -O2 -g -save-temps + +# The USED_MODULES variable lists other module used by the application. + +USED_MODULES = lib_uart + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_uart/examples/uart_demo/README.rst b/lib_uart/examples/uart_demo/README.rst new file mode 100644 index 0000000..be1d0e7 --- /dev/null +++ b/lib_uart/examples/uart_demo/README.rst @@ -0,0 +1,11 @@ +Generic Uart Loopback Example +============================= + +:scope: Example +:description: Application to demonstrate module_uart_rx and module_uart_tx running looped back on a single Slicekti core board. +:keywords: UART, demo +:boards: XA-SKC-L2 + +This application instantiates both the module_uart_rx and module_uart_tx components looped back to one another to demonstrate basic usage. It will be necessary to setup two connections on the 0.1" testpoints on the Slicekti core board prior to running the demo. + + diff --git a/lib_uart/examples/uart_demo/src/main.xc b/lib_uart/examples/uart_demo/src/main.xc new file mode 100644 index 0000000..a156dd6 --- /dev/null +++ b/lib_uart/examples/uart_demo/src/main.xc @@ -0,0 +1,56 @@ +// Copyright (c) 2014-2016, XMOS Ltd, All rights reserved +#include +#include +#include +#include +#include + +// Port declarations +port p_uart_rx = on tile[0] : XS1_PORT_1A; +port p_uart_tx = on tile[0] : XS1_PORT_1B; + +#define BAUD_RATE 115200 +#define RX_BUFFER_SIZE 64 + +/* This function performs the main "application" that outputs and reads + some bytes over UART */ +void app(client uart_tx_if uart_tx, client uart_rx_if uart_rx) +{ + uint8_t byte; + printstrln("Test started"); + byte = 0; + for (size_t i = 0; i < 20; i++) { + printstr("Echo 10 bytes... "); + for(size_t j = 0; j < 10; j++) { + uart_tx.write(byte); + byte = byte + 1; + } + for(size_t j = 0; j < 10; j++) { + printhex(uart_rx.wait_for_data_and_read()); + } + } + printstrln(". Done."); +} + +void test() { while (1);} + +/* "main" function that sets up two uarts and the application */ +int main() { + interface uart_rx_if i_rx; + interface uart_tx_if i_tx; + input_gpio_if i_gpio_rx; + output_gpio_if i_gpio_tx[1]; + par { + on tile[0]: test(); + on tile[0]: output_gpio(i_gpio_tx, 1, p_uart_tx, null); + on tile[0]: uart_tx(i_tx, null, + BAUD_RATE, UART_PARITY_NONE, 8, 1, + i_gpio_tx[0]); + on tile[0].core[0] : input_gpio_1bit_with_events(i_gpio_rx, p_uart_rx); + on tile[0].core[0] : uart_rx(i_rx, null, RX_BUFFER_SIZE, + BAUD_RATE, UART_PARITY_NONE, 8, 1, + i_gpio_rx); + on tile[0]: app(i_tx, i_rx); + } + return 0; +} diff --git a/lib_uart/examples/uart_streaming_demo/LICENSE.txt b/lib_uart/examples/uart_streaming_demo/LICENSE.txt new file mode 100644 index 0000000..8148733 --- /dev/null +++ b/lib_uart/examples/uart_streaming_demo/LICENSE.txt @@ -0,0 +1,135 @@ +Software Release License Agreement + +Copyright (c) 2015-2017, XMOS, All rights reserved. + +BY ACCESSING, USING, INSTALLING OR DOWNLOADING THE XMOS SOFTWARE, YOU AGREE TO BE BOUND BY THE FOLLOWING TERMS. IF YOU DO NOT AGREE TO THESE, DO NOT ATTEMPT TO DOWNLOAD, ACCESS OR USE THE XMOS Software. + +Parties: + +(1) XMOS Limited, incorporated and registered in England and Wales with company number 5494985 whose registered office is 107 Cheapside, London, EC2V 6DN (XMOS). + +(2) An individual or legal entity exercising permissions granted by this License (Customer). + +If you are entering into this Agreement on behalf of another legal entity such as a company, partnership, university, college etc. (for example, as an employee, student or consultant), you warrant that you have authority to bind that entity. + +1. Definitions + +"License" means this Software License and any schedules or annexes to it. + +"License Fee" means the fee for the XMOS Software as detailed in any schedules or annexes to this Software License + +"Licensee Modifications" means all developments and modifications of the XMOS Software developed independently by the Customer. + +"XMOS Modifications" means all developments and modifications of the XMOS Software developed or co-developed by XMOS. + +"XMOS Hardware" means any XMOS hardware devices supplied by XMOS from time to time and/or the particular XMOS devices detailed in any schedules or annexes to this Software License. + +"XMOS Software" comprises the XMOS owned circuit designs, schematics, source code, object code, reference designs, (including related programmer comments and documentation, if any), error corrections, improvements, modifications (including XMOS Modifications) and updates. + +The headings in this License do not affect its interpretation. Save where the context otherwise requires, references to clauses and schedules are to clauses and schedules of this License. + +Unless the context otherwise requires: + +- references to XMOS and the Customer include their permitted successors and assigns; +- references to statutory provisions include those statutory provisions as amended or re-enacted; and +- references to any gender include all genders. + +Words in the singular include the plural and in the plural include the singular. + +2. License + +XMOS grants the Customer a non-exclusive license to use, develop, modify and distribute the XMOS Software with, or for the purpose of being used with, XMOS Hardware. + +Open Source Software (OSS) must be used and dealt with in accordance with any license terms under which OSS is distributed. + +3. Consideration + +In consideration of the mutual obligations contained in this License, the parties agree to its terms. + +4. Term + +Subject to clause 12 below, this License shall be perpetual. + +5. Restrictions on Use + +The Customer will adhere to all applicable import and export laws and regulations of the country in which it resides and of the United States and United Kingdom, without limitation. The Customer agrees that it is its responsibility to obtain copies of and to familiarise itself fully with these laws and regulations to avoid violation. + +6. Modifications + +The Customer will own all intellectual property rights in the Licensee Modifications but will undertake to provide XMOS with any fixes made to correct any bugs found in the XMOS Software on a non-exclusive, perpetual and royalty free license basis. + +XMOS will own all intellectual property rights in the XMOS Modifications. +The Customer may only use the Licensee Modifications and XMOS Modifications on, or in relation to, XMOS Hardware. + +7. Support + +Support of the XMOS Software may be provided by XMOS pursuant to a separate support agreement. + +8. Warranty and Disclaimer + +The XMOS Software is provided "AS IS" without a warranty of any kind. XMOS and its licensors' entire liability and Customer's exclusive remedy under this warranty to be determined in XMOS's sole and absolute discretion, will be either (a) the corrections of defects in media or replacement of the media, or (b) the refund of the license fee paid (if any). + +Whilst XMOS gives the Customer the ability to load their own software and applications onto XMOS devices, the security of such software and applications when on the XMOS devices is the Customer's own responsibility and any breach of security shall not be deemed a defect or failure of the hardware. XMOS shall have no liability whatsoever in relation to any costs, damages or other losses Customer may incur as a result of any breaches of security in relation to your software or applications. + +XMOS AND ITS LICENSORS DISCLAIM ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY/ SATISFACTORY QUALITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT EXCEPT TO THE EXTENT THAT THESE DISCLAIMERS ARE HELD TO BE LEGALLY INVALID UNDER APPLICABLE LAW. + +9. High Risk Activities + +The XMOS Software is not designed or intended for use in conjunction with on-line control equipment in hazardous environments requiring fail-safe performance, including without limitation the operation of nuclear facilities, aircraft navigation or communication systems, air traffic control, life support machines, or weapons systems (collectively "High Risk Activities") in which the failure of the XMOS Software could lead directly to death, personal injury, or severe physical or environmental damage. XMOS and its licensors specifically disclaim any express or implied warranties relating to use of the XMOS Software in connection with High Risk Activities. + +10. Liability + +TO THE EXTENT NOT PROHIBITED BY APPLICABLE LAW, NEITHER XMOS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY LOST REVENUE, BUSINESS, PROFIT, CONTRACTS OR DATA, ADMINISTRATIVE OR OVERHEAD EXPENSES, OR FOR SPECIAL, INDIRECT, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE DAMAGES HOWEVER CAUSED AND REGARDLESS OF THEORY OF LIABILITY ARISING OUT OF THIS LICENSE, EVEN IF XMOS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. In no event shall XMOS's liability to the Customer whether in contract, tort (including negligence), or otherwise exceed the License Fee. + +Customer agrees to indemnify, hold harmless, and defend XMOS and its licensors from and against any claims or lawsuits, including attorneys' fees and any other liabilities, demands, proceedings, damages, losses, costs, expenses fines and charges which are made or brought against or incurred by XMOS as a result of your use or distribution of the Licensee Modifications or your use or distribution of XMOS Software, or any development of it, other than in accordance with the terms of this License. + +11. Ownership + +The copyrights and all other intellectual and industrial property rights for the protection of information with respect to the XMOS Software (including the methods and techniques on which they are based) are retained by XMOS and/or its licensors. Nothing in this Agreement serves to transfer such rights. Customer may not sell, mortgage, underlet, sublease, sublicense, lend or transfer possession of the XMOS Software in any way whatsoever to any third party who is not bound by this Agreement. + +12. Termination + +Either party may terminate this License at any time on written notice to the other if the other: + +- is in material or persistent breach of any of the terms of this License and either that breach is incapable of remedy, or the other party fails to remedy that breach within 30 days after receiving written notice requiring it to remedy that breach; or + +- is unable to pay its debts (within the meaning of section 123 of the Insolvency Act 1986), or becomes insolvent, or is subject to an order or a resolution for its liquidation, administration, winding-up or dissolution (otherwise than for the purposes of a solvent amalgamation or reconstruction), or has an administrative or other receiver, manager, trustee, liquidator, administrator or similar officer appointed over all or any substantial part of its assets, or enters into or proposes any composition or arrangement with its creditors generally, or is subject to any analogous event or proceeding in any applicable jurisdiction. + +Termination by either party in accordance with the rights contained in clause 12 shall be without prejudice to any other rights or remedies of that party accrued prior to termination. + +On termination for any reason: + +- all rights granted to the Customer under this License shall cease; +- the Customer shall cease all activities authorised by this License; +- the Customer shall immediately pay any sums due to XMOS under this License; and +- the Customer shall immediately destroy or return to the XMOS (at the XMOS's option) all copies of the XMOS Software then in its possession, custody or control and, in the case of destruction, certify to XMOS that it has done so. + +Clauses 5, 8, 9, 10 and 11 shall survive any effective termination of this Agreement. + +13. Third party rights + +No term of this License is intended to confer a benefit on, or to be enforceable by, any person who is not a party to this license. + +14. Confidentiality and publicity + +Each party shall, during the term of this License and thereafter, keep confidential all, and shall not use for its own purposes nor without the prior written consent of the other disclose to any third party any, information of a confidential nature (including, without limitation, trade secrets and information of commercial value) which may become known to such party from the other party and which relates to the other party, unless such information is public knowledge or already known to such party at the time of disclosure, or subsequently becomes public knowledge other than by breach of this license, or subsequently comes lawfully into the possession of such party from a third party. + +The terms of this license are confidential and may not be disclosed by the Customer without the prior written consent of XMOS. +The provisions of clause 14 shall remain in full force and effect notwithstanding termination of this license for any reason. + +15. Entire agreement + +This License and the documents annexed as appendices to this License or otherwise referred to herein contain the whole agreement between the parties relating to the subject matter hereof and supersede all prior agreements, arrangements and understandings between the parties relating to that subject matter. + +16. Assignment + +The Customer shall not assign this License or any of the rights granted under it without XMOS's prior written consent. + +17. Governing law and jurisdiction + +This License shall be governed by and construed in accordance with English law and each party hereby submits to the non-exclusive jurisdiction of the English courts. + +This License has been entered into on the date stated at the beginning of it. + +Schedule +XMOS UART library software diff --git a/lib_uart/examples/uart_streaming_demo/Makefile b/lib_uart/examples/uart_streaming_demo/Makefile new file mode 100644 index 0000000..74bab7a --- /dev/null +++ b/lib_uart/examples/uart_streaming_demo/Makefile @@ -0,0 +1,32 @@ +# The TARGET variable determines what target system the application is +# compiled for. It either refers to an XN file in the source directories +# or a valid argument for the --target option when compiling. + +TARGET = SLICEKIT-L16 + +# The APP_NAME variable determines the name of the final .xe file. It should +# not include the .xe postfix. If left blank the name will default to +# the project name + +APP_NAME = + +# The flags passed to xcc when building the application +# You can also set the following to override flags for a particular language: +# +# XCC_XC_FLAGS, XCC_C_FLAGS, XCC_ASM_FLAGS, XCC_CPP_FLAGS +# +# If the variable XCC_MAP_FLAGS is set it overrides the flags passed to +# xcc for the final link (mapping) stage. + +XCC_FLAGS = -O2 -g -save-temps + +# The USED_MODULES variable lists other module used by the application. + +USED_MODULES = lib_uart + +#============================================================================= +# The following part of the Makefile includes the common build infrastructure +# for compiling XMOS applications. You should not need to edit below here. + +XMOS_MAKE_PATH ?= ../.. +include $(XMOS_MAKE_PATH)/xcommon/module_xcommon/build/Makefile.common diff --git a/lib_uart/examples/uart_streaming_demo/src/main.xc b/lib_uart/examples/uart_streaming_demo/src/main.xc new file mode 100644 index 0000000..941d3e6 --- /dev/null +++ b/lib_uart/examples/uart_streaming_demo/src/main.xc @@ -0,0 +1,46 @@ +// Copyright (c) 2015-2016, XMOS Ltd, All rights reserved +#include +#include +#include +#include +#include + +// Port declarations +in port p_uart_rx = on tile[0] : XS1_PORT_1A; +out port p_uart_tx = on tile[0] : XS1_PORT_1B; + +/* This function performs the main "application" that outputs and reads + some bytes over UART */ +void app(streaming chanend c_tx, streaming chanend c_rx) +{ + uint8_t byte; + printstrln("Test started"); + byte = 0; + for (size_t i = 0; i < 20; i++) { + printstr("Echo 10 bytes... "); + for(size_t j = 0; j < 10; j++) { + uart_tx_streaming_write_byte(c_tx, byte); + byte = byte + 1; + } + for(size_t j = 0; j < 10; j++) { + uart_rx_streaming_read_byte(c_rx, byte); + printhex(byte); + } + } + printstrln(". Done."); +} + + +#define TICKS_PER_BIT 20 + +/* "main" function that sets up two uarts and the application */ +int main() { + streaming chan c_rx; + streaming chan c_tx; + par { + on tile[0]: uart_tx_streaming(p_uart_tx, c_tx, TICKS_PER_BIT); + on tile[0]: uart_rx_streaming(p_uart_rx, c_rx, TICKS_PER_BIT); + on tile[0]: app(c_tx, c_rx); + } + return 0; +} diff --git a/lib_uart/lib_uart/.cproject b/lib_uart/lib_uart/.cproject new file mode 100644 index 0000000..5ed09bc --- /dev/null +++ b/lib_uart/lib_uart/.cproject @@ -0,0 +1,1040 @@ + + + + + + + + + + + + + + + + xmake + -f .makefile + all + true + true + true + + + xmake + -f .makefile + clean + true + true + true + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lib_uart/lib_uart/.makefile b/lib_uart/lib_uart/.makefile new file mode 100644 index 0000000..87b347b --- /dev/null +++ b/lib_uart/lib_uart/.makefile @@ -0,0 +1,8 @@ +all: + @echo "** Module only - only builds as part of application **" + + +clean: + @echo "** Module only - only builds as part of application **" + + diff --git a/lib_uart/lib_uart/.project b/lib_uart/lib_uart/.project new file mode 100644 index 0000000..6ba76c8 --- /dev/null +++ b/lib_uart/lib_uart/.project @@ -0,0 +1,100 @@ + + + lib_uart + + + + + + com.xmos.cdt.core.LegacyProjectCheckerBuilder + + + + + com.xmos.cdt.core.ModulePathBuilder + + + + + com.xmos.cdt.core.ProjectCheckerBuilder + + + + + com.xmos.cdt.core.BuildMarkersBuilder + + + + + com.xmos.cdt.core.ProjectInfoSyncBuilder + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?children? + ?children?=?name?=entry\\\\\\\|\\\|\|?name?=outputEntries\|| + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.buildArguments + -f .makefile + + + org.eclipse.cdt.make.core.buildCommand + xmake + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + com.xmos.cdt.core.XdeProjectNature + + diff --git a/lib_uart/lib_uart/LICENSE.txt b/lib_uart/lib_uart/LICENSE.txt new file mode 100644 index 0000000..dcc68d8 --- /dev/null +++ b/lib_uart/lib_uart/LICENSE.txt @@ -0,0 +1,135 @@ +Software Release License Agreement + +Copyright (c) 2014-2018, XMOS, All rights reserved. + +BY ACCESSING, USING, INSTALLING OR DOWNLOADING THE XMOS SOFTWARE, YOU AGREE TO BE BOUND BY THE FOLLOWING TERMS. IF YOU DO NOT AGREE TO THESE, DO NOT ATTEMPT TO DOWNLOAD, ACCESS OR USE THE XMOS Software. + +Parties: + +(1) XMOS Limited, incorporated and registered in England and Wales with company number 5494985 whose registered office is 107 Cheapside, London, EC2V 6DN (XMOS). + +(2) An individual or legal entity exercising permissions granted by this License (Customer). + +If you are entering into this Agreement on behalf of another legal entity such as a company, partnership, university, college etc. (for example, as an employee, student or consultant), you warrant that you have authority to bind that entity. + +1. Definitions + +"License" means this Software License and any schedules or annexes to it. + +"License Fee" means the fee for the XMOS Software as detailed in any schedules or annexes to this Software License + +"Licensee Modifications" means all developments and modifications of the XMOS Software developed independently by the Customer. + +"XMOS Modifications" means all developments and modifications of the XMOS Software developed or co-developed by XMOS. + +"XMOS Hardware" means any XMOS hardware devices supplied by XMOS from time to time and/or the particular XMOS devices detailed in any schedules or annexes to this Software License. + +"XMOS Software" comprises the XMOS owned circuit designs, schematics, source code, object code, reference designs, (including related programmer comments and documentation, if any), error corrections, improvements, modifications (including XMOS Modifications) and updates. + +The headings in this License do not affect its interpretation. Save where the context otherwise requires, references to clauses and schedules are to clauses and schedules of this License. + +Unless the context otherwise requires: + +- references to XMOS and the Customer include their permitted successors and assigns; +- references to statutory provisions include those statutory provisions as amended or re-enacted; and +- references to any gender include all genders. + +Words in the singular include the plural and in the plural include the singular. + +2. License + +XMOS grants the Customer a non-exclusive license to use, develop, modify and distribute the XMOS Software with, or for the purpose of being used with, XMOS Hardware. + +Open Source Software (OSS) must be used and dealt with in accordance with any license terms under which OSS is distributed. + +3. Consideration + +In consideration of the mutual obligations contained in this License, the parties agree to its terms. + +4. Term + +Subject to clause 12 below, this License shall be perpetual. + +5. Restrictions on Use + +The Customer will adhere to all applicable import and export laws and regulations of the country in which it resides and of the United States and United Kingdom, without limitation. The Customer agrees that it is its responsibility to obtain copies of and to familiarise itself fully with these laws and regulations to avoid violation. + +6. Modifications + +The Customer will own all intellectual property rights in the Licensee Modifications but will undertake to provide XMOS with any fixes made to correct any bugs found in the XMOS Software on a non-exclusive, perpetual and royalty free license basis. + +XMOS will own all intellectual property rights in the XMOS Modifications. +The Customer may only use the Licensee Modifications and XMOS Modifications on, or in relation to, XMOS Hardware. + +7. Support + +Support of the XMOS Software may be provided by XMOS pursuant to a separate support agreement. + +8. Warranty and Disclaimer + +The XMOS Software is provided "AS IS" without a warranty of any kind. XMOS and its licensors' entire liability and Customer's exclusive remedy under this warranty to be determined in XMOS's sole and absolute discretion, will be either (a) the corrections of defects in media or replacement of the media, or (b) the refund of the license fee paid (if any). + +Whilst XMOS gives the Customer the ability to load their own software and applications onto XMOS devices, the security of such software and applications when on the XMOS devices is the Customer's own responsibility and any breach of security shall not be deemed a defect or failure of the hardware. XMOS shall have no liability whatsoever in relation to any costs, damages or other losses Customer may incur as a result of any breaches of security in relation to your software or applications. + +XMOS AND ITS LICENSORS DISCLAIM ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY/ SATISFACTORY QUALITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT EXCEPT TO THE EXTENT THAT THESE DISCLAIMERS ARE HELD TO BE LEGALLY INVALID UNDER APPLICABLE LAW. + +9. High Risk Activities + +The XMOS Software is not designed or intended for use in conjunction with on-line control equipment in hazardous environments requiring fail-safe performance, including without limitation the operation of nuclear facilities, aircraft navigation or communication systems, air traffic control, life support machines, or weapons systems (collectively "High Risk Activities") in which the failure of the XMOS Software could lead directly to death, personal injury, or severe physical or environmental damage. XMOS and its licensors specifically disclaim any express or implied warranties relating to use of the XMOS Software in connection with High Risk Activities. + +10. Liability + +TO THE EXTENT NOT PROHIBITED BY APPLICABLE LAW, NEITHER XMOS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY LOST REVENUE, BUSINESS, PROFIT, CONTRACTS OR DATA, ADMINISTRATIVE OR OVERHEAD EXPENSES, OR FOR SPECIAL, INDIRECT, CONSEQUENTIAL, INCIDENTAL OR PUNITIVE DAMAGES HOWEVER CAUSED AND REGARDLESS OF THEORY OF LIABILITY ARISING OUT OF THIS LICENSE, EVEN IF XMOS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 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Entire agreement + +This License and the documents annexed as appendices to this License or otherwise referred to herein contain the whole agreement between the parties relating to the subject matter hereof and supersede all prior agreements, arrangements and understandings between the parties relating to that subject matter. + +16. Assignment + +The Customer shall not assign this License or any of the rights granted under it without XMOS's prior written consent. + +17. Governing law and jurisdiction + +This License shall be governed by and construed in accordance with English law and each party hereby submits to the non-exclusive jurisdiction of the English courts. + +This License has been entered into on the date stated at the beginning of it. + +Schedule +XMOS UART library software diff --git a/lib_uart/lib_uart/api/multi_uart_impl.h b/lib_uart/lib_uart/api/multi_uart_impl.h new file mode 100644 index 0000000..b86f14b --- /dev/null +++ b/lib_uart/lib_uart/api/multi_uart_impl.h @@ -0,0 +1,48 @@ +// Copyright (c) 2014-2016, XMOS Ltd, All rights reserved +#ifndef __MULTI_UART_IMPL_H__ +#define __MULTI_UART_IMPL_H__ + +[[distributable]] +void multi_uart_rx_buffer(server interface multi_uart_rx_if i, + unsigned clock_rate_hz, + unsigned baud, + enum uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits); + +void multi_uart_rx_pins(streaming chanend c, + in buffered port:32 p, + unsigned num_uarts); + +[[distributable]] +void multi_uart_tx_buffer(server interface multi_uart_tx_if i_tx, + unsigned clock_rate_hz, + unsigned baud, + enum uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits); + +void multi_uart_tx_pins(chanend c, out buffered port:8 p, size_t clock_rate); + +#define multi_uart_rx(c, i, p, n, clock_rate, baud, parity, bits, stop_bits) \ + {par { \ + [[distribute]] multi_uart_rx_buffer(i, clock_rate, baud, parity, bits, stop_bits); \ + multi_uart_rx_pins(c, p, n); \ + } \ + } + +#define multi_uart_tx(c, i, p, n, clock_rate, baud, parity, bits, stop_bits) \ + {par { \ + [[distribute]] multi_uart_tx_buffer(i, clock_rate, baud, parity, bits, stop_bits); \ + multi_uart_tx_pins(c, p, clock_rate); \ + } \ + } + +#pragma select handler +inline void multi_uart_data_ready(streaming chanend c_rx, size_t &index) { + char x; + c_rx :> x; + index = x; +} + +#endif // __MULTI_UART_IMPL_H__ diff --git a/lib_uart/lib_uart/api/uart.h b/lib_uart/lib_uart/api/uart.h new file mode 100644 index 0000000..195976d --- /dev/null +++ b/lib_uart/lib_uart/api/uart.h @@ -0,0 +1,597 @@ +// Copyright (c) 2014-2018, XMOS Ltd, All rights reserved + +#ifndef _uart_h_ +#define _uart_h_ +#include +#include +#include +#include + +#ifdef __XC__ + +/** Type representing the parity of a UART */ +typedef enum uart_parity_t { + UART_PARITY_EVEN = 0, ///< Even parity. + UART_PARITY_ODD = 1, ///< Odd parity. + UART_PARITY_NONE ///< No parity. +} uart_parity_t; + +/** UART configuration interface. + * + * This interface enables dynamic reconfiguration of a UART. It is used by + * several UART components to provide a method of configuration. + */ +typedef interface uart_config_if { + /** Set the baud rate of a UART. + */ + void set_baud_rate(unsigned baud_rate); + + /** Set the parity of a UART. + */ + void set_parity(enum uart_parity_t parity); + + /** Set number of stop bits used by a UART. + */ + void set_stop_bits(unsigned stop_bits); + + /** Set number of bits per byte used by a UART (must be in the range [1-8]) + */ + void set_bits_per_byte(unsigned bits_per_byte); +} uart_config_if; + + +/*---------------------- Receiver API ---------------------------*/ + +/** UART RX interface. + * + * This interface provides clients access to buffer uart receive + * functionality. + */ +typedef interface uart_rx_if { + /** Get a byte from the receive buffer. + * + * This function should be called after receiving a data_ready() + * notification. If these is no data in the buffer (for example, this + * function is called before receiving a notification) then the return + * value is undefined. + */ + [[clears_notification]] uint8_t read(void); + + /** Notification that data is in the receive buffer. + * + * This notification function can be selected on by the client and + * will event when the is data in the receive buffer. After this + * notification the client should call the read() function. + */ + [[notification]] slave void data_ready(void); + + /** Returns whether there is data in the buffer. + */ + int has_data(); +} uart_rx_if; + +extends client interface uart_rx_if : { + + /** Get a byte from the receive buffer. + * + * This function will wait until there is data in the receive buffer + * of the uart and then fetch that data. On getting the data, it + * will clear the notification flag on the interface. + */ + inline uint8_t wait_for_data_and_read(client uart_rx_if i) { + if (!i.has_data()) { + select { + case i.data_ready(): + break; + } + } + return i.read(); + } +} + +/** UART RX. + * + * This function runs a uart receiver. + * Bytes received by the this task are buffered. + * When the buffer is full further incoming bytes of data will be dropped. + * The function never returns and will run indefinitely. + * + * \param i_data the interface connection allowing clients to + * receive data + * \param i_config the interface connection allowing clients to + * reconfigure the UART + * \param buffer_size the size of the buffer + * \param baud the initial baud rate + * \param parity the initial parity setting + * \param bits_per_byte the initial number of bits per byte (must be + * in the range [1-8]) + * \param stop_bits the initial number of stop bits + * \param p_rxd the gpio interface to input data on + */ +[[combinable]] +void uart_rx(server interface uart_rx_if i_data, + server interface uart_config_if ?i_config, + const static unsigned buffer_size, + unsigned baud, + enum uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits, + client input_gpio_if p_rxd); + +/** Fast/Streaming UART RX. + * + * This function implements a fast UART. The UART configuration is + * fixed to a single start bit, 8 bits per byte, and a single stop bit. + * On a 62.5 MIPS thread this function should be able to keep up with a 10 + * MBit UART sustained (provided that the streaming channel can keep up + * with it too). + * + * This function does not return. + * + * \param p input port, 1 bit port on which data comes in. + * + * \param c output streaming channel to connect to the application. + * + * \param ticks_per_bit number of clock ticks between bits. + * This number depends on the clock that is + * attached to port p. If it is the + * 100 Mhz reference clock then this value + * should be at least 10. + */ +void uart_rx_streaming(in port p, streaming chanend c, int ticks_per_bit); + +/** Receive a byte from a streaming UART receiver. + * + * This function receives a byte from the fast/streaming UART component. It is + * "select handler" so can be used within a select e.g. + * + \verbatim + uint8_t byte; + size_t index; + select { + case uart_rx_streaming_receive_byte(c, byte): + // use sample and index here... + ... + break; + ... + \endverbatim + * + * The case in this select will fire when the UART component has data ready. + * + * \param c chanend connected to the streaming UART receiver component + * \param data This reference parameter gets set with the incoming + * data + */ +#pragma select handler +void uart_rx_streaming_read_byte(streaming chanend c, uint8_t &data); + +/*---------------------- Transmitter API ---------------------------*/ + +/** UART transmit interface. + * + * This interface provides functions for transmitting data on an + * unbuffered UART. + */ +typedef interface uart_tx_if { + + /** Write a byte to a UART. + * + * This function writes a byte of data to a UART. It will output + * immediately and block until the data is output. + * + * \param data The data to write. + */ + void write(uint8_t data); +} uart_tx_if; + + +/** UART transmitter. + * + * This function implements an unbuffered UART transmitter. + * + * \param i_data interface enabling client to send data + * \param i_config interface enabling client to configure the UART + * \param baud the initial baud rate + * \param parity the initial parity setting + * \param bits_per_byte the initial number of bits per byte (must be in + * the range [1-8]) + * \param stop_bits the initial number of stop bits + * \param p_txd the gpio interface to output data on + + */ +[[distributable]] +void uart_tx(server interface uart_tx_if i_data, + server interface uart_config_if ?i_config, + unsigned baud, + uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits, + client output_gpio_if p_txd); + +/** UART transmit interface (buffered). + * + * This interface contains functions to write to a buffered UART and + * manage the buffering. + * + */ +typedef interface uart_tx_buffered_if { + + /** Write a byte to a UART. + * + * This function writes a byte of data to a UART. It will place the + * data in the output buffer queue to write and then return. If the + * buffer is full then the data is discarded. + * + * \param data The data to write. + * + * \returns Zero if the write was successful. If the buffer was + * full then the function will return 1 and the data is + * discarded. + */ + [[clears_notification]] + int write(uint8_t data); + + /** Ready to transmit notification. + * + * This notification will occur when the UART is ready to transmit (either + * intially or after a write() call when there is space in the buffer). + */ + [[notification]] + slave void ready_to_transmit(void); + + /** Get avaiable buffer size. + * + * This function returns the number of bytes remaining in the buffer that + * can be filled by write() calls. + */ + size_t get_available_buffer_size(void); +} uart_tx_buffered_if; + +/** UART transmitter (buffered). + * + * This function implements a UART transmitter. Data sent to the task will + * be placed in a buffer and sent at the rate of the UART. + * + * \param i_data interface enabling client to send data + * \param i_config interface enabling client to configure the UART + * \param buffer_size the size of the transmit buffer in bytes + * \param baud the initial baud rate + * \param parity the initial parity setting + * \param bits_per_byte the initial number of bits per byte (must be in + * the range [1-8]) + * \param stop_bits the initial number of stop bits + * \param p_txd the gpio interface to output data on + */ +[[combinable]] +void uart_tx_buffered(server interface uart_tx_buffered_if i_data, + server interface uart_config_if ?i_config, + const static unsigned buffer_size, + unsigned baud, + uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits, + client output_gpio_if p_txd); + +/** Fast/Streaming UART TX. + * + * This function implements a fast UART transmitter. + * It needs an unbuffered 1-bit + * port, a streaming channel end, and a number of port-clocks to wait + * between bits. It receives a start bit, 8 bits, and a stop bit, and + * transmits the 8 bits over the streaming channel end as a single token. + * On a 62.5 MIPS thread this function should be able to keep up with a 10 + * MBit UART sustained (provided that the streaming channel can keep up + * with it too). + * + * This function does not return. + * + * \param p input port, 1 bit port on which data comes in. + * + * \param c output streaming channel to connect to the application. + * + * \param ticks_per_bit number of clock ticks between bits. + * This number depends on the clock that is + * attached to port p. If it is the + * 100 Mhz reference clock then this value + * should be at least 10. + */ +void uart_tx_streaming(out port p, streaming chanend c, int ticks_per_bit); + +/** Write a byte to a streaming UART transmitter. + * + * This function writes a + * \param c chanend connected to the streaming UART Tx component + * \param data The data to send. + */ +void uart_tx_streaming_write_byte(streaming chanend c, uint8_t data); + + +/*---------------------- Half Duplex API ---------------------------*/ + +/** Type representing the mode (direction) of a uart. */ +typedef enum uart_half_duplex_mode_t { + UART_RX_MODE, ///< Uart is in receive mode. + UART_TX_MODE ///< Uart is in transmit mode. +} uart_half_duplex_mode_t; + +/** Interface to control the mode of a half-duplex UART */ +typedef interface uart_control_if { + /** Set the mode of the UART. + * + * This function can be used to control whether the UART is in send or + * receive mode. + */ + void set_mode(uart_half_duplex_mode_t mode); +} uart_control_if; + +/** Half duplex UART. + * + * This function implements a UART that can either transmit or receive on + * the same wire. The application explicitly control whether the component + * is in transmit or receive mode. + * + * \param i_tx interface for transmitting data + * \param i_rx interface for receiving data + * \param i_control interface for controlling the direction of the UART + * \param i_config interface for configuring the UART + * \param tx_buf_length the size of the transmit buffer (in bytes) + * \param rx_buf_length the size of the receive buffer (in bytes) + * \param baud baud rate + * \param parity the parity of the UART + * \param bits_per_byte bits per byte (must be in the range [1-8]) + * \param stop_bits The number of stop bits + * \param p_uart the 1-bit port to send/recieve the UART signals. + */ +void uart_half_duplex(server interface uart_tx_buffered_if i_tx, + server interface uart_rx_if i_rx, + server interface uart_control_if i_control, + server interface uart_config_if ?i_config, + const static unsigned tx_buf_length, + const static unsigned rx_buf_length, + unsigned baud, + uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits, + port p_uart); + +/*---------------------- Multi-UART API ---------------------------*/ + +typedef enum multi_uart_read_result_t { + UART_RX_VALID_DATA, ///< Data received is valid. + UART_RX_INVALID_DATA ///< Data received is not valid. +} multi_uart_read_result_t; + +/** Multi-UART receive interface */ +interface multi_uart_rx_if { + + /** Initialize the multi-UART RX component. + * + * \param c The chanend connected to the multi-UART RX task + */ + void init(streaming chanend c); + + /** Read a byte for the next UART with ready data. + * + * This function will read out a byte from the next UART with data available. + * If several UARTS have data available then the data is read out in a + * round-robin fashion. + * + * \param index This index of the UART to read from + * \param data The data byte read + * \returns An enum type that indicates if the data is valid + */ + enum multi_uart_read_result_t read(size_t index, uint8_t &data); + + /** Pause the multi-UART RX component for reconfiguration. + * + * This call will stop the mulit-UART component so that the UARTs can be + * reconfigured. + */ + void pause(void); + + /** Restart the multi-UART RX component after reconfiguration. + * + * This call will restart the multi-UART component. + */ + void restart(void); + + /** Set the baud rate of a UART. + * + * This call will set the baud rate of one of the UARTs. + * The rate must be a divisor of the clock rate of the underlying + * clock used for the component. + * + * \param index The index of the UART to configure + * \param baud_rate The required baud rate + */ + void set_baud_rate(size_t index, unsigned baud_rate); + + /** Set parity of a UART. + * + * This call will set the parity of one of the UARTs. + * The rate must be a divisor of the clock rate of the underlying + * clock used for the component. + * + * \param index The index of the UART to configure. + * \param parity The required parity + */ + void set_parity(size_t index, enum uart_parity_t parity); + + /** Set the number of stop bits of a UART. + * + * This call will set the number of stop bits of one of the UARTs. + * + * \param index The index of the UART + * \param stop_bits The number of stop bits + */ + void set_stop_bits(size_t index, unsigned stop_bits); + + /** Set the number of bit per byte of a UART. + * + * This call will set the number of stop bits of one of the UARTs. + * + * \param index The index of the UART + * \param bits_per_byte The number of bits per byte (must be in the + * range [1-8]) + */ + void set_bits_per_byte(size_t index, unsigned bits_per_byte); +} [[sametile]]; + +typedef interface multi_uart_rx_if multi_uart_rx_if; + +#pragma select handler +inline void multi_uart_data_ready(streaming chanend c_rx, size_t &index); + +/** Multi-UART receiver. + * + * This function implements multiple UART receivers on a multi-bit port. The + * UARTS all have the same baud rate. + * The parity, bits per byte and number of stop bits + * is the same for all UARTs and cannot be changed dynamically. + * + * \param c a chanend used internally for high speed communication + * \param i the interface for getting data from the task + * \param p the multibit port + * \param clk a clock block for the component to use. This needs + * to be set to run of the reference clock (the default + * state for clock blocks) + * \param num_uarts the number of uarts to run (must be less than or + * equal to the width of \p p) + * \param clock_rate_hz the clock rate in Hz + * \param baud baud rate + * \param parity the parity of the UART + * \param bits_per_byte bits per byte (must be in the range [1-8]) + * \param stop_bits number of stop bits + */ +void multi_uart_rx(streaming chanend c, + server interface multi_uart_rx_if i, + in buffered port:32 p, clock clk, + size_t num_uarts, + unsigned clock_rate_hz, + unsigned baud, + enum uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits); + +/** Multi-UART transmit interface */ +interface multi_uart_tx_if { + + /** Initialize the multi-UART TX component. + * + * \param c The chanend connected to the multi-UART TX task + */ + void init(chanend c); + + /** Check whether transmit slot is free. + * + * This function checks whether the application can write data to + * a specific UART. + * + * \param index The index of the UART to check + * \returns non-zero if the slot is free (i.e. data can be sent) + */ + int is_slot_free(size_t index); + + /** Write to a UART. + * + * This function writes a byte of data to a UART. This byte will be buffered + * to send. If the transmit buffer for + * that UART is not available then the data is ignored (use + * is_tx_slot_free() to determine availability). + * + * \param index The index of the UART to write to + * \param data The data to write + */ + void write(size_t index, uint8_t data); + + /** Pause the multi-UART RX component for reconfiguration. + * + * This call will stop the mulit-UART component so that the UARTs can be + * reconfigured. + */ + void pause(void); + + /** Restart the multi-UART RX component after reconfiguration. + * + * This call will restart the multi-UART component. + */ + void restart(void); + + /** Set the baud rate of a UART. + * + * This call will set the baud rate of one of the UARTs. + * The rate must be a divisor of the clock rate of the underlying + * clock used for the component. + * + * \param index The index of the UART to configure. + * \param baud_rate The required baud rate + */ + void set_baud_rate(size_t index, unsigned baud_rate); + + /** Set parity of a UART. + * + * This call will set the parity of one of the UARTs. + * The rate must be a divisor of the clock rate of the underlying + * clock used for the component. + * + * \param index The index of the UART to configure. + * \param parity The required parity + */ + void set_parity(size_t index, enum uart_parity_t parity); + + /** Set the number of stop bits of a UART. + * + * This call will set the number of stop bits of one of the UARTs. + * + * \param index The index of the UART + * \param stop_bits The number of stop bits + */ + void set_stop_bits(size_t index, unsigned stop_bits); + + /** Set the number of bit per byte of a UART. + * + * This call will set the number of stop bits of one of the UARTs. + * + * \param index The index of the UART + * \param bits_per_byte The number of bits per byte (must be in the + * range [1-8]) + */ + void set_bits_per_byte(size_t index, unsigned bits_per_byte); +} [[sametile]]; + +typedef interface multi_uart_tx_if multi_uart_tx_if; + +/** Multi-UART transmitter. + * + * This function implements multiple UART transmiiters on a multi-bit port. The + * UARTS all have the same baud rate. + * The parity, bits per byte and number of stop bits + * is the same for all UARTs and cannot be changed dynamically. + * + * \param c a chanend used internally for high speed communication + * \param i the interface for sending data to the task + * \param p the multibit port + * \param num_uarts the number of uarts to run (must be less than or + * equal to the width of \p p) + * \param clock_rate_hz the clock rate in Hz + * \param baud baud rate + * \param parity the parity of the UART + * \param bits_per_byte bits per byte (must be in the range [1-8]) + * \param stop_bits number of stop bits + */ +void multi_uart_tx(chanend c, + server interface multi_uart_tx_if i, + out port p, + size_t num_uarts, + unsigned clock_rate_hz, + unsigned baud, + uart_parity_t parity, + unsigned bits_per_byte, + unsigned stop_bits); + + +#include "multi_uart_impl.h" + +#endif // __XC__ + +#endif /* _uart_h_ */ diff --git a/lib_uart/lib_uart/api/uart_half_duplex.h b/lib_uart/lib_uart/api/uart_half_duplex.h new file mode 100644 index 0000000..dedb24f --- /dev/null +++ b/lib_uart/lib_uart/api/uart_half_duplex.h @@ -0,0 +1,22 @@ +// Copyright (c) 2015-2016, XMOS Ltd, All rights reserved +#ifndef __uart_half_duplex_h__ +#define __uart_half_duplex_h__ + +enum uart_tx_state { + WAITING_FOR_DATA, + OUTPUTTING_DATA_BIT, + OUTPUTTING_PARITY_BIT, + OUTPUTTING_STOP_BIT, + TX_INACTIVE +}; +enum uart_rx_state { + WAITING_FOR_INPUT, + WAITING_FOR_HIGH, + TESTING_START_BIT, + INPUTTING_DATA_BIT, + INPUTTING_PARITY_BIT, + INPUTTING_STOP_BIT, + RX_INACTIVE +}; + +#endif // __uart_half_duplex_h__ diff --git a/lib_uart/lib_uart/doc/rst/images/Makefile b/lib_uart/lib_uart/doc/rst/images/Makefile new file mode 100644 index 0000000..4b45cfb --- /dev/null +++ b/lib_uart/lib_uart/doc/rst/images/Makefile @@ -0,0 +1,22 @@ +ODGS = $(wildcard *.odg) +PDFS = $(ODGS:.odg=.pdf) + +all: $(PDFS) + @echo PDFs created + +_uncropped: + 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