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60
lib_sw_pll/examples/shared/src/clock_gen.c
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60
lib_sw_pll/examples/shared/src/clock_gen.c
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// Copyright 2023 XMOS LIMITED.
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// This Software is subject to the terms of the XMOS Public Licence: Version 1.
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#include <xs1.h>
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#include <stdio.h>
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#include <xcore/hwtimer.h>
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#include <xcore/port.h>
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#include "sw_pll_common.h"
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#define DO_CLOCKS \
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printf("Ref Hz: %d\n", clock_rate >> 1); \
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\
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unsigned cycle_ticks_int = XS1_TIMER_HZ / clock_rate; \
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unsigned cycle_ticks_remaidner = XS1_TIMER_HZ % clock_rate; \
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unsigned carry = 0; \
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\
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period_trig += XS1_TIMER_HZ * 1; \
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unsigned time_now = hwtimer_get_time(period_tmr); \
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while(TIMER_TIMEAFTER(period_trig, time_now)) \
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{ \
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port_out(p_clock_gen, port_val); \
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hwtimer_wait_until(clock_tmr, time_trig); \
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time_trig += cycle_ticks_int; \
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carry += cycle_ticks_remaidner; \
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if(carry >= clock_rate){ \
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time_trig++; \
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carry -= clock_rate; \
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} \
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port_val ^= 1; \
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time_now = hwtimer_get_time(period_tmr); \
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}
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void clock_gen(unsigned ref_frequency, unsigned ppm_range) // Step from - to + this
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{
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unsigned clock_rate = ref_frequency * 2; // Note double because we generate edges at this rate
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unsigned clock_rate_low = (unsigned)(clock_rate * (1.0 - (float)ppm_range / 1000000.0));
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unsigned clock_rate_high = (unsigned)(clock_rate * (1.0 + (float)ppm_range / 1000000.0));
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unsigned step_size = (clock_rate_high - clock_rate_low) / 20;
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printf("Sweep range: %d %d %d, step size: %d\n", clock_rate_low / 2, clock_rate / 2, clock_rate_high / 2, step_size);
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hwtimer_t period_tmr = hwtimer_alloc();
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unsigned period_trig = hwtimer_get_time(period_tmr);
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hwtimer_t clock_tmr = hwtimer_alloc();
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unsigned time_trig = hwtimer_get_time(clock_tmr);
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port_t p_clock_gen = PORT_I2S_BCLK;
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port_enable(p_clock_gen);
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unsigned port_val = 1;
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for(unsigned clock_rate = clock_rate_low; clock_rate <= clock_rate_high; clock_rate += 2 * step_size){
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DO_CLOCKS
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}
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for(unsigned clock_rate = clock_rate_high; clock_rate > clock_rate_low; clock_rate -= 2 * step_size){
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DO_CLOCKS
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}
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}
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