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enable mic vol

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This commit is contained in:
Steven Dan
2026-01-31 16:18:43 +08:00
parent 33377ff0fb
commit dc33d34137
4 changed files with 193 additions and 331 deletions
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471
sw_usb_audio/app_usb_aud_phaten_golden/src/extensions/audiohw.xc
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@@ -41,6 +41,7 @@ unsigned g_uac_mode = 1; // 2 for UAC2.0, 1 for UAC1.0
unsigned g_uac_mode = 2; // 2 for UAC2.0, 1 for UAC1.0 unsigned g_uac_mode = 2; // 2 for UAC2.0, 1 for UAC1.0
#endif #endif
unsafe client interface i2c_master_if i_i2c_client;
audio_sampling g_new_playback_format, g_playback_format; audio_sampling g_new_playback_format, g_playback_format;
audio_type g_new_audio_type, g_audio_type = 0; audio_type g_new_audio_type, g_audio_type = 0;
unsigned g_mute_enable = 0; unsigned g_mute_enable = 0;
@@ -106,179 +107,11 @@ void board_setup()
debug_printf("board_setup OK."); debug_printf("board_setup OK.");
} }
#if 0
//Tile 0
unsafe client interface i2c_master_if i_i2c_client_t0;
static uint8_t mic_vol = 0x2b;
#define MIN_MIC_VOL_LEVEL 0
#define MAX_MIC_VOL_LEVEL 0x37
//static inline int CODEC_REGWRITE(uint8_t reg, uint8_t val);
i2c_regop_res_t i2c_reg_write_t0(uint8_t device_addr, uint8_t reg, uint8_t data)
{
uint8_t a_data[2] = {reg, data};
size_t n;
unsafe // 改动原因：原实现为void但包含`return 0;`，且未正确回写val（还写反了 data[0] = val），
{ // 这会引入未定义行为/潜在栈破坏，导致调用方（如button_task）在I2C访问后异常卡死。
i_i2c_client_t0.write(device_addr, a_data, 2, n, 1); // 这里改为返回i2c_regop_res_t并正确回填val，调用方可选择检查返回值。
} i2c_regop_res_t CODEC_IC_REGREAD(unsigned reg, unsigned &val)
if (n == 0)
{
return I2C_REGOP_DEVICE_NACK;
}
if (n < 2)
{
return I2C_REGOP_INCOMPLETE;
}
return I2C_REGOP_SUCCESS;
}
static inline int CODEC_REGWRITE_t0(uint8_t reg, uint8_t val)
{
i2c_regop_res_t ret;
ret = i2c_reg_write_t0(AIC3204_I2C_DEVICE_ADDR, reg, val);
//ret = rtos_i2c_master_reg_write(i2c_master_ctx, AIC3204_I2C_DEVICE_ADDR, reg, val);
if (ret == I2C_REGOP_SUCCESS) {
return 0;
} else {
return -1;
}
}
int i2c_codec_mic_vol_up(void)
{
//delay_milliseconds(20);
if (mic_vol < MAX_MIC_VOL_LEVEL) {
mic_vol++;
if ( (CODEC_REGWRITE_t0(AIC3204_PAGE_CTRL, 1) == 0) && (CODEC_REGWRITE_t0(AIC3204_OP_PWR_CTRL, 0x00) == 0) ) {
return 0;
} else {
return -1;
}
}
return 0;
}
//------------------------------------------------------------------------------------
/* Working around not being able to extend an unsafe interface (Bugzilla #18670)*/
i2c_regop_res_t i2c_reg_write(uint8_t device_addr, uint8_t reg, uint8_t data)
{
uint8_t a_data[2] = {reg, data};
size_t n;
unsafe
{
i_i2c_client.write(device_addr, a_data, 2, n, 1);
}
if (n == 0)
{
return I2C_REGOP_DEVICE_NACK;
}
if (n < 2)
{
return I2C_REGOP_INCOMPLETE;
}
return I2C_REGOP_SUCCESS;
}
uint8_t i2c_reg_read(uint8_t device_addr, uint8_t reg, i2c_regop_res_t &result)
{
uint8_t a_reg[1] = {reg};
uint8_t data[1] = {0};
size_t n;
i2c_res_t res;
unsafe
{
res = i_i2c_client.write(device_addr, a_reg, 1, n, 0);
if (n != 1)
{
result = I2C_REGOP_DEVICE_NACK;
i_i2c_client.send_stop_bit();
return 0;
}
res = i_i2c_client.read(device_addr, data, 1, 1);
}
if (res == I2C_ACK)
{
result = I2C_REGOP_SUCCESS;
}
else
{
result = I2C_REGOP_DEVICE_NACK;
}
return data[0];
}
unsafe client interface i2c_master_if i_i2c_client;
#if 0
uint8_t CODEC_REGREAD(int regAddr)
{
i2c_regop_res_t result ;
return i2c_reg_read(AIC3204_I2C_DEVICE_ADDR, regAddr, &result);
}
#endif
void CODEC_REGWRITE(int regAddr, int regData)
{
i2c_regop_res_t result = i2c_reg_write(AIC3204_I2C_DEVICE_ADDR, regAddr, regData);
// asert(result == I2C_REGOP_SUCCESS && msg("I2C write reg failed"));
}
/*
* Writes a value to a register in the AIC3204 DAC chip.
*/
static inline int CODEC_REGWRITE(uint8_t reg, uint8_t val)
{
i2c_regop_res_t ret;
ret = i2c_reg_write(AIC3204_I2C_DEVICE_ADDR, reg, val);
//ret = rtos_i2c_master_reg_write(i2c_master_ctx, AIC3204_I2C_DEVICE_ADDR, reg, val);
if (ret == I2C_REGOP_SUCCESS) {
return 0;
} else {
return -1;
}
}
#endif
unsafe chanend uc_audiohw;
typedef enum {
AUDIOHW_CMD_REGWR,
AUDIOHW_CMD_REGRD
} audioHwCmd_t;
static inline void CODEC_REGWRITE(unsigned reg, unsigned val)
{
unsafe {
uc_audiohw <: (unsigned) AUDIOHW_CMD_REGWR;
uc_audiohw <: reg;
uc_audiohw <: val;
}
}
static inline void CODEC_REGREAD(unsigned reg, unsigned val)
{
unsafe {
uc_audiohw <: (unsigned) AUDIOHW_CMD_REGRD;
uc_audiohw <: reg;
uc_audiohw :> val;
}
}
static inline void CODEC_IC_REGREAD(unsigned reg, unsigned &val, client interface i2c_master_if i2c)
{ {
i2c_regop_res_t result; i2c_regop_res_t result;
@@ -289,18 +122,19 @@ static inline void CODEC_IC_REGREAD(unsigned reg, unsigned &val, client interfac
unsafe unsafe
{ {
res = i2c.write(CODEC_I2C_DEVICE_ADDR, a_reg, 1, n, 0); res = i_i2c_client.write(CODEC_I2C_DEVICE_ADDR, a_reg, 1, n, 0);
if (n != 1) if (n != 1)
{ {
result = I2C_REGOP_DEVICE_NACK; result = I2C_REGOP_DEVICE_NACK; // 改动原因：写寄存器地址阶段未成功（无ACK/不完整）
i2c.send_stop_bit(); i_i2c_client.send_stop_bit();
return 0; return result;
} }
res = i2c.read(CODEC_I2C_DEVICE_ADDR, data, 1, 1); res = i_i2c_client.read(CODEC_I2C_DEVICE_ADDR, data, 1, 1);
} }
data[0] = val; // 改动原因：修复方向错误，应将读到的data[0]写回到val。
val = data[0];
debug_printf("CODEC_IC_REGREAD reg: %d, val: %d\n", reg, data[0]); debug_printf("CODEC_IC_REGREAD reg: %d, val: %d\n", reg, data[0]);
if (res == I2C_ACK) if (res == I2C_ACK)
@@ -311,33 +145,38 @@ static inline void CODEC_IC_REGREAD(unsigned reg, unsigned &val, client interfac
{ {
result = I2C_REGOP_DEVICE_NACK; result = I2C_REGOP_DEVICE_NACK;
} }
// return data[0]; return result;
} }
static inline void CODEC_IC_REGWRITE(unsigned reg, unsigned val, client interface i2c_master_if i2c) // 改动原因：原实现为void但返回了I2C_REGOP_*值，属于未定义行为，可能破坏返回地址/栈，导致button_task在mic按键后卡死。
// 这里将返回类型改为i2c_regop_res_t，语义与实现一致。
i2c_regop_res_t CODEC_IC_REGWRITE(unsigned reg, unsigned val)
{ {
uint8_t a_data[2] = {reg, val}; uint8_t a_data[2] = {reg, val};
size_t n; size_t n;
unsafe unsafe
{ {
i2c.write(CODEC_I2C_DEVICE_ADDR, a_data, 2, n, 1); debug_printf("CODEC_IC_REGWRITE reg: %d, val: %d\n", reg, val);
i_i2c_client.write(CODEC_I2C_DEVICE_ADDR, a_data, 2, n, 1);
} }
if (n == 0) if (n == 0)
{ {
debug_printf("CODEC_IC_REGWRITE n: %d\n", n);
return I2C_REGOP_DEVICE_NACK; return I2C_REGOP_DEVICE_NACK;
} }
if (n < 2) if (n < 2)
{ {
debug_printf("CODEC_IC_REGWRITE n: %d\n", n);
return I2C_REGOP_INCOMPLETE; return I2C_REGOP_INCOMPLETE;
} }
debug_printf("CODEC_IC_REGWRITE reg: %d, val: %d\n", reg, val); debug_printf("CODEC_IC_REGWRITE === reg: %d, val: %d\n", reg, val);
return I2C_REGOP_SUCCESS; return I2C_REGOP_SUCCESS;
} }
// tile 1 // tile 1
static uint8_t mic_vol = 40; //84; // default +42dB as 20250408 //56; //0x2b; uint8_t mic_vol = 60; //84; // default +42dB as 20250408 //56; //0x2b;
#define MIN_MIC_VOL_LEVEL 0 #define MIN_MIC_VOL_LEVEL 0
#define MAX_MIC_VOL_LEVEL 84 // max +42dB as 20250408 //0x37 #define MAX_MIC_VOL_LEVEL 84 // max +42dB as 20250408 //0x37
#define MIC_VOL_STEP 4 #define MIC_VOL_STEP 4
@@ -351,8 +190,8 @@ int i2c_codec_mic_vol_up(void)
if (mic_vol > MAX_MIC_VOL_LEVEL) { if (mic_vol > MAX_MIC_VOL_LEVEL) {
mic_vol = MAX_MIC_VOL_LEVEL; mic_vol = MAX_MIC_VOL_LEVEL;
} }
CODEC_REGWRITE(AIC3204_PAGE_CTRL, 1); CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 1);
CODEC_REGWRITE(0x3c, mic_vol); CODEC_IC_REGWRITE(0x3c, mic_vol);
} }
debug_printf("vol %d\n", mic_vol); debug_printf("vol %d\n", mic_vol);
delay_milliseconds(10); delay_milliseconds(10);
@@ -369,8 +208,8 @@ int i2c_codec_mic_vol_down(void)
// } else { // } else {
mic_vol=mic_vol-MIC_VOL_STEP; mic_vol=mic_vol-MIC_VOL_STEP;
// } // }
CODEC_REGWRITE(AIC3204_PAGE_CTRL, 1); CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 1);
CODEC_REGWRITE(0x3c, mic_vol); CODEC_IC_REGWRITE(0x3c, mic_vol);
} }
debug_printf("vol %d\n", mic_vol); debug_printf("vol %d\n", mic_vol);
delay_milliseconds(10); delay_milliseconds(10);
@@ -381,142 +220,140 @@ int i2c_codec_mic_vol_down(void)
extern void button_task(chanend c_hidSendData, chanend cc_mic_level, chanend c_uac_vol); extern void button_task(chanend c_hidSendData, chanend cc_mic_level, chanend c_uac_vol);
void codec_init(void)
{
unsigned page_ctrl;
{
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0x00);
// Initiate SW reset (PLL is powered off as part of reset)
CODEC_IC_REGWRITE(AIC3204_SW_RST, 0x01);
delay_milliseconds(10);
// Program clock settings
// Default is CODEC_CLKIN is from MCLK pin. Don't need to change this.
// Power up NDAC and set to 1
CODEC_IC_REGWRITE(AIC3204_NDAC, 0x81);
CODEC_IC_REGREAD(AIC3204_NDAC, page_ctrl);
debug_printf("page_ctrl: %d\n", page_ctrl);
// Power up MDAC and set to 4
CODEC_IC_REGWRITE(AIC3204_MDAC, 0x84);
// Power up NADC and set to 1
CODEC_IC_REGWRITE(AIC3204_NADC, 0x81);
// Power up MADC and set to 4
CODEC_IC_REGWRITE(AIC3204_MADC, 0x84);
// Program DOSR = 128
CODEC_IC_REGWRITE(AIC3204_DOSR_LSB, 0x80);
// Program AOSR = 128
CODEC_IC_REGWRITE(AIC3204_AOSR, 0x80);
// Set Audio Interface Config: I2S, 24 bits, slave mode, DOUT always driving.
CODEC_IC_REGWRITE(AIC3204_CODEC_IF, 0x20);
// Program the DAC processing block to be used - PRB_P1
CODEC_IC_REGWRITE(AIC3204_DAC_SIG_PROC, 0x01);
// Program the ADC processing block to be used - PRB_R1
CODEC_IC_REGWRITE(AIC3204_ADC_SIG_PROC, 0x01); // 3D-------------------------
// Select Page 1
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0x01);
// Enable the internal AVDD_LDO:
CODEC_IC_REGWRITE(AIC3204_LDO_CTRL, 0x09);
//
// Program Analog Blocks
// ---------------------
//
// Disable Internal Crude AVdd in presence of external AVdd supply or before powering up internal AVdd LDO
CODEC_IC_REGWRITE(AIC3204_PWR_CFG, 0x08);
// Enable Master Analog Power Control
CODEC_IC_REGWRITE(AIC3204_LDO_CTRL, 0x01);
// Set Common Mode voltages: Full Chip CM to 0.9V and Output Common Mode for Headphone to 1.65V and HP powered from LDOin @ 3.3V.
CODEC_IC_REGWRITE(AIC3204_CM_CTRL, 0x33);
// Set PowerTune Modes
// Set the Left & Right DAC PowerTune mode to PTM_P3/4. Use Class-AB driver.
CODEC_IC_REGWRITE(AIC3204_PLAY_CFG1, 0x00);
CODEC_IC_REGWRITE(AIC3204_PLAY_CFG2, 0x00);
// Set ADC PowerTune mode PTM_R4.
CODEC_IC_REGWRITE(AIC3204_ADC_PTM, 0x00);
// Set MicPGA startup delay to 3.1ms
CODEC_IC_REGWRITE(AIC3204_AN_IN_CHRG, 0x31);
// Set the REF charging time to 40ms
CODEC_IC_REGWRITE(AIC3204_REF_STARTUP, 0x01);
// HP soft stepping settings for optimal pop performance at power up
// Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling
// capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound.
CODEC_IC_REGWRITE(AIC3204_HP_START, 0x25);
// Route Left DAC to HPL
CODEC_IC_REGWRITE(AIC3204_HPL_ROUTE, 0x08);
// Route Right DAC to HPR
CODEC_IC_REGWRITE(AIC3204_HPR_ROUTE, 0x08);
CODEC_IC_REGWRITE(0x0e, 0x08);
CODEC_IC_REGWRITE(0x0f, 0x08);
CODEC_IC_REGWRITE(0x12, 0x3a);
CODEC_IC_REGWRITE(0x13, 0x3a); // Gain-0DB
// We are using Line input with low gain for PGA so can use 40k input R but lets stick to 20k for now.
// Route IN2_L to LEFT_P with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_LPGA_P_ROUTE, 0x20); //---
// Route IN2_R to LEFT_M with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_LPGA_N_ROUTE, 0x20); //---
// Route IN1_R to RIGHT_P with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_RPGA_P_ROUTE, 0x80); //---
// Route IN1_L to RIGHT_M with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_RPGA_N_ROUTE, 0x20); //---
// Unmute HPL and set gain to 0dB
CODEC_IC_REGWRITE(AIC3204_HPL_GAIN, 0x06);
// Unmute HPR and set gain to 0dB
CODEC_IC_REGWRITE(AIC3204_HPR_GAIN, 0x06);
// Unmute Left MICPGA, Set Gain to 0dB.
CODEC_IC_REGWRITE(AIC3204_LPGA_VOL, 0x00);
// Unmute Right MICPGA, Set Gain to 0dB.
CODEC_IC_REGWRITE(AIC3204_RPGA_VOL, 0x00);
// Power up HPL and HPR drivers
CODEC_IC_REGWRITE(AIC3204_OP_PWR_CTRL, 0x30); // HP powerUp
// CODEC_REGWRITE(AIC3204_OP_PWR_CTRL, 0x0C); // LO powerUP
// Wait for 2.5 sec for soft stepping to take effect
// vTaskDelay(pdMS_TO_TICKS(2500));
delay_milliseconds(20);
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0x00);
// Power up the Left and Right DAC Channels. Route Left data to Left DAC and Right data to Right DAC.
// DAC Vol control soft step 1 step per DAC word clock.
CODEC_IC_REGWRITE(AIC3204_DAC_CH_SET1, 0xd4);
// Power up Left and Right ADC Channels, ADC vol ctrl soft step 1 step per ADC word clock.
CODEC_IC_REGWRITE(AIC3204_ADC_CH_SET, 0xc0);
// Unmute Left and Right DAC digital volume control
CODEC_IC_REGWRITE(AIC3204_DAC_CH_SET2, 0x00);
// Unmute Left and Right ADC Digital Volume Control.
CODEC_IC_REGWRITE(AIC3204_ADC_FGA_MUTE, 0x00);
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 1); // page1
CODEC_IC_REGWRITE(0x47, 0x32); // analog input quick charging configure
CODEC_IC_REGWRITE(0x7b, 0x01); // power up config
CODEC_IC_REGWRITE(0x33, 0x60); //---------0x78 used fail-------jian added ----MICBIAS
CODEC_IC_REGWRITE(0x37, 0x80);
CODEC_IC_REGWRITE(0x39, 0x20); // IN1L to RIGHT MICPGA with 20k ohm
CODEC_IC_REGWRITE(0x3c, mic_vol /*40*/); // Right MICPGA VOL --5a-45DB 5e--47db :3d--ap实际测试25DB增益---跟客户样品一致 （一般30DB）
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0); // page0
CODEC_IC_REGWRITE(0x51, 0xc0); //
CODEC_IC_REGWRITE(0x52, 0x00); //
//CODEC_IC_REGWRITE(AIC3204_ADC_CH1_SET, 0x0C); // ADC L_CH vol
//CODEC_IC_REGWRITE(AIC3204_ADC_CH2_SET, 0x0C); // ADC R_CH vol
}
}
void AudioHwRemote(chanend c_hidSendData, chanend cc_mic_level, chanend c_uac_vol) void AudioHwRemote(chanend c_hidSendData, chanend cc_mic_level, chanend c_uac_vol)
{ {
i2c_master_if i2c[1]; i2c_master_if i2c[1];
unsigned page_ctrl;
board_setup(); board_setup();
delay_milliseconds(200);
par { par {
i2c_master(i2c, 1, p_scl, p_sda, 100); i2c_master(i2c, 1, p_scl, p_sda, 300);
{ {
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0x00, i2c[0]); unsafe {i_i2c_client = i2c[0];}
button_task(c_hidSendData, cc_mic_level, c_uac_vol);
// Initiate SW reset (PLL is powered off as part of reset)
CODEC_IC_REGWRITE(AIC3204_SW_RST, 0x01, i2c[0]);
delay_milliseconds(10);
// Program clock settings
// Default is CODEC_CLKIN is from MCLK pin. Don't need to change this.
// Power up NDAC and set to 1
CODEC_IC_REGWRITE(AIC3204_NDAC, 0x81, i2c[0]);
CODEC_IC_REGREAD(AIC3204_NDAC, page_ctrl, i2c[0]);
debug_printf("page_ctrl: %d\n", page_ctrl);
// Power up MDAC and set to 4
CODEC_IC_REGWRITE(AIC3204_MDAC, 0x84, i2c[0]);
// Power up NADC and set to 1
CODEC_IC_REGWRITE(AIC3204_NADC, 0x81, i2c[0]);
// Power up MADC and set to 4
CODEC_IC_REGWRITE(AIC3204_MADC, 0x84, i2c[0]);
// Program DOSR = 128
CODEC_IC_REGWRITE(AIC3204_DOSR_LSB, 0x80, i2c[0]);
// Program AOSR = 128
CODEC_IC_REGWRITE(AIC3204_AOSR, 0x80, i2c[0]);
// Set Audio Interface Config: I2S, 24 bits, slave mode, DOUT always driving.
CODEC_IC_REGWRITE(AIC3204_CODEC_IF, 0x20, i2c[0]);
// Program the DAC processing block to be used - PRB_P1
CODEC_IC_REGWRITE(AIC3204_DAC_SIG_PROC, 0x01, i2c[0]);
// Program the ADC processing block to be used - PRB_R1
CODEC_IC_REGWRITE(AIC3204_ADC_SIG_PROC, 0x01, i2c[0]); // 3D-------------------------
// Select Page 1
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0x01, i2c[0]);
// Enable the internal AVDD_LDO:
CODEC_IC_REGWRITE(AIC3204_LDO_CTRL, 0x09, i2c[0]);
//
// Program Analog Blocks
// ---------------------
//
// Disable Internal Crude AVdd in presence of external AVdd supply or before powering up internal AVdd LDO
CODEC_IC_REGWRITE(AIC3204_PWR_CFG, 0x08, i2c[0]);
// Enable Master Analog Power Control
CODEC_IC_REGWRITE(AIC3204_LDO_CTRL, 0x01, i2c[0]);
// Set Common Mode voltages: Full Chip CM to 0.9V and Output Common Mode for Headphone to 1.65V and HP powered from LDOin @ 3.3V.
CODEC_IC_REGWRITE(AIC3204_CM_CTRL, 0x33, i2c[0]);
// Set PowerTune Modes
// Set the Left & Right DAC PowerTune mode to PTM_P3/4. Use Class-AB driver.
CODEC_IC_REGWRITE(AIC3204_PLAY_CFG1, 0x00, i2c[0]);
CODEC_IC_REGWRITE(AIC3204_PLAY_CFG2, 0x00, i2c[0]);
// Set ADC PowerTune mode PTM_R4.
CODEC_IC_REGWRITE(AIC3204_ADC_PTM, 0x00, i2c[0]);
// Set MicPGA startup delay to 3.1ms
CODEC_IC_REGWRITE(AIC3204_AN_IN_CHRG, 0x31, i2c[0]);
// Set the REF charging time to 40ms
CODEC_IC_REGWRITE(AIC3204_REF_STARTUP, 0x01, i2c[0]);
// HP soft stepping settings for optimal pop performance at power up
// Rpop used is 6k with N = 6 and soft step = 20usec. This should work with 47uF coupling
// capacitor. Can try N=5,6 or 7 time constants as well. Trade-off delay vs “pop” sound.
CODEC_IC_REGWRITE(AIC3204_HP_START, 0x25, i2c[0]);
// Route Left DAC to HPL
CODEC_IC_REGWRITE(AIC3204_HPL_ROUTE, 0x08, i2c[0]);
// Route Right DAC to HPR
CODEC_IC_REGWRITE(AIC3204_HPR_ROUTE, 0x08, i2c[0]);
CODEC_IC_REGWRITE(0x0e, 0x08, i2c[0]);
CODEC_IC_REGWRITE(0x0f, 0x08, i2c[0]);
CODEC_IC_REGWRITE(0x12, 0x3a, i2c[0]);
CODEC_IC_REGWRITE(0x13, 0x3a, i2c[0]); //Gain-0DB
// We are using Line input with low gain for PGA so can use 40k input R but lets stick to 20k for now.
// Route IN2_L to LEFT_P with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_LPGA_P_ROUTE, 0x20, i2c[0]); //---
// Route IN2_R to LEFT_M with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_LPGA_N_ROUTE, 0x20, i2c[0]); //---
// Route IN1_R to RIGHT_P with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_RPGA_P_ROUTE, 0x80, i2c[0]); //---
// Route IN1_L to RIGHT_M with 20K input impedance
CODEC_IC_REGWRITE(AIC3204_RPGA_N_ROUTE, 0x20, i2c[0]); //---
// Unmute HPL and set gain to 0dB
CODEC_IC_REGWRITE(AIC3204_HPL_GAIN, 0x06, i2c[0]);
// Unmute HPR and set gain to 0dB
CODEC_IC_REGWRITE(AIC3204_HPR_GAIN, 0x06, i2c[0]);
// Unmute Left MICPGA, Set Gain to 0dB.
CODEC_IC_REGWRITE(AIC3204_LPGA_VOL, 0x00, i2c[0]);
// Unmute Right MICPGA, Set Gain to 0dB.
CODEC_IC_REGWRITE(AIC3204_RPGA_VOL, 0x00, i2c[0]);
// Power up HPL and HPR drivers
CODEC_IC_REGWRITE(AIC3204_OP_PWR_CTRL, 0x30, i2c[0]); // HP powerUp
//CODEC_REGWRITE(AIC3204_OP_PWR_CTRL, 0x0C); // LO powerUP
// Wait for 2.5 sec for soft stepping to take effect
//vTaskDelay(pdMS_TO_TICKS(2500));
delay_milliseconds(20);
CODEC_IC_REGWRITE(AIC3204_PAGE_CTRL, 0x00, i2c[0]);
// Power up the Left and Right DAC Channels. Route Left data to Left DAC and Right data to Right DAC.
// DAC Vol control soft step 1 step per DAC word clock.
CODEC_IC_REGWRITE(AIC3204_DAC_CH_SET1, 0xd4, i2c[0]);
// Power up Left and Right ADC Channels, ADC vol ctrl soft step 1 step per ADC word clock.
CODEC_IC_REGWRITE(AIC3204_ADC_CH_SET, 0xc0, i2c[0]);
// Unmute Left and Right DAC digital volume control
CODEC_IC_REGWRITE(AIC3204_DAC_CH_SET2, 0x00, i2c[0]);
// Unmute Left and Right ADC Digital Volume Control.
CODEC_IC_REGWRITE(AIC3204_ADC_FGA_MUTE, 0x00, i2c[0]);
CODEC_IC_REGWRITE( AIC3204_PAGE_CTRL, 1, i2c[0]); //page1
CODEC_IC_REGWRITE( 0x47, 0x32, i2c[0]); //analog input quick charging configure
CODEC_IC_REGWRITE( 0x7b, 0x01, i2c[0]); //power up config
CODEC_IC_REGWRITE( 0x33, 0x60, i2c[0]); //---------0x78 used fail-------jian added ----MICBIAS
CODEC_IC_REGWRITE( 0x37, 0x80, i2c[0]);
CODEC_IC_REGWRITE( 0x39, 0x20, i2c[0]); // IN1L to RIGHT MICPGA with 20k ohm
CODEC_IC_REGWRITE( 0x3c, mic_vol/*40*/, i2c[0]); // Right MICPGA VOL --5a-45DB 5e--47db :3d--ap实际测试25DB增益---跟客户样品一致 （一般30DB）
CODEC_IC_REGWRITE( AIC3204_PAGE_CTRL, 0, i2c[0]); // page0
CODEC_IC_REGWRITE( 0x51, 0xc0, i2c[0]); //
CODEC_IC_REGWRITE( 0x52, 0x00, i2c[0]); //
i2c[0].shutdown();
} }
} }
button_task(c_hidSendData, cc_mic_level, c_uac_vol);
}
// 改动原因：EQ模式切换和参数存储已整合到button_task，AudioHwRemote2函数不再需要处理EQ相关逻辑
void AudioHwRemote2(chanend c, client interface i2c_master_if i2c)
{
// 改动原因：EQ模式切换和参数存储已移动到button_task中处理，此函数为空函数
} }

29
sw_usb_audio/app_usb_aud_phaten_golden/src/extensions/br_wrapper.c
View File

@@ -1,4 +1,6 @@
// Copyright 2024 XMOS LIMITED. // Copyright 2024 XMOS LIMITED.
#define DEBUG_PRINT_ENABLE 1
#include "debug_print.h"
// This Software is subject to the terms of the XMOS Public Licence: Version 1. // This Software is subject to the terms of the XMOS Public Licence: Version 1.
#include <print.h> #include <print.h>
#include <stdio.h> #include <stdio.h>
@@ -8,6 +10,7 @@
#include <xcore/chanend.h> #include <xcore/chanend.h>
#include <xcore/channel.h> #include <xcore/channel.h>
#include "xc_ptr.h" #include "xc_ptr.h"
#include "dnr_dsp_buf.h"
#include "xua_conf.h" #include "xua_conf.h"
@@ -20,6 +23,10 @@ void buffer_exchange(chanend_t c_data, unsigned sampsFromUsbToAudio[]) {
#endif #endif
} }
extern int i2c_codec_mic_vol_up(void);
extern int i2c_codec_mic_vol_down(void);
extern unsigned g_mic_vol_cmd_pending;
void dsp_main (chanend_t c_data) { void dsp_main (chanend_t c_data) {
#if EQ_EN #if EQ_EN
@@ -37,3 +44,25 @@ void dsp_main (chanend_t c_data) {
} }
#endif #endif
} }
void i2c_control_task(void) {
delay_milliseconds(500);
while (1) {
delay_milliseconds(10);
if (g_mic_vol_cmd_pending == KEY_MIC_VOL_DN)
{
debug_printf("i2c_codec_mic_vol_down\n");
i2c_codec_mic_vol_down();
debug_printf("i2c_codec_mic_vol_down done\n");
g_mic_vol_cmd_pending = 0;
}
if (g_mic_vol_cmd_pending == KEY_MIC_VOL_UP)
{
debug_printf("i2c_codec_mic_vol_up\n");
i2c_codec_mic_vol_up();
debug_printf("i2c_codec_mic_vol_up done\n");
g_mic_vol_cmd_pending = 0;
}
}
}

19
sw_usb_audio/app_usb_aud_phaten_golden/src/extensions/dsp.c
View File

@@ -26,6 +26,7 @@
// 改动原因：添加user_func.h头文件，用于调用save_value和load_value函数保存/加载模式到/从flash // 改动原因：添加user_func.h头文件，用于调用save_value和load_value函数保存/加载模式到/从flash
extern void save_value(unsigned char *path, unsigned char value); extern void save_value(unsigned char *path, unsigned char value);
extern unsigned char load_value(unsigned char *path); extern unsigned char load_value(unsigned char *path);
extern void codec_init(void);
#if EQ_EN #if EQ_EN
// 改动原因：添加EQ相关头文件和函数声明，用于在button_task中处理EQ模式切换和参数存储 // 改动原因：添加EQ相关头文件和函数声明，用于在button_task中处理EQ模式切换和参数存储
#include "eq_flash_storage.h" #include "eq_flash_storage.h"
@@ -39,6 +40,7 @@ unsigned g_windows_detect_done = 0;
unsigned g_ex3d_key_verified = 0; unsigned g_ex3d_key_verified = 0;
int32_t sys_vol = 0; int32_t sys_vol = 0;
enum { OS_WIN = 1, OS_OTHERS = 2 }; enum { OS_WIN = 1, OS_OTHERS = 2 };
unsigned g_mic_vol_cmd_pending = 0;
extern unsigned g_uac_vol; extern unsigned g_uac_vol;
chanend_t uc_ex3d_to_ubm, uc_eq_data; chanend_t uc_ex3d_to_ubm, uc_eq_data;
@@ -735,6 +737,7 @@ void update_button(unsigned char b)
#define MODE_SPATIAL_MOVIE OPT_IN_FLAG // 3 STEREO_8K模式标志 #define MODE_SPATIAL_MOVIE OPT_IN_FLAG // 3 STEREO_8K模式标志
#define MODE_UAC1 USB_IN_FLAG // 2 UAC1模式标志 #define MODE_UAC1 USB_IN_FLAG // 2 UAC1模式标志
extern uint8_t mic_vol;
//Tile 1 //Tile 1
void hid_button_task(chanend_t cc_mic_level, chanend_t c_hidRcvData, chanend_t c_hidSendData, chanend_t c_uac_vol) void hid_button_task(chanend_t cc_mic_level, chanend_t c_hidRcvData, chanend_t c_hidSendData, chanend_t c_uac_vol)
{ {
@@ -868,17 +871,7 @@ void hid_button_task(chanend_t cc_mic_level, chanend_t c_hidRcvData, chanend_t c
// 正常的mic level命令处理 // 正常的mic level命令处理
debug_printf("Processing mic level command: 0x%02X\n", tmp); debug_printf("Processing mic level command: 0x%02X\n", tmp);
switch (tmp) { switch (tmp) {
case KEY_MIC_VOL_UP: case MUTED_MIC:
ret = i2c_codec_mic_vol_up();
debug_printf("KEY_MIC_VOL_UP\n");
break;
case KEY_MIC_VOL_DN:
ret = i2c_codec_mic_vol_down();
debug_printf("KEY_MIC_VOL_DN\n");
break;
case MUTED_MIC:
SET_SHARED_GLOBAL(g_mute_on_off_t1, MUTE_ON); SET_SHARED_GLOBAL(g_mute_on_off_t1, MUTE_ON);
debug_printf("MUTED_MIC\n"); debug_printf("MUTED_MIC\n");
break; break;
@@ -1068,6 +1061,8 @@ void button_task(chanend_t c_hidSendData, chanend_t cc_mic_level, chanend_t c_ua
uint8_t tmp = 0; uint8_t tmp = 0;
unsigned hidData0; unsigned hidData0;
delay_milliseconds(200);
codec_init();
unsigned ex3d_key_verified; unsigned ex3d_key_verified;
delay_milliseconds(300); delay_milliseconds(300);
@@ -1310,7 +1305,7 @@ void button_task(chanend_t c_hidSendData, chanend_t cc_mic_level, chanend_t c_ua
} }
} }
if (tmp) { if (tmp) {
chan_out_byte(cc_mic_level, tmp); // 发送到hid_button_task处理 g_mic_vol_cmd_pending = (unsigned)tmp;
} }
break; break;
case KEY_MUTE: case KEY_MUTE:

3
sw_usb_audio/app_usb_aud_phaten_golden/src/extensions/user_main.h
View File

@@ -21,7 +21,7 @@ extern void SetEqDataChan (chanend c);
/* I2C interface ports */ /* I2C interface ports */
extern port p_scl; extern port p_scl;
extern port p_sda; extern port p_sda;
extern void i2c_control_task(void);
extern int dsp_worker_tile(chanend c_dsp_to_ex3d, int worker_id); extern int dsp_worker_tile(chanend c_dsp_to_ex3d, int worker_id);
//extern int dsp_worker_tile_1(chanend c_dsp_to_ex3d, int worker_id); //extern int dsp_worker_tile_1(chanend c_dsp_to_ex3d, int worker_id);
extern void ex3d_task(); extern void ex3d_task();
@@ -130,6 +130,7 @@ extern void key_receiver(chanend c_key);
{ dsp_core0(); } \ { dsp_core0(); } \
}\ }\
on tile[0]: {dsp_main(c_eq_data); } \ on tile[0]: {dsp_main(c_eq_data); } \
on tile[0]: {i2c_control_task();} \
#endif // AIZIP_DNR #endif // AIZIP_DNR