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---
title: DNR6521x-VC1 Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces
description: DNR6521x-VC1 Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces Datasheet
author: Technical Documentation Department
date: 2025-05-14
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# DNR6521x-VC1
__Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
DNR65211 is a high-performance AI deep noise reduction product based on XMOS processor architecture, designed to provide audio equipment manufacturers with exceptional audio processing capabilities. The product integrates two independently optimized AI noise reduction models.
- The strong noise reduction model employs deep neural network architecture to effectively process various stationary and non-stationary noises in complex acoustic environments, achieving maximum noise suppression while ensuring high voice fidelity
- The singing noise reduction model reduces processing latency to 11 milliseconds through lightweight design, effectively suppressing background noise while completely preserving vocal characteristics
- The product supports I2S audio input and can simultaneously output to USB and I2S interfaces, widely applicable to live streaming equipment, conference systems, recording devices, outdoor sports DV, and other application fields
### 1.2 Product Features
**Audio Performance Features**
- AI Deep Noise Reduction
- Eliminates various stationary and non-stationary noises, adapts to complex acoustic environments
- Effectively eliminates sudden noises such as key sounds, keyboard sounds, footstep sounds
- Dual AI Noise Reduction Models
- Strong noise reduction model suitable for complex acoustic scenarios: outdoor recording, gaming, etc.
- Singing noise reduction model suitable for indoor live streaming, singing or interview scenarios
- Ultra-Low Latency Real-Time Processing
- Strong noise reduction model latency <50ms, meets audio-video synchronization requirements
- Singing noise reduction model latency <11ms, meets strict live singing requirements
- High-Fidelity Voice Restoration
- Strong noise reduction model completely preserves voice characteristics
- Singing noise reduction model not only completely preserves voice characteristics but also completely preserves singing tail tones
**USB Interface Features**
- Supports UAC 2.0
- Supports OTG connection
- Plug and play, no driver installation required
- Supports HID configuration
**System Compatibility**
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
- No special driver installation required
**Codec Support**
- Supports NAU88l21
### 1.3 Application Scenarios
- Live Streaming Equipment
- Effectively suppresses various environmental noises, adapts to diverse live streaming scenarios
- Gaming Headsets
- Eliminates keyboard sounds, mouse clicks, and background noise, providing clear teammate communication experience
- Outdoor Sports Equipment
- Suppresses wind noise and environmental noise interference in sports scenarios, providing clear calling and recording experience for outdoor sports enthusiasts
- Outdoor Recording Equipment
- Achieves high-quality recording in complex outdoor acoustic environments, meeting professional requirements for on-site interviews and content creation
- Conference System Equipment
- Processes background noise such as air conditioning sounds and footstep sounds in office environments
- Communication Devices
- Suitable for business calls with strict real-time requirements, providing imperceptible latency voice processing experience
### 1.4 Product Functional Block Diagram
<figure markdown="span">
![DNR65211 Block Diagram](/assets/images/hifi_audio/dnr65211_diagram.png "DNR6521x-VC1 Block Diagram"){width=600}
<figcaption>Figure 1: DNR6521x-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| DNR65211-VC1 | DNR65211-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | Single-channel ultra-low latency AI deep noise reduction processor with integrated USB and I2S interfaces, singing + strong noise reduction models, 3-level noise reduction |
| DNR65212-VC1 | DNR65212-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | Single-channel ultra-low latency AI deep noise reduction processor with integrated USB and I2S interfaces, strong noise reduction model, 2-level noise reduction |
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | I²S In(Master) → Ai DNR → USB(UAC2.0) <br> I²S In(Master) → Ai DNR → I²S Out(Master) | Supports USB and I²S input, USB and I²S output, internal AI noise reduction |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) ←→ I²S(Master) Mode
**Input/Output Parameters:**
| Parameter | Input/Output | Input/Output |
|:---------|:-------------|:-------------|
| **Interface** | USB Audio Class 2.0 | I²S(Master) |
| **Audio Format** | PCM | PCM |
| **Sampling Rate** | 48KHz/24bit | 48kHz/24bit |
| **Bit Depth** | Fixed 24bit | Fixed 24bit |
#### 2.2.2 Supported Codec
- This product is compatible with NAU88l21 codec
### 2.3 Noise Reduction Performance Comparison
!!! info ""
<div class="sticky-column" markdown>
| Comparison Dimension | DNR65211 Strong Noise Reduction Model | DNR65211 Singing Noise Reduction Model | Traditional Noise Reduction Technology |
|----------------|---------------------------------------------|-----------------------------------------------|----------------------------------|
| **Technical Principle** | Deep neural network architecture, AI algorithm real-time spectrum analysis, intelligent voice and noise component identification | Based on strong noise reduction model, specially optimized for music scene processing, preserves singing tone and timbre characteristics | Frequency domain filtering method, based on statistical models and fixed algorithm parameters |
| **Processing Latency** | < 50ms meets audio-video synchronization | < 11ms ultra-low latency | Medium latency |
| **Noise Processing Capability** | Effectively processes stationary and non-stationary noise | Specially optimized for music content processing | Limited capability for non-stationary noise |
| **Voice Fidelity** | Completely preserves voice characteristics | Completely preserves singing tail tone details | Possible audio quality loss |
| **Environmental Adaptability** | Processes various complex acoustic environments | Specially optimized for music scenarios | Suitable for relatively stable acoustic environments |
| **Typical Applications** | Outdoor live streaming equipment, gaming headsets, conference systems, professional recording equipment | Indoor live streaming equipment, karaoke equipment, music recording, online interview systems | Traditional telephone systems, basic conference equipment, basic audio processing |
</div>
## 3. Pin Configuration and Functions
### 3.1 DNR65211_VC1 Pin Layout
<figure markdown="span">
![DNR6521x-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "DNR6521x-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: DNR65211_VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 DNR65211_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I/O | NC |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | NC |
| 9 | X0D29 | I/O | Active low<br><br>DNR65211 function definition<br>{Low noise level LED indicator<br>Slow blink: Singing noise reduction model <br>Constant on: Strong noise reduction model}<br><br>DNR65212 function definition<br>{Noise reduction off LED indicator, constant on} |
| 10 | X0D35 | I | I²S_IN_SCLK(MASTER, connect to NAU88L21) |
| 11 | X0D36 | I | I²S_IN_LRCLK(MASTER, connect to NAU88L21) |
| 12 | X0D37 | I/O | I²S_IN_DATA0(MASTER, connect to NAU88L21) |
| 13 | X0D38 | O | I²S_OUT_DATA0(MASTER, connect to NAU88L21) |
| 14 | X0D40 | I/O | Active low<br><br>DNR65211 function definition<br>{Short press to cycle through noise reduction strength: Off, Low, Medium, High<br>Long press: Switch noise reduction model}<br><br>DNR65212 function definition<br>{Short press to cycle through noise reduction strength: Off, Low, High} |
| 15 | X0D39 | I | I²S_OUT_MCLK(MASTER, connect to NAU88L21) |
| 16 | X0D42 | I/O | Microphone MUTE_SW, active low, turns off MIC input |
| 17 | X0D41 | I/O | Microphone volume +, active low |
| 18 | X0D43 | I/O | Microphone volume -, active low |
| 19 | X1D34 | I/O | NC |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | Active low<br><br>DNR65211 function definition<br>{Medium noise level LED indicator<br>Slow blink: Singing noise reduction model <br>Constant on: Strong noise reduction model}<br><br>DNR65212 function definition<br>{Low noise level LED indicator, constant on} |
| 22 | X0D31 | I/O | Active low<br><br>DNR65211 function definition<br>{High noise level LED indicator<br>Slow blink: Singing noise reduction model <br>Constant on: Strong noise reduction model}<br><br>DNR65212 function definition<br>{High noise level LED indicator, constant on} |
| 23 | X0D32 | I/O | SPK volume +, active low |
| 24 | X0D33 | I/O | SPK volume -, active low |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | I2C_SCL(connect to NAU88L21) |
| 29 | X0D11 | I/O | I2C_SDA(connect to NAU88L21) |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | NC |
| 35 | X1D11 | O | XU316 internal clock output, connect to X0D39 |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug pin |
| 39 | TDO | I/O | XTAG debug pin |
| 40 | TMS | I/O | XTAG debug pin |
| 41 | TCK | I/O | XTAG debug pin |
| 42 | RST_N | I/O | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O types in table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Hardware Parameters
### 4.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Author |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-08-10 | Initial version release | |
| | | | |
## 7. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

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---
title: DNR65221-VC1 Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and PDM Interfaces
description: DNR65221-VC1 Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and PDM Interfaces Datasheet
author: Technical Documentation Department
date: 2025-05-14
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# DNR65221-VC1
__Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and PDM Interfaces__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
DNR65221-VC1 is a high-performance AI deep noise reduction product based on XMOS processor architecture, designed to provide audio equipment manufacturers with exceptional audio processing capabilities. The product integrates two independently optimized AI noise reduction models.
- The strong noise reduction model employs deep neural network architecture to effectively process various stationary and non-stationary noises in complex acoustic environments, achieving maximum noise suppression while ensuring high voice fidelity
- The singing noise reduction model reduces processing latency to 11 milliseconds through lightweight design, effectively suppressing background noise while completely preserving vocal characteristics
- The product supports PDM audio input and can output to USB interface, widely applicable to live streaming equipment, conference systems, recording devices, outdoor sports DV, and other application fields
### 1.2 Product Features
**Audio Performance Features**
- AI Deep Noise Reduction
- Eliminates various stationary and non-stationary noises, adapts to complex acoustic environments
- Effectively eliminates sudden noises such as key sounds, keyboard sounds, footstep sounds
- Dual AI Noise Reduction Models
- Strong noise reduction model suitable for complex acoustic scenarios: outdoor recording, gaming, etc.
- Singing noise reduction model suitable for indoor live streaming, singing or interview scenarios
- Ultra-Low Latency Real-Time Processing
- Strong noise reduction model latency <50ms, meets audio-video synchronization requirements
- Singing noise reduction model latency <11ms, meets strict live singing requirements
- High-Fidelity Voice Restoration
- Strong noise reduction model completely preserves voice characteristics
- Singing noise reduction model not only completely preserves voice characteristics but also completely preserves singing tail tones
**USB Interface Features**
- Supports UAC 2.0
- Supports OTG connection
- Plug and play, no driver installation required
- Supports HID configuration
**System Compatibility**
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
- No special driver installation required
### 1.3 Application Scenarios
- Live Streaming Equipment
- Effectively suppresses various environmental noises, adapts to diverse live streaming scenarios
- Gaming Headsets
- Eliminates keyboard sounds, mouse clicks, and background noise, providing clear teammate communication experience
- Outdoor Sports Equipment
- Suppresses wind noise and environmental noise interference in sports scenarios, providing clear calling and recording experience for outdoor sports enthusiasts
- Outdoor Recording Equipment
- Achieves high-quality recording in complex outdoor acoustic environments, meeting professional requirements for on-site interviews and content creation
- Conference System Equipment
- Processes background noise such as air conditioning sounds and footstep sounds in office environments
- Communication Devices
- Suitable for business calls with strict real-time requirements, providing imperceptible latency voice processing experience
### 1.4 Product Functional Block Diagram
<figure markdown="span">
![DNR65221 Block Diagram](/assets/images/hifi_audio/DNR65221_diagram.png "DNR65221-VC1 Block Diagram"){width=600}
<figcaption>Figure 1: DNR65221-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| DNR65221-VC1 | DNR65221-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | Single-channel ultra-low latency AI deep noise reduction processor with integrated USB and PDM interfaces |
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | I²S In(Master) → USB(UAC2.0) <br> I²S In(Master) → I²S Out(Master) | Supports USB and I²S input, USB and I²S output, internal AI noise reduction |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) ←→ I²S(Master) Mode
**Input/Output Parameters:**
| Parameter | Input/Output | Input/Output |
|:---------|:-------------|:-------------|
| **Interface** | USB Audio Class 2.0 | I²S(Master) |
| **Audio Format** | PCM | PCM |
| **Sampling Rate** | 48KHz/24bit | 48kHz/24bit |
| **Bit Depth** | Fixed 24bit | Fixed 24bit |
### 2.3 Noise Reduction Performance Comparison
!!! info ""
<div class="sticky-column" markdown>
| Comparison Dimension | DNR65221 Strong Noise Reduction Model | DNR65221 Singing Noise Reduction Model | Traditional Noise Reduction Technology |
|----------------|---------------------------------------------|-----------------------------------------------|----------------------------------|
| **Technical Principle** | Deep neural network architecture, AI algorithm real-time spectrum analysis, intelligent voice and noise component identification | Based on strong noise reduction model, specially optimized for music scene processing, preserves singing tone and timbre characteristics | Frequency domain filtering method, based on statistical models and fixed algorithm parameters |
| **Processing Latency** | < 50ms meets audio-video synchronization | < 11ms ultra-low latency | Medium latency |
| **Noise Processing Capability** | Effectively processes stationary and non-stationary noise | Specially optimized for music content processing | Limited capability for non-stationary noise |
| **Voice Fidelity** | Completely preserves voice characteristics | Completely preserves singing tail tone details | Possible audio quality loss |
| **Environmental Adaptability** | Processes various complex acoustic environments | Specially optimized for music scenarios | Suitable for relatively stable acoustic environments |
| **Typical Applications** | Outdoor live streaming equipment, gaming headsets, conference systems, professional recording equipment | Indoor live streaming equipment, karaoke equipment, music recording, online interview systems | Traditional telephone systems, basic conference equipment, basic audio processing |
</div>
## 3. Pin Configuration and Functions
### 3.1 DNR65221_VC1 Pin Layout
<figure markdown="span">
![DNR65221-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "DNR65221-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: DNR65221_VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 DNR65221_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I/O | NC |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | NC |
| 9 | X0D29 | I/O | Active low<br>Low noise level LED indicator<br>Slow blink: Singing noise reduction model <br>Constant on: Strong noise reduction model |
| 10 | X0D35 | I | NC |
| 11 | X0D36 | I | NC |
| 12 | X0D37 | I/O | NC |
| 13 | X0D38 | O | NC |
| 14 | X0D40 | I/O | Active low<br>Short press to cycle through noise reduction strength: Off, Low, Medium, High<br>Long press: Switch noise reduction model |
| 15 | X0D39 | I | NC |
| 16 | X0D42 | I/O | Microphone MUTE_SW, active low |
| 17 | X0D41 | I/O | Microphone volume +, active low |
| 18 | X0D43 | I/O | Microphone volume -, active low |
| 19 | X1D34 | I/O | NC |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | Active low<br>Medium noise level LED indicator<br>Slow blink: Singing noise reduction model <br>Constant on: Strong noise reduction model |
| 22 | X0D31 | I/O | Active low<br>High noise level LED indicator<br>Slow blink: Singing noise reduction model <br>Constant on: Strong noise reduction model |
| 23 | X0D32 | I/O | PDM_DATA IN |
| 24 | X0D33 | I/O | NC |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | PDM_CLK |
| 29 | X0D11 | I/O | NC |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | NC |
| 35 | X1D11 | I/O | XU316 internal clock output, connect to X0D39 |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug pin |
| 39 | TDO | I/O | XTAG debug pin |
| 40 | TMS | I/O | XTAG debug pin |
| 41 | TCK | I/O | XTAG debug pin |
| 42 | RST_N | I/O | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O types in table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Hardware Parameters
### 4.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Author |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-08-20 | Initial version release | |
| | | | |
## 7. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

224
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---
title: DNR65231-VC1 Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces
description: DNR65231-VC1 Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces Datasheet
author: Technical Documentation Department
date: 2025-05-14
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# DNR65231-VC1
__Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
DNR65231 is a high-performance AI deep noise reduction product based on XMOS processor architecture, designed to provide exceptional audio processing capabilities for audio equipment manufacturers. The product integrates two independently optimized AI noise reduction models.
- The strong noise reduction model employs a deep neural network architecture, effectively handling various stationary and non-stationary noise in complex acoustic environments while maintaining high voice fidelity and achieving maximum noise suppression
- The singing noise reduction model uses a lightweight design to reduce processing latency to 11 milliseconds, effectively suppressing background noise while fully preserving vocal characteristics.
- The product supports I2S audio input with output to USB, and also supports USB audio output to I2S, widely applicable to multiple application areas including streaming equipment, conference systems, recording devices, and outdoor sports cameras.
### 1.2 Product Features
**Audio Performance Features**
- AI Deep Noise Reduction
- Eliminates various stationary and non-stationary noise, adapting to complex acoustic environments
- Effectively eliminates burst noise such as key clicks, keyboard sounds, and footsteps
- Dual AI Noise Reduction Models
- Strong noise reduction model suitable for complex acoustic scenarios: outdoor recording, gaming, etc.
- Singing noise reduction model suitable for indoor streaming singing or interview scenarios
- Ultra-Low Latency Real-Time Processing
- Strong noise reduction model latency <50ms, meeting audio-video synchronization requirements
- Singing noise reduction model latency <11ms, meeting stringent streaming singing requirements
- High-Fidelity Voice Reproduction
- Strong noise reduction model fully preserves voice characteristics
- Singing noise reduction model not only fully preserves voice characteristics but also completely retains singing tail notes
**USB Interface Features**
- Supports UAC 2.0
- Supports OTG connection
- Plug and play, no driver installation required
- Supports HID configuration
**System Compatibility**
- Supports multiple operating systems including Windows, Linux, Android, macOS, and iOS
- No special driver installation required
### 1.3 Application Scenarios
- Streaming Equipment
- Effectively suppresses various environmental noise, adapting to diverse streaming scenarios
- Gaming Headsets
- Eliminates keyboard sounds, mouse clicks, and background noise, providing clear teammate communication experience
- Outdoor Sports Equipment
- Suppresses wind noise and environmental noise interference in sports scenarios, providing clear calling and recording experience for outdoor enthusiasts
- Outdoor Recording Equipment
- Achieves high-quality recording in complex outdoor acoustic environments, meeting professional needs for on-site interviews and content creation
- Conference System Equipment
- Processes background noise such as air conditioning sounds and footsteps in office environments
- Communication Devices
- Communication devices suitable for business calls with strict real-time requirements, providing imperceptible latency voice processing experience
### 1.4 Product Block Diagram
<figure markdown="span">
![DNR65231 Diagram](/assets/images/hifi_audio/dnr65231_diagram.png "DNR65231-VC1 Diagram"){width=600}
<figcaption>Figure 1: DNR65231-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| DNR65231-VC1 | DNR65231-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | Single-Channel Ultra-Low Latency AI Deep Noise Reduction Processor with Integrated USB and I2S Interfaces |
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | I²S In(Master) → AI DNR → USB(UAC2.0) <br> USB(UAC2.0) → I²S Out(Master) | Supports I²S input, AI DNR noise reduction, USB output, and USB input I²S output |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) ←→ I²S(Master) Mode
**Input/Output Parameters:**
| Parameter | Input/Output | Input/Output |
|:---------|:-------------|:-------------|
| **Interface** | USB Audio Class 2.0 | I²S(Master) |
| **Audio Format** | PCM | PCM |
| **Sampling Rate** | 48KHz/24bit | 48kHz/24bit |
| **Bit Depth** | Fixed 24bit | Fixed 24bit |
### 2.2 Noise Reduction Performance Comparison
!!! info ""
<div class="sticky-column" markdown>
| Comparison Dimension | DNR65231 Strong Noise Reduction Model | DNR65231 Singing Noise Reduction Model | Traditional Noise Reduction Technology |
|----------------|---------------------------------------------|-----------------------------------------------|---------------------------------|
| **Technical Principle** | Deep neural network architecture, AI algorithm real-time spectral analysis, intelligent identification of voice and noise components | Based on strong noise reduction model, specially optimized for music scenarios, preserving vocal pitch and timbre characteristics | Frequency domain filtering method, based on statistical models and fixed algorithm parameters |
| **Processing Latency** | < 50ms meets audio-video synchronization | < 11ms ultra-low latency | Medium latency |
| **Noise Processing Capability** | Effectively processes stationary and non-stationary noise | Specially optimized for music content processing | Limited capability for non-stationary noise processing |
| **Voice Fidelity** | Fully preserves voice characteristics | Fully preserves singing tail note details | May experience audio quality loss |
| **Environmental Adaptability** | Processes various complex acoustic environments | Specially optimized for music scenarios | Suitable for relatively stable acoustic environments |
| **Typical Applications** | Outdoor streaming equipment, gaming headsets, conference systems, professional recording equipment | Indoor streaming equipment, karaoke equipment, music recording, online interview systems | Traditional telephone systems, basic conference equipment, basic audio processing |
</div>
## 3. Pin Configuration and Functions
### 3.1 DNR65231_VC1 Pin Layout
<figure markdown="span">
![DNR65231-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "DNR65231-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: DNR65231_VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 DNR65231_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I/O | NC |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | NC |
| 9 | X0D29 | I/O | Active low<br>Low noise level LED indicator<br>Slow flash: singing noise reduction model. <br>Solid on: strong noise reduction model |
| 10 | X0D35 | I | I²S_IN_BCLK(MASTER) |
| 11 | X0D36 | I | I²S_IN_LRCK(MASTER) |
| 12 | X0D37 | I/O | I²S_IN_DATA0(MASTER) |
| 13 | X0D38 | O | I²S_OUT_DATA0(MASTER) |
| 14 | X0D40 | I/O | Active low<br>Short press cycles through noise reduction levels: off, low, medium, high.<br>Long press: switches noise reduction model. |
| 15 | X0D39 | I | I²S_OUT_MCLK(MASTER) |
| 16 | X0D42 | I/O | Microphone MUTE_SW, active low |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | I/O | NC |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | Active low<br>Medium noise level LED indicator<br>Slow flash: singing noise reduction model. <br>Solid on: strong noise reduction model |
| 22 | X0D31 | I/O | Active low<br>High noise level LED indicator<br>Slow flash: singing noise reduction model. <br>Solid on: strong noise reduction model |
| 23 | X0D32 | I/O | NC |
| 24 | X0D33 | I/O | NC |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | USB detection - connected to VBUS 3.3V divider |
| 29 | X0D11 | I/O | USB status indicator<br>High level (USB connected)<br>Low level (USB disconnected) |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | NC |
| 35 | X1D11 | I/O | XU316 internal clock output, connected to X0D39 |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug PIN |
| 39 | TDO | I/O | XTAG debug PIN |
| 40 | TMS | I/O | XTAG debug PIN |
| 41 | TCK | I/O | XTAG debug PIN |
| 42 | RST_N | I/O | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O type definitions in table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Hardware Parameters
### 4.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Reviser |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-08-10 | Initial version release | |
| V1.1 | 2025-09-25 | Modified pin definitions | |
| V1.2 | 2025-09-26 | Added USB status detection | |
## 7. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

212
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@@ -0,0 +1,212 @@
---
title: GM67211_VC1
description: 48KHz Low-Latency Virtual 7.1 Gaming Audio Processor with EQ/FPS Enhancement and I²S Input Interface Technical Documentation
author: Technical Documentation Team
date: 2025-06-23
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# GM67211_VC1
__48KHz Low-Latency Virtual 7.1 Gaming Audio Processor with EQ/FPS Enhancement and I²S Input Interface__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
GM67211 is a high-performance audio processor developed specifically for the PS5/SWITCH gaming market. It supports PCM 48KHz/16bit format and provides an immersive audio experience for gamers. This product is developed based on the XMOS high-performance chip and optimized specifically for gaming audio processing.
- GM67211 supports I²S digital audio input interface, which after processing through the built-in SA Virtual 7.1 algorithm, outputs high-quality 2-channel analog audio signals to meet gaming audio playback requirements.
- GM67211 incorporates the SA Virtual 7.1 algorithm, which synthesizes 7.1 channels into 2-channel analog output through human-ear-optimized algorithms, allowing users to experience full surround sound effects and sound localization through headphones.
- This product adopts standard I²S interface design with excellent compatibility and can work with various HDMI Repeaters.
### 1.2 Product Features
**Gaming Audio Enhancement Features**
- **FPS Gaming Enhancement Mode**
- Optimized specifically for first-person shooter games
- Provides more precise spatial directionality
- Enhanced key sound effects such as footsteps and gunshots
- Improves competitive gaming performance
- **SA Virtual 7.1 Algorithm**
- Converts 7.1 channels to 2-channel output through specialized algorithms
- Optimized for human hearing, providing 360-degree surround sound and sound localization effects
**Audio Performance Features**
- Supports 48kHz/16bit PCM format, optimized for gaming scenarios
- Low-latency audio processing ensures smooth gaming experience
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports I²S Slave mode audio input
### 1.3 Application Scenarios
- PS5 HDMI Virtual 7.1 Gaming Sound Card
<figure markdown="span">
![GM67211_VC1 Application Scenario](/assets/images/hifi_audio/gm67211_application_ps5_hdmi.png "GM67211 Application Scenario")
<figcaption>GM67211 Application Scenario</figcaption>
</figure>
- Switch HDMI Virtual 7.1 Gaming Sound Card
<figure markdown="span">
![GM67211_VC1 Application Scenario](/assets/images/hifi_audio/gm67211_application_switch_hdmi.png "GM67211 Application Scenario")
<figcaption>GM67211 Application Scenario</figcaption>
</figure>
- Switch Type-C Dock Integrated Virtual 7.1 Gaming Sound Card
<figure markdown="span">
![GM67211_VC1 Application Scenario](/assets/images/hifi_audio/gm67211_application_switch_dock.png "GM67211 Application Scenario")
<figcaption>GM67211 Application Scenario</figcaption>
</figure>
### 1.4 Product Functional Block Diagram
<figure markdown="span">
![GM67211 Block Diagram](/assets/images/hifi_audio/gm67211_diagram.png "GM67211 Block Diagram"){width="600"}
<figcaption>Figure 1: GM67211_VC1 Functional Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|
| GM67211_VC1 | GM67211-VC1 | SMT LGA-52 | 13x13mm | 48KHz Low-Latency Virtual 7.1 Gaming Audio Processor with EQ/FPS Enhancement and I²S Input Interface |
## 2. Modes and Performance Specifications
### 2.1 Supported Function Modes
!!! info "When the mode switch button is pressed once, the system cycles through three sound effect modes, switching to the next mode with each button press."
<div class="sticky-column" markdown>
| Mode Number | Sound Effect Mode Name | Function Description |
|:--------:|:------------|:---------|
| 1 | No Sound Effect Mode | Audio signal does not undergo any sound effect processing, maintains original audio output |
| 2 | FPS/EQ Mode | Enables FPS gaming enhancement algorithm, enhances key sound effects such as footsteps and gunshots, improves spatial directionality |
| 3 | Virtual 7.1 Mode | Enables SA Virtual 7.1 algorithm, converts 7.1 channel audio to 2-channel output, provides 360-degree surround sound and sound localization effects |
</div>
### 2.2 Supported Audio Formats and Sampling Rates:
| Audio Format | Supported Sampling Rates | Bit Depth |
|:---------|:-------------|:-------|
| **PCM** | 48kHz | 16bit |
## 3. Pin Configuration and Functions
### 3.1 GM67211_VC1 Pin Layout
<figure markdown="span">
![GM67211-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "GM67211-VC1 Pin Diagram"){width=600}
<figcaption>Figure 2: GM67211_VC1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 GM67211_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | 3.3V Supply |
| 2 | X1D13 | I | S/PDIF OUT |
| 3 | X1D16 | I | I2S_D3IN, Connect to HDMI I2S D3OUT |
| 4 | GND | P | GND |
| 5 | X1D17 | I | I2S_D2IN, Connect to HDMI I2S D2OUT |
| 6 | X1D18 | I/O | I2S_D1IN, Connect to HDMI I2S D1OUT |
| 7 | X1D19 | I/O | I2S_D0IN, Connect to HDMI I2S D0OUT |
| 8 | X1D22 | I | nc |
| 9 | X0D29 | I | NC |
| 10 | X0D35 | I/O | NC |
| 11 | X0D36 | I/O | NC |
| 12 | X0D37 | I/O | I2C_SCL Connect to TLV320AIC3204 I2C_SCL |
| 13 | X0D38 | I/O | I2C_SDA Connect to TLV320AIC3204 I2C_SDA |
| 14 | X0D40 | O | NC |
| 15 | X0D39 | I/O | DFU pin, Active High |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | CTRL_MUTE, Active High |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | O | NC |
| 20 | GND | P | GND |
| 21 | X0D30 | I | NC |
| 22 | X0D31 | I | NC |
| 23 | X0D32 | I | NC |
| 24 | X0D33 | I | NC |
| 25 | GND | P | GND |
| 26 | GND | P | GND |
| 27 | GND | P | GND |
| 28 | X0D00 | I/O | NC |
| 29 | X0D11 | I | MCLK_IN Connect to LV320AIC3204 MCLK and HDMI MCLK |
| 30 | X1D00 | I | NC |
| 31 | X1D01 | O | I2S_LRCK, Connect to TLV320AIC3204 I2S LRCK and HDMI I2S LRCK |
| 32 | GND | P | GND |
| 33 | X1D09 | I/O | I2S_DOUT, Connect to TLV320AIC3204 |
| 34 | X1D10 | O | I2S_BCLK, Connect to TLV320AIC3204 I2S BCLK and HDMI I2S BCLK|
| 35 | X1D11 | O | MCLK_IN Connect to LV320AIC3204 MCLK and HDMI MCLK |
| 36 | GND | P | GND |
| 37 | GND | P | GND |
| 38 | TDI | I/O | XTAGDEBUG PIN |
| 39 | TDO | I/O | XTAGDEBUG PIN |
| 40 | TMS | I/O | XTAGDEBUG PIN |
| 41 | TCK | I/O | XTAGDEBUG PIN |
| 42 | RST_N | I/O | REST, Active low |
| 43 | 1.8V | P | 1.8V Supply |
| 44 | GND | P | GND |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | GND |
| 48 | 0.9V | P | 0.9V Supply |
| 49 | GND | P | GND |
| 50 | GND | P | GND |
| 51 | GND | P | GND |
| 52 | GND | P | GND |
!!! info "Pin Type Description"
I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Hardware Parameters
### 4.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=600}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Modifier |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-08-23 | Initial version release | |
| V1.1 | 2025-09-10 | Modified pin definition | |
| | | | |
## 8. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

151
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@@ -1,60 +1,65 @@
---
title: GM68311_VC1 48KHz/16bit Virtual 7.1 Gaming Sound Card
description: GM68311_VC1 High-Performance Gaming Audio Processor Technical Documentation
author: Technical Documentation Department
title: GM68311_VC1
description: 48KHz Low-Latency Virtual 7.1 and AI Noise Reduction USB Gaming Audio Processor with FPS Enhancement and Bi-directional I²S Interface Technical Documentation
author: Technical Documentation Team
date: 2025-06-23
print_page: true
---
# GM68311_VC1 48KHz/16bit Virtual 7.1 Gaming Sound Card
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# GM68311_VC1
__48KHz Low-Latency Virtual 7.1 and AI Noise Reduction USB Gaming Audio Processor with FPS Enhancement and Bi-directional I²S Interface__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
The GM68311_VC1 is a high-performance audio processor specifically developed for the gaming market, supporting PCM 48KHz/16bit format to provide immersive audio experiences for gamers. This product is developed based on the A316-Mini-V1 module and is specifically optimized for gaming audio processing.
GM68311 is a gaming sound card optimized for gaming audio processing, developed based on the A316-Mini-V1 module. It supports PCM 48KHz/16bit format and provides an immersive audio experience for gamers.
The GM68311_VC1 supports USB Audio Class 1.0 interface, providing USB input to I²S output transmission functionality, while also supporting I²S input to USB output bidirectional transmission to meet gaming audio playback and communication requirements.
GM68311_VC1 supports USB Audio Class 1.0/2.0 interface, providing USB input to I²S output transmission functionality, while also supporting I²S input to USB output bi-directional transmission to meet gaming audio playback and communication requirements.
The GM68311_VC1 incorporates advanced AI DNR deep learning noise reduction technology, achieving 50ms low latency while perfectly eliminating keyboard, mouse, and various other non-stationary noises, with noise cancellation specifically targeting human voice, making it particularly suitable for gaming scenarios.
GM68311_VC1 features advanced AI DNR deep learning noise reduction technology with 50ms low latency, perfectly eliminating keyboard, mouse, and various other non-stationary noises while preserving only human voice, making it particularly suitable for gaming scenarios.
The GM68311_VC1 features built-in SA Virtual 7.1 algorithm that can synthesize 7.1 channels into 2-channel output through algorithms optimized for human hearing, allowing users to experience full surround sound effects and sound localization through headphones.
Compatible with USB Audio Class standards, supporting multiple operating systems including Windows, Linux, Android, macOS, and iOS.
GM68311_VC1 incorporates SA Virtual 7.1 algorithm that synthesizes 7.1 channels into 2-channel output through human-ear-optimized algorithms, allowing users to experience full surround sound effects and sound localization through headphones.
### 1.2 Product Features
**Gaming Audio Enhancement Features**
- **FPS Gaming Enhancement Mode**
- Optimized specifically for first-person shooter games
- Provides more precise spatial directionality
- Enhanced key sound effects such as footsteps and gunshots
- Improves competitive gaming performance
- **SA Virtual 7.1 Algorithm**
- Converts 7.1 channels to 2-channel output through specialized algorithms
- Optimized for human hearing, providing 360-degree full surround sound and sound localization effects
- Optimized for human hearing, providing 360-degree surround sound and sound localization effects
- **AI DNR Deep Learning Noise Reduction Technology**
- Deep learning-based noise elimination model with 50ms low latency
- Perfectly eliminates keyboard, mouse, and various other non-stationary noises, with noise cancellation specifically for human voice
- Noise elimination model based on deep learning
- Effectively filters conventional background noise
- Intelligently identifies and eliminates sudden noises such as keyboard typing and mouse clicks
- Particularly suitable for gaming communication scenarios
- **FPS Gaming Enhancement Mode**
- Specifically optimized for first-person shooter games
- Provides more precise spatial directional sensing
- Enhances critical audio effects such as footsteps and gunshots
**Audio Performance Features**
- Supports 48kHz/16bit PCM format, specifically optimized for gaming scenarios
- Supports bidirectional audio transmission (playback and recording)
- Supports 48kHz/16bit PCM format, optimized for gaming scenarios
- Supports bi-directional audio transmission (playback and recording)
- Low-latency audio processing ensures smooth gaming experience
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S master mode audio output
- Supports I²S master mode audio input to USB output (bidirectional transmission)
- Supports I²S Master mode audio output
- Supports I²S Master mode audio input to USB output (bi-directional transmission)
- Supports button and LED control
**USB Functionality Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports firmware upgrade via USB
@@ -62,7 +67,7 @@ Compatible with USB Audio Class standards, supporting multiple operating systems
**System Compatibility**
- UAC 1.0 protocol
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS, as well as gaming consoles like PS5 and SWITCH
- Supports multiple operating systems including Windows, Linux, Android, macOS, iOS, and gaming consoles such as PS5, SWITCH
**Codec Support**
@@ -84,54 +89,57 @@ Compatible with USB Audio Class standards, supporting multiple operating systems
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| GM68311_VC1 | GM68311-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | Supports Virtual 7.1 and AI Noise Reduction |
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|
| GM68311_VC1 | GM68311-VC1 | SMT LGA-52 | 13x13mm | 8KHz Low-Latency Virtual 7.1 and AI Noise Reduction USB Gaming Audio Processor with FPS Enhancement and Bi-directional I²S Interface |
## 2. Modes and Performance Specifications
### 2.1 Supported Functional Modes
### 2.1 Supported Function Modes
The GM68311_VC1 supports multiple audio processing functional modes. Users can flexibly configure audio effect processing and noise reduction functions through mode switching buttons. The system supports independent control of audio effect modes and noise reduction modes, with both functions capable of simultaneous activation to provide the optimal gaming audio experience.
GM68311_VC1 supports multiple audio processing function modes. Users can flexibly configure sound effect processing and noise reduction functions through mode switching buttons. The system supports independent control of sound effect modes and noise reduction modes, with both functions capable of being enabled simultaneously to provide the optimal gaming audio experience.
- **Audio Effect Mode Control (Mode Switch Button Single Press Operation)**
- **Sound Effect Mode Control (Mode Switch Button Single Press Operation)**
!!! info "When the mode switch button is pressed once, the system will cycle through three audio effect modes, with each button press switching to the next mode."
!!! info "When the mode switch button is pressed once, the system cycles through three sound effect modes, switching to the next mode with each button press."
<div class="sticky-column" markdown>
| Mode Number | Audio Effect Mode Name | Function Description |
| Mode Number | Sound Effect Mode Name | Function Description |
|:--------:|:------------|:---------|
| 1 | No Audio Effects Mode | Audio signal undergoes no audio effect processing, maintaining original audio output |
| 2 | FPS Mode | Activates FPS gaming enhancement algorithm, strengthening critical audio effects such as footsteps and gunshots, improving spatial directional sensing |
| 3 | Virtual 7.1 Mode | Activates SA Virtual 7.1 algorithm, converting 7.1 channel audio to 2-channel output, providing 360-degree full surround sound and sound localization effects |
| 1 | No Sound Effect Mode | Audio signal does not undergo any sound effect processing, maintains original audio output |
| 2 | FPS Mode | Enables FPS gaming enhancement algorithm, enhances key sound effects such as footsteps and gunshots, improves spatial directionality |
| 3 | Virtual 7.1 Mode | Enables SA Virtual 7.1 algorithm, converts 7.1 channel audio to 2-channel output, provides 360-degree surround sound and sound localization effects |
</div>
- **Noise Reduction Mode Control (Mode Switch Button Long Press Operation)**
!!! info "When the mode switch button is pressed and held, the system will cycle between two noise reduction modes."
!!! info "When the mode switch button is long pressed, the system cycles between two noise reduction modes."
<div class="sticky-column" markdown>
| Mode Number | Noise Reduction Mode Name | Function Description |
|:--------:|:------------|:---------|
| 1 | No Noise Reduction | Disables AI noise reduction function, maintaining original microphone input signal |
| 2 | AI DNR Noise Reduction | Activates AI deep learning noise reduction technology, intelligently eliminating sudden noises from keyboard, mouse, etc., while preserving clear human voice |
| 1 | No Noise Reduction | Disables AI noise reduction function, maintains microphone original input signal |
| 2 | AI DNR Noise Reduction | Enables AI deep learning noise reduction technology, intelligently eliminates sudden noises such as keyboard and mouse, preserves clear human voice |
</div>
- **Mode Combination Description**
!!! info "Audio effect modes and noise reduction modes can be activated simultaneously, providing users with a complete gaming audio solution. For example, users can simultaneously activate Virtual 7.1 mode and AI DNR noise reduction function to enjoy immersive surround sound effects while ensuring microphone communication clarity."
!!! info "Sound effect modes and noise reduction modes can be enabled simultaneously, providing users with a complete gaming audio solution. For example, users can enable both Virtual 7.1 mode and AI DNR noise reduction function simultaneously, enjoying immersive surround sound effects while ensuring microphone communication clarity."
### 2.2 Supported Audio Formats and Sample Rates
### 2.2 Supported Audio Formats and Sampling Rates:
| Audio Format | Supported Sample Rates | Bit Depth |
| Audio Format | Supported Sampling Rates | Bit Depth |
|:---------|:-------------|:-------|
| **PCM** | 48kHz | 16bit |
### 2.3 AI DNR Noise Reduction Parameters
### 2.3 AI DNR Noise Reduction Parameters:
- Latency: 50ms
- Maximum Noise Reduction Strength: 35dB
- Maximum Noise Reduction Intensity: 35dB
### 2.4 Supported Codec
@@ -151,24 +159,24 @@ The GM68311_VC1 supports multiple audio processing functional modes. Users can f
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I | Audio effect mode switch button input, active low |
| 3 | X1D16 | I | Virtual 7.1 mode LED indicator input, active low |
| 2 | X1D13 | I | Sound effect mode switch button input, active low |
| 3 | X1D16 | I | Virtual 7.1 mode LED indicator, active low |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I | AI DNR LED indicator input, active low |
| 5 | X1D17 | I | AI DNR LED indicator, active low |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I | FPS mode LED indicator input, active low |
| 8 | X1D22 | I | FPS mode LED indicator, active low |
| 9 | X0D29 | I | MIC_VOL-, microphone volume decrease, active low |
| 10 | X0D35 | I/O | NC |
| 11 | X0D36 | I/O | NC |
| 12 | X0D37 | I/O | I2C_SCL, connects to CODEC I2S_SCL |
| 13 | X0D38 | I/O | I2C_SDA, connects to CODEC I2S_SDA |
| 12 | X0D37 | I/O | I2C_SCL, connect to CODEC I2S_SCL |
| 13 | X0D38 | I/O | I2C_SDA, connect to CODEC I2S_SDA |
| 14 | X0D40 | O | CODEC_RST, active low |
| 15 | X0D39 | I/O | NC |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | Independent headphone amplifier MUTE output, active low |
| 19 | X1D34 | O | I2S_DOUT, connects to CODEC I2S_DOUT |
| 19 | X1D34 | O | I2S_DOUT, connect to CODEC I2S_DOUT |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I | MUTE, MIC mute button input, active low |
| 22 | X0D31 | I | MIC_VOL+, microphone volume increase, active low |
@@ -179,12 +187,12 @@ The GM68311_VC1 supports multiple audio processing functional modes. Users can f
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | NC |
| 29 | X0D11 | I | MCLK_IN, input |
| 30 | X1D00 | I | I2S_DIN, connects to CODEC I2S_DIN |
| 31 | X1D01 | O | I2S_LRCK, connects to CODEC LRCK |
| 30 | X1D00 | I | I2S_DIN, connect to CODEC I2S_DIN |
| 31 | X1D01 | O | I2S_LRCK, connect to CODEC LRCK |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | O | I2S_BCLK, I2S master mode output, connects to CODEC BLCK |
| 35 | X1D11 | O | MCLK_OUT, clock master output, connects to MCLK_IN and CODEC MCLK |
| 34 | X1D10 | O | I2S_BCLK, I2S Master mode output, connect to CODEC BLCK |
| 35 | X1D11 | O | MCLK_OUT, clock master output, connect to MCLK_IN and CODEC MCLK |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug PIN |
@@ -203,32 +211,41 @@ The GM68311_VC1 supports multiple audio processing functional modes. Users can f
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Hardware Parameters
| Item | Value |
|:----------------------|:------------------------------------------------|
| Hardware Module Model | A316-Mini-V1 |
| Operating Voltage | 3.3V/1.8V/0.9V |
| Operating Temperature | -20℃ ~ 85℃ |
| Flash Size | 16M Bytes |
| Dimensions | 13mm x 13mm |
### 4.1 Normal Operating Conditions
## 5. Revision History
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
| Version | Date | Description | Revised By |
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Modifier |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-06-23 | Initial version release | |
| | | | |
| | | | |
## Consultation and Feedback
## 8. Inquiry and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>
</details>

206
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@@ -1,206 +0,0 @@
---
title: HF83311_VB1/HF83311Q_VB1 768KHz/DSD512 USB Multi-interface HiFi Audio Decoder
description: HF83311_VB1/HF83311Q_VB1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
tags:
- Audio Decoder
- XMOS
- USB HiFi
- MQA
---
# HF83311_VB1/HF83311Q_VB1 768KHz/DSD512 USB Multi-interface HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
## 1. Introduction
### 1.1 Product Description
HF83311_VB1/HF83311Q_VB1 is a USB multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF83311_VB1/HF83311Q_VB1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interfaces allow HF83311_VB1/HF83311Q_VB1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF83311_VB1/HF83311Q_VB1 provides multiple input and output modes, including USB input/I²S output and USB input/S/PDIF output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The HF83311Q_VB1 model supports MQA audio decoding, while the HF83311_VB1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF83311Q_VB1 supports MQA decoding**
- Built-in SSRC module, supporting conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- Supports 16-32bit audio data formats
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio output
- Supports UART configuration interface
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Function Block Diagram
<figure markdown="span">
![HF83311 Block Diagram](/assets/images/hifi_audio/hf83311_diagram.png "HF83311 Block Diagram"){width="600"}
<figcaption>Figure 1: HF83311_VB1/HF83311Q_VB1 Product Function Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| HF83311_VB1 | HF83311-VB1 | SMT STAMP-30 | 19x26mm | A316-1926-V1 | |
| HF83311Q_VB1 | HF83311Q-VB1 | SMT STAMP-30 | 19x26mm | A316-1926-V1 | **Supports MQA Decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
| Mode Number | Input-Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |
| 3 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0 |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF83311Q_VB1 model only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 USB(UAC2.0) in → S/PDIF out Mode
**Input/Output Sampling Rate Support:**
| Interface | Audio Format | Supported Sampling Rates |
|:-----|:---------|:-------------|
| **USB Input** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz |
| **S/PDIF Output** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**SSRC (Synchronous Sample Rate Conversion) Function:**
* Input sampling rate ≤ 192kHz: Output at original sampling rate
* Input sampling rate > 192kHz: Output at 192kHz after SSRC conversion
**SSRC Performance Specifications:**
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥140dB
#### 2.2.4 USB(UAC1.0) in → S/PDIF out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
## 3. Pin Configuration and Functions
### 3.1 HF83311_VB1/HF83311Q_VB1 Pin Layout
<figure markdown="span">
![HF83311-VB1 Pin Diagram](/assets/images/hifi_audio/a316_1926v1_module_pin_define.png "HF83311-VB1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF83311-VB1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 HF83311_VB1/HF83311Q_VB1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | GND | P | Module Ground |
| 2 | 3V3 | P | Module 3.3V Power Supply |
| 3 | X1D11 | I/O | XU316 Internal Clock Output |
| 4 | X1D10 | I/O | NC |
| 5 | X1D09 | I/O | NC |
| 6 | X1D01 | I/O | NC |
| 7 | X1D00 | I/O | NC |
| 8 | X0D11 | I/O | UART_RX, connects to MCU_TX |
| 9 | X0D00 | I/O | UART_TX, connects to MCU_RX |
| 10 | X0D31 | I/O | NC |
| 11 | X0D30 | I/O | NC |
| 12 | X1D34 | I/O | S/PDIF Output |
| 13 | X0D43 | I/O | NC |
| 14 | X0D41 | I/O | NC |
| 15 | X0D42 | I/O | NC |
| 16 | MCLK | I/O | Active Crystal 49.152/45.1584MHz Clock Output |
| 17 | X0D40 | I/O | NC |
| 18 | X0D38 | I/O | I²S_OUT_DATA0(Master) |
| 19 | X0D37 | I/O | NC |
| 20 | X0D36 | I/O | I²S_OUT_LRCLK(Master) |
| 21 | X0D35 | I/O | I²S_OUT_SCLK(Master) |
| 22 | X0D29 | I/O | NC |
| 23 | X1D22 | I/O | NC |
| 24 | X1D19 | I/O | NC |
| 25 | X1D16 | I/O | NC |
| 26 | USB_DP | I/O | USB Data Positive |
| 27 | USB_DM | I/O | USB Data Negative |
| 28 | X1D18 | I/O | NC |
| 29 | X1D17 | I/O | NC |
| 30 | X1D13 | I/O | NC |
!!! info "Pin Type Description"
- I/O Type Definitions in Table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Version Release | |
| | | | |
| | | | |
## Consultation and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
--8<-- "common/customer_form.md"
</details>

224
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@@ -1,224 +0,0 @@
---
title: HF83311_VC1/HF83311Q_VC1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
description: HF83311_VC1/HF83311Q_VC1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
---
# HF83311_VC1/HF83311Q_VC1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
## 1. Introduction
### 1.1 Product Description
HF83311_VC1/HF83311Q_VC1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF83311_VC1/HF83311Q_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interfaces allow HF83311_VC1/HF83311Q_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF83311_VC1/HF83311Q_VC1 provides multiple input and output modes, including USB input/I²S output and USB input/S/PDIF output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The HF83311Q_VC1 model supports MQA audio decoding, while the HF83311_VC1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF83311Q_VC1 supports MQA decoding**
- Built-in SSRC module, supporting conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- Supports 16-32bit audio data formats
- Supports S/PDIF output
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio output
- Supports UART configuration interface
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Function Block Diagram
<figure markdown="span">
![HF83311 Block Diagram](/assets/images/hifi_audio/hf83311_diagram.png "HF83311 Block Diagram"){width="600"}
<figcaption>Figure 1: HF83311_VC1/HF83311Q_VC1 Function Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| HF83311_VC1 | HF83311-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | |
| HF83311Q_VC1 | HF83311Q-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 |**Supports MQA Decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
| Mode Number | Input-Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(MASTER) out | USB input, I²S output, UAC2.0 |
| 2 | USB(UAC1.0) in-I²S(MASTER) out | USB input, I²S output, UAC1.0 |
| 3 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0 |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF83311Q_VC1 model only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 USB(UAC2.0) in → S/PDIF out Mode
**Input/Output Sampling Rate Support:**
| Interface | Audio Format | Supported Sampling Rates |
|:-----|:---------|:-------------|
| **USB Input** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz |
| **S/PDIF Output** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**SSRC (Synchronous Sample Rate Conversion) Function:**
* Input sampling rate ≤ 192kHz: Output at original sampling rate
* Input sampling rate > 192kHz: Output at 192kHz after SSRC conversion
**SSRC Performance Specifications:**
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥140dB
#### 2.2.4 USB(UAC1.0) in → S/PDIF out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
## 3. Pin Configuration and Functions
### 3.1 HF83311_VC1/HF83311Q_VC1 Pin Layout
<figure markdown="span">
![HF83311-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "HF83311-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF83311_VC1/HF83311Q_VC1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 HF83311_VC1/HF83311Q_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V Power Supply |
| 2 | X1D13 | I/O | NC |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module Ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | NC |
| 9 | X0D29 | I/O | NC |
| 10 | X0D35 | I/O | I²S_OUT_SCLK(MASTER) |
| 11 | X0D36 | I/O | I²S_OUT_LRCLK(MASTER) |
| 12 | X0D37 | I/O | NC |
| 13 | X0D38 | I/O | I²S_OUT_DATA0(MASTER) |
| 14 | X0D40 | I/O | NC |
| 15 | X0D39 | I/O | I²S_OUT_MCLK(MASTER) |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | I/O | S/PDIF Output |
| 20 | GND | P | Module Ground |
| 21 | X0D30 | I/O | NC |
| 22 | X0D31 | I/O | NC |
| 23 | X0D32 | I/O | NC |
| 24 | X0D32 | I/O | NC |
| 25 | GND | P | Module Ground |
| 26 | GND | P | Module Ground |
| 27 | GND | P | Module Ground |
| 28 | X0D00 | I/O | UART_TX, connects to MCU_RX |
| 29 | X0D11 | I/O | UART_RX, connects to MCU_TX |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module Ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | NC |
| 35 | X1D11 | I/O | XU316 Internal Clock Output |
| 36 | GND | P | Module Ground |
| 37 | GND | P | Module Ground |
| 38 | TDI | I/O | XTAG Debug PIN |
| 39 | TDO | I/O | XTAG Debug PIN |
| 40 | TMS | I/O | XTAG Debug PIN |
| 41 | TCK | I/O | XTAG Debug PIN |
| 42 | RST_N | I/O | System Reset, Active Low |
| 43 | 1.8V | P | Module 1.8V Power Supply |
| 44 | GND | P | Module Ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module Ground |
| 48 | 0.9V | P | Module 0.9V Power Supply |
| 49 | GND | P | Module Ground |
| 50 | GND | P | Module Ground |
| 51 | GND | P | Module Ground |
| 52 | GND | P | Module Ground |
!!! info "Pin Type Description"
I/O Type Definitions in Table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Version Release | |
| | | | |
| | | | |
## Consultation and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
--8<-- "common/customer_form.md"
</details>

193
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@@ -1,193 +0,0 @@
---
title: HF86611_VB1/HF86611Q_VB1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
description: HF86611_VB1/HF86611Q_VB1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
tags:
- Audio Decoder
- XMOS
- USB HiFi
- Multi-Channel
- MQA
---
# HF86611_VB1/HF86611Q_VB1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
## 1. Introduction
### 1.1 Product Description
HF86611_VB1/HF86611Q_VB1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF86611_VB1/HF86611Q_VB1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interfaces allow HF86611_VB1/HF86611Q_VB1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF86611_VB1/HF86611Q_VB1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The HF86611Q_VB1 model supports MQA audio decoding, while the HF86611_VB1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF86611Q_VB1 supports MQA decoding**
- Built-in SSRC and ASRC modules, supporting conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio input
- Supports UART configuration interface
- Supports four S/PDIF input channels
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Function Block Diagram
<figure markdown="span">
![HF86611 Block Diagram](/assets/images/hifi_audio/hf86611_diagram.png "HF86611 Block Diagram"){width="600"}
<figcaption>Figure 1: HF86611_VB1/HF86611Q_VB1 Product Function Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| HF86611_VB1 | HF86611-VB1 | SMT STAMP-30 | 19x26mm | A316-1926-V1 | |
| HF86611Q_VB1 | HF86611Q-VB1 | SMT STAMP-30 | 19x26mm | A316-1926-V1 | **Supports MQA Decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
| Mode Number | Input-Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |
| 3 | S/PDIF1 IN-I²S(Master) OUT | S/PDIF channel 1 input, I²S output |
| 4 | S/PDIF2 IN-I²S(Master) OUT | S/PDIF channel 2 input, I²S output |
| 5 | S/PDIF3 IN-I²S(Master) OUT | S/PDIF channel 3 input, I²S output |
| 6 | S/PDIF4 IN-I²S(Master) OUT | S/PDIF channel 4 input, I²S output |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF86611Q_VB1 model only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 S/PDIF in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
## 3. Pin Configuration and Functions
### 3.1 HF86611_VB1/HF86611Q_VB1 Pin Layout
<figure markdown="span">
![HF86611-VB1 Pin Diagram](/assets/images/hifi_audio/a316_1926v1_module_pin_define.png "HF86611-VB1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF86611-VB1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 HF86611_VB1/HF86611Q_VB1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | GND | P | Module Ground |
| 2 | 3V3 | P | Module 3.3V Power Supply |
| 3 | X1D11 | I/O | XU316 Internal Clock Output |
| 4 | X1D10 | I/O | S/PDIF Channel 4 Input |
| 5 | X1D09 | I/O | NC |
| 6 | X1D01 | I/O | NC |
| 7 | X1D00 | I/O | NC |
| 8 | X0D11 | I/O | UART_RX, connects to MCU_TX |
| 9 | X0D00 | I/O | UART_TX, connects to MCU_RX |
| 10 | X0D31 | I/O | NC |
| 11 | X0D30 | I/O | NC |
| 12 | X1D34 | I/O | S/PDIF Channel 3 Input |
| 13 | X0D43 | I/O | NC |
| 14 | X0D41 | I/O | NC |
| 15 | X0D42 | I/O | NC |
| 16 | MCLK | I/O | Active Crystal 49.152/45.1584MHz Clock Output |
| 17 | X0D40 | I/O | NC |
| 18 | X0D38 | I/O | I²S_OUT_DATA0(Master) |
| 19 | X0D37 | I/O | NC |
| 20 | X0D36 | I/O | I²S_OUT_LRCLK(Master) |
| 21 | X0D35 | I/O | I²S_OUT_SCLK(Master) |
| 22 | X0D29 | I/O | NC |
| 23 | X1D22 | I/O | S/PDIF Channel 2 Input |
| 24 | X1D19 | I/O | NC |
| 25 | X1D16 | I/O | NC |
| 26 | USB_DP | I/O | USB Data Positive |
| 27 | USB_DM | I/O | USB Data Negative |
| 28 | X1D18 | I/O | NC |
| 29 | X1D17 | I/O | NC |
| 30 | X1D13 | I/O | S/PDIF Channel 1 Input |
!!! info "Pin Type Description"
- I/O Type Definitions in Table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Version Release | |
| | | | |
| | | | |
## Consultation and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
--8<-- "common/customer_form.md"
</details>

208
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@@ -1,208 +0,0 @@
---
title: HF86611_VC1/HF86611Q_VC1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
description: HF86611_VC1/HF86611Q_VC1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
---
# HF86611_VC1/HF86611Q_VC1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
## 1. Introduction
### 1.1 Product Description
HF86611_VC1/HF86611Q_VC1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF86611_VC1/HF86611Q_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interfaces allow HF86611_VC1/HF86611Q_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF86611_VC1/HF86611Q_VC1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The HF86611Q_VC1 model supports MQA audio decoding, while the HF86611_VC1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF86611Q_VC1 supports MQA decoding**
- Built-in SSRC and ASRC modules, supporting conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
- Supports four S/PDIF input channels
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio input
- Supports UART configuration interface
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Function Block Diagram
<figure markdown="span">
![HF86611 Block Diagram](/assets/images/hifi_audio/hf86611_diagram.png "HF86611 Block Diagram"){width="600"}
<figcaption>Figure 1: HF86611_VC1/HF86611Q_VC1 Function Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| HF86611_VC1 | HF86611-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | |
| HF86611Q_VC1 | HF86611Q-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 |**Supports MQA Decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
| Mode Number | Input-Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(MASTER) out | USB input, I²S output, UAC2.0 |
| 2 | USB(UAC1.0) in-I²S(MASTER) out | USB input, I²S output, UAC1.0 |
| 3 | S/PDIF1 IN-I²S(MASTER) OUT | S/PDIF channel 1 input, I²S output |
| 4 | S/PDIF2 IN-I²S(MASTER) OUT | S/PDIF channel 2 input, I²S output |
| 5 | S/PDIF3 IN-I²S(MASTER) OUT | S/PDIF channel 3 input, I²S output |
| 6 | S/PDIF4 IN-I²S(MASTER) OUT | S/PDIF channel 4 input, I²S output |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF86611Q_VC1 model only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 S/PDIF in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
## 3. Pin Configuration and Functions
### 3.1 HF86611_VC1/HF86611Q_VC1 Pin Layout
<figure markdown="span">
![HF86611-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "HF86611-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF86611_VC1/HF86611Q_VC1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 HF86611_VC1/HF86611Q_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V Power Supply |
| 2 | X1D13 | I/O | S/PDIF Channel 1 Input |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module Ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | S/PDIF Channel 2 Input |
| 9 | X0D29 | I/O | NC |
| 10 | X0D35 | I/O | I²S_OUT_SCLK(MASTER) |
| 11 | X0D36 | I/O | I²S_OUT_LRCLK(MASTER) |
| 12 | X0D37 | I/O | NC |
| 13 | X0D38 | I/O | I²S_OUT_DATA0(MASTER) |
| 14 | X0D40 | I/O | NC |
| 15 | X0D39 | I/O | I²S_OUT_MCLK(MASTER) |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | I/O | S/PDIF Channel 3 Input |
| 20 | GND | P | Module Ground |
| 21 | X0D30 | I/O | NC |
| 22 | X0D31 | I/O | NC |
| 23 | X0D32 | I/O | NC |
| 24 | X0D32 | I/O | NC |
| 25 | GND | P | Module Ground |
| 26 | GND | P | Module Ground |
| 27 | GND | P | Module Ground |
| 28 | X0D00 | I/O | UART_TX, connects to MCU_RX |
| 29 | X0D11 | I/O | UART_RX, connects to MCU_TX |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module Ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | S/PDIF Channel 4 Input |
| 35 | X1D11 | I/O | XU316 Internal Clock Output |
| 36 | GND | P | Module Ground |
| 37 | GND | P | Module Ground |
| 38 | TDI | I/O | XTAG Debug PIN |
| 39 | TDO | I/O | XTAG Debug PIN |
| 40 | TMS | I/O | XTAG Debug PIN |
| 41 | TCK | I/O | XTAG Debug PIN |
| 42 | RST_N | I/O | System Reset, Active Low |
| 43 | 1.8V | P | Module 1.8V Power Supply |
| 44 | GND | P | Module Ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module Ground |
| 48 | 0.9V | P | Module 0.9V Power Supply |
| 49 | GND | P | Module Ground |
| 50 | GND | P | Module Ground |
| 51 | GND | P | Module Ground |
| 52 | GND | P | Module Ground |
!!! info "Pin Type Description"
I/O Type Definitions in Table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Version Release | |
| | | | |
| | | | |
## Consultation and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
--8<-- "common/customer_form.md"
</details>

94
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View File

@@ -1,5 +1,5 @@
---
title: HF87611_VB1/HF87611Q_VB1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
title: HF87611_VB1/HF87611Q_VB1 768KHz/DSD512 USB Multi-channel and Multi-interface HiFi Audio Decoder
description: HF87611_VB1/HF87611Q_VB1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
@@ -8,12 +8,19 @@ tags:
- Audio Decoder
- XMOS
- USB HiFi
- Multi-Channel
- Multi-channel
- MQA
---
# HF87611_VB1/HF87611Q_VB1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# HF87611_VB1/HF87611Q_VB1
__Multi-channel PCM 768KHz/DSD512 USB HiFi Decoder with USB/I2S/2CH SPDIF Input and I2S/SPDIF Output__
</div>
</div>
## 1. Introduction
@@ -21,14 +28,14 @@ tags:
HF87611_VB1/HF87611Q_VB1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF87611_VB1/HF87611Q_VB1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interfaces allow HF87611_VB1/HF87611Q_VB1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
HF87611_VB1/HF87611Q_VB1 supports various standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF and I²S interfaces. The flexible audio interfaces allow HF87611_VB1/HF87611Q_VB1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, I²S(slave) input/I²S(master) output and USB input/S/PDIF output, meeting the requirements of different application scenarios.
HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, I²S(slave) input/I²S(master) output, and USB input/S/PDIF output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The HF87611Q_VB1 model supports MQA audio decoding, while the HF87611_VB1 model does not support this feature.**
!!! warning "Important Notice"
**HF87611Q_VB1 model supports MQA audio decoding, while HF87611_VB1 model does not support this feature.**
### 1.2 Product Features
@@ -37,7 +44,7 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF87611Q_VB1 supports MQA decoding**
- Built-in SSRC and ASRC modules, supporting conversion between different interfaces and different sampling rates
- Built-in SSRC and ASRC modules, support conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
@@ -50,32 +57,32 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
- Supports I²S master mode audio output
- Supports S/PDIF audio input/output
- Supports UART configuration interface
- Supports three S/PDIF input/output channels
- Supports 2-channel S/PDIF input/output
**USB Function Features**
**USB Functional Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
- Supports HID, can upgrade MCU firmware via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
- Supports multiple operating systems such as Windows, Linux, Android, macOS and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Function Block Diagram
### 1.4 Product Block Diagram
<figure markdown="span">
![HF87611 Block Diagram](/assets/images/hifi_audio/hf87611_diagram.png "HF87611 Block Diagram"){width="600"}
<figcaption>Figure 1: HF87611_VB1/HF87611Q_VB1 Product Function Block Diagram</figcaption>
<figcaption>Figure 1: HF87611_VB1/HF87611Q_VB1 Product Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
@@ -88,9 +95,9 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
### 2.1 Supported Input and Output Modes
| Mode Number | Input-Output Mode | Description |Mode Switching Command Value (Reference Product Configuration Protocol 0x03 and 0x23 Command)|
| Mode Number | Input/Output Mode | Description |Mode Switch Command Value (Refer to Product Configuration Protocol 0x03 and 0x23 Commands)|
|:--------:|:------------------------|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |0x00, 0x80, 0xa9, 0x00, 0x01|
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |0x00, 0x80, 0x01, 0x00, 0x02|
@@ -98,7 +105,7 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
| 4 | S/PDIF2 IN-I²S(Master) OUT | S/PDIF channel 2 input, I²S output |0x00, 0x80, 0x65, 0x10, 0x04|
| 5 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0 |0x00, 0x80, 0xc5, 0x08, 0x05|
| 6 | I²S(slave) in-I²S(Master) OUT | I²S slave mode input, I²S output |0x00, 0x82, 0xd5, 0x81, 0x06|
### 2.2 Detailed Parameters for Each Operating Mode
@@ -111,7 +118,7 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF87611Q_VB1 model only |
| **MQA** | HF87611Q_VB1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
@@ -148,15 +155,7 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥140dB
#### 2.2.5 USB(UAC1.0) in → S/PDIF out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.6 I²S(slave) in → I²S(Master) out Mode
#### 2.2.5 I²S(slave) in → I²S(Master) out Mode
**Input/Output Sampling Rate Support:**
@@ -167,7 +166,7 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
**ASRC (Asynchronous Sample Rate Conversion) Function:**
* Internal ASRC conversion support, input device can omit providing master clock (MClock)
* Internal ASRC conversion supported, input device may not provide master clock (MClock)
**ASRC Performance Specifications:**
@@ -189,52 +188,51 @@ HF87611_VB1/HF87611Q_VB1 provides multiple input and output modes, including USB
|:--------:|:----------|:------|:-----------------------------|
| 1 | GND | P | Module Ground |
| 2 | 3V3 | P | Module 3.3V Power Supply |
| 3 | X1D11 | I/O | XU316 Internal Clock Output |
| 3 | X1D11 | I/O | Connect to Pin 16 MCLK |
| 4 | X1D10 | I/O | I²S_IN_BCLK(SLAVE) |
| 5 | X1D09 | I/O | NC |
| 6 | X1D01 | I/O | I²S_IN_DATA0(SLAVE) |
| 7 | X1D00 | I/O | I²S_IN_LRCLK(SLAVE) |
| 8 | X0D11 | I/O | UART_RX, connects to MCU_TX |
| 9 | X0D00 | I/O | UART_TX, connects to MCU_RX |
| 8 | X0D11 | I/O | UART_RX, connect to MCU_TX |
| 9 | X0D00 | I/O | UART_TX, connect to MCU_RX |
| 10 | X0D31 | I/O | NC |
| 11 | X0D30 | I/O | NC |
| 12 | X1D34 | I/O | S/PDIF Output/S/PDIF Channel 3 Input |
| 11 | X0D30 | I/O | CTL_MUTE |
| 12 | X1D34 | I/O | S/PDIF output |
| 13 | X0D43 | I/O | NC |
| 14 | X0D41 | I/O | NC |
| 15 | X0D42 | I/O | NC |
| 16 | MCLK | I/O | Active Crystal 49.152/45.1584MHz Clock Output |
| 16 | MCLK | I/O | Active crystal 49.152/45.1584MHz clock output |
| 17 | X0D40 | I/O | NC |
| 18 | X0D38 | I/O | I²S_OUT_DATA0(Master) |
| 19 | X0D37 | I/O | NC |
| 20 | X0D36 | I/O | I²S_OUT_LRCLK(Master) |
| 21 | X0D35 | I/O | I²S_OUT_SCLK(Master) |
| 21 | X0D35 | I/O | I²S_OUT_BCLK(MASTER) |
| 22 | X0D29 | I/O | NC |
| 23 | X1D22 | I/O | S/PDIF Channel 2 Input |
| 23 | X1D22 | I/O | S/PDIF channel 2 input |
| 24 | X1D19 | I/O | NC |
| 25 | X1D16 | I/O | NC |
| 26 | USB_DP | I/O | USB Data Positive |
| 27 | USB_DM | I/O | USB Data Negative |
| 28 | X1D18 | I/O | NC |
| 29 | X1D17 | I/O | NC |
| 30 | X1D13 | I/O | S/PDIF Channel 1 Input |
| 30 | X1D13 | I/O | S/PDIF channel 1 input |
!!! info "Pin Type Description"
- I/O Type Definitions in Table: I=Input, O=Output, P=Power, I/O=Input/Output
- I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Version Release | |
| | | | |
| | | | |
## Consultation and Feedback
| Version | Date | Description | Revised by |
|:---------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Release | |
| | | | |
| | | | |
## 5. Consultation & Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to Expand Consultation & Feedback Form</summary>
--8<-- "common/customer_form.md"
</details>
</details>

134
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@@ -6,22 +6,29 @@ date: 2025-05-07
print_page: true
---
# HF87611_VC1/HF87611Q_VC1 768KHz/DSD512 USB Multi-Channel and Multi-Interface HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# HF87611_VC1/HF87611Q_VC1
__Multi-Channel PCM 768KHz/DSD512 USB HiFi Decoder Supporting USB/I2S/2CH SPDIF Input and I2S/SPDIF Output__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
HF87611_VC1/HF87611Q_VC1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
The HF87611_VC1/HF87611Q_VC1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF87611_VC1/HF87611Q_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interfaces allow HF87611_VC1/HF87611Q_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
The HF87611_VC1/HF87611Q_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interface allows the HF87611_VC1/HF87611Q_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, I²S(slave) input/I²S(MASTER) output and USB input/S/PDIF output, meeting the requirements of different application scenarios.
The HF87611_VC1/HF87611Q_VC1 provides multiple input/output modes, including USB input/I²S output, S/PDIF input/I²S output, I²S (slave) input/I²S (MASTER) output, and USB input/S/PDIF output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
!!! warning "Important Notice"
**The HF87611Q_VC1 model supports MQA audio decoding, while the HF87611_VC1 model does not support this feature.**
### 1.2 Product Features
@@ -35,41 +42,41 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
- Supports three S/PDIF input/output channels
- Supports 2-channel S/PDIF input/output
**Interface Support Features**
- **Multiple Digital Interface Support**
- **Multiple digital interface support**
- Supports USB audio input
- Supports I²S slave mode audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio input/output
- Supports UART configuration interface
**USB Function Features**
**USB Functionality Features**
- **USB Interface Features**
- **USB interface features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
- Supports HID, MCU firmware can be upgraded via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Function Block Diagram
### 1.4 Product Functional Block Diagram
<figure markdown="span">
![HF87611 Block Diagram](/assets/images/hifi_audio/hf87611_diagram.png "HF87611 Block Diagram"){width="600"}
<figcaption>Figure 1: HF87611_VC1/HF87611Q_VC1 Function Block Diagram</figcaption>
<figcaption>Figure 1: HF87611_VC1/HF87611Q_VC1 Functional Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
@@ -82,15 +89,15 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
### 2.1 Supported Input/Output Modes
| Mode Number | Input-Output Mode | Description |Mode Switching Command Value (Reference Product Configuration Protocol 0x03 and 0x23 Command)|
| Mode Number | Input/Output Mode | Description |Mode Switching Command Value (Refer to Product Configuration Protocol Commands 0x03 and 0x23)|
|:--------:|:------------------------|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |0x00, 0x80, 0xa9, 0x00, 0x01|
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |0x00, 0x80, 0x01, 0x00, 0x02|
| 3 | S/PDIF1 IN-I²S(Master) OUT | S/PDIF channel 1 input, I²S output |0x10, 0x80, 0x65, 0x10, 0x03|
| 4 | S/PDIF2 IN-I²S(Master) OUT | S/PDIF channel 2 input, I²S output |0x00, 0x80, 0x65, 0x10, 0x04|
| 5 || USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0 |0x00, 0x80, 0xc5, 0x08, 0x05|
| 5 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0 |0x00, 0x80, 0xc5, 0x08, 0x05|
| 6 | I²S(slave) in-I²S(Master) OUT | I²S slave mode input, I²S output |0x00, 0x82, 0xd5, 0x81, 0x06|
### 2.2 Detailed Parameters for Each Operating Mode
@@ -104,7 +111,7 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF87611Q_VC1 model only |
| **MQA** | HF87611Q_VC1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
@@ -131,7 +138,7 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
| **USB Input** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz |
| **S/PDIF Output** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**SSRC (Synchronous Sample Rate Conversion) Function:**
**SSRC (Synchronous Sample Rate Conversion) Functionality:**
* Input sampling rate ≤ 192kHz: Output at original sampling rate
* Input sampling rate > 192kHz: Output at 192kHz after SSRC conversion
@@ -141,15 +148,7 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥140dB
#### 2.2.5 USB(UAC1.0) in → S/PDIF out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.6 I²S(slave) in → I²S(MASTER) out Mode
#### 2.2.5 I²S(slave) in → I²S(MASTER) out Mode
**Input/Output Sampling Rate Support:**
@@ -158,9 +157,9 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
| **I²S Input (Slave Mode)** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
| **I²S Output (Master Mode)** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**ASRC (Asynchronous Sample Rate Conversion) Function:**
**ASRC (Asynchronous Sample Rate Conversion) Functionality:**
* Internal ASRC conversion support, input device can omit providing master clock (MClock)
* Internal ASRC conversion supported, input device does not need to provide master clock (MClock)
**ASRC Performance Specifications:**
@@ -173,23 +172,23 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
<figure markdown="span">
![HF87611-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "HF87611-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF87611_VC1/HF87611Q_VC1 Pin Arrangement Diagram</figcaption>
<figcaption>Figure 2: HF87611_VC1/HF87611Q_VC1 Pin Layout Schematic</figcaption>
</figure>
### 3.2 HF87611_VC1/HF87611Q_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V Power Supply |
| 2 | X1D13 | I/O | S/PDIF Channel 1 Input |
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I/O | S/PDIF channel 1 input |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module Ground |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | S/PDIF Channel 2 Input |
| 8 | X1D22 | I/O | S/PDIF channel 2 input |
| 9 | X0D29 | I/O | NC |
| 10 | X0D35 | I/O | I²S_OUT_SCLK(MASTER) |
| 10 | X0D35 | I/O | I²S_OUT_BCLK(MASTER) |
| 11 | X0D36 | I/O | I²S_OUT_LRCLK(MASTER) |
| 12 | X0D37 | I/O | NC |
| 13 | X0D38 | I/O | I²S_OUT_DATA0(MASTER) |
@@ -198,57 +197,56 @@ HF87611_VC1/HF87611Q_VC1 provides multiple input and output modes, including USB
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | I/O | S/PDIF Output/S/PDIF Channel 3 Input |
| 20 | GND | P | Module Ground |
| 21 | X0D30 | I/O | NC |
| 19 | X1D34 | I/O | S/PDIF output |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | CTL_MUTE |
| 22 | X0D31 | I/O | NC |
| 23 | X0D32 | I/O | NC |
| 24 | X0D32 | I/O | NC |
| 25 | GND | P | Module Ground |
| 26 | GND | P | Module Ground |
| 27 | GND | P | Module Ground |
| 28 | X0D00 | I/O | UART_TX, connects to MCU_RX |
| 29 | X0D11 | I/O | UART_RX, connects to MCU_TX |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | UART_TX, connect to MCU_RX |
| 29 | X0D11 | I/O | UART_RX, connect to MCU_TX |
| 30 | X1D00 | I/O | I²S_IN_LRCLK(SLAVE) |
| 31 | X1D01 | I/O | I²S_IN_DATA0(SLAVE) |
| 32 | GND | P | Module Ground |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | I²S_IN_BCLK(SLAVE) |
| 35 | X1D11 | I/O | XU316 Internal Clock Output |
| 36 | GND | P | Module Ground |
| 37 | GND | P | Module Ground |
| 38 | TDI | I/O | XTAG Debug PIN |
| 39 | TDO | I/O | XTAG Debug PIN |
| 40 | TMS | I/O | XTAG Debug PIN |
| 41 | TCK | I/O | XTAG Debug PIN |
| 42 | RST_N | I/O | System Reset, Active Low |
| 43 | 1.8V | P | Module 1.8V Power Supply |
| 44 | GND | P | Module Ground |
| 35 | X1D11 | I/O | Connect to Pin 15 X0D39 |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug pin |
| 39 | TDO | I/O | XTAG debug pin |
| 40 | TMS | I/O | XTAG debug pin |
| 41 | TCK | I/O | XTAG debug pin |
| 42 | RST_N | I/O | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module Ground |
| 48 | 0.9V | P | Module 0.9V Power Supply |
| 49 | GND | P | Module Ground |
| 50 | GND | P | Module Ground |
| 51 | GND | P | Module Ground |
| 52 | GND | P | Module Ground |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O Type Definitions in Table: I=Input, O=Output, P=Power, I/O=Input/Output
I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
| Version | Date | Description | Revised By |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial Version Release | |
| V1.0 | 2025-05-07 | Initial release | |
| | | | |
| | | | |
## Consultation and Feedback
## 5. Inquiry and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>
</details>

219
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@@ -0,0 +1,219 @@
---
title: HF87621_VB1/HF87621Q_VB1 768KHz/DSD512 USB Multi-channel and Multi-interface HiFi Audio Decoder
description: HF87621_VB1/HF87621Q_VB1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
tags:
- Audio Decoder
- XMOS
- USB HiFi
- Multi-channel
- MQA
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# HF87621_VB1/HF87621Q_VB1
__Multi-channel PCM 768KHz/DSD512 USB HiFi Decoder with USB/I2S/3CH SPDIF Input and I2S Output__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
HF87621_VB1/HF87621Q_VB1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF87621_VB1/HF87621Q_VB1 supports various standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF and I²S interfaces. The flexible audio interfaces allow HF87621_VB1/HF87621Q_VB1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF87621_VB1/HF87621Q_VB1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, I²S(slave) input/I²S(master) output, meeting the requirements of different application scenarios.
!!! warning "Important Notice"
**HF87621Q_VB1 model supports MQA audio decoding, while HF87621_VB1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF87621Q_VB1 supports MQA decoding**
- Built-in SSRC and ASRC modules, support conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S slave mode audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio input
- Supports UART configuration interface
- Supports 3-channel S/PDIF input
**USB Functional Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, can upgrade MCU firmware via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems such as Windows, Linux, Android, macOS and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Block Diagram
<figure markdown="span">
![HF87621 Block Diagram](/assets/images/hifi_audio/HF87621_diagram.png "HF87621 Block Diagram"){width="600"}
<figcaption>Figure 1: HF87621_VB1/HF87621Q_VB1 Product Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| HF87621_VB1 | HF87621-VB1 | SMT STAMP-30 | 19x26mm | A316-1926-V1 | |
| HF87621Q_VB1 | HF87621Q-VB1 | SMT STAMP-30 | 19x26mm | A316-1926-V1 | **Supports MQA Decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input and Output Modes
| Mode Number | Input/Output Mode | Description |Mode Switch Command Value (Refer to Product Configuration Protocol 0x03 and 0x23 Commands)|
|:--------:|:------------------------|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |0x00, 0x80, 0xa9, 0x00, 0x01|
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |0x00, 0x80, 0x01, 0x00, 0x02|
| 3 | S/PDIF1 IN-I²S(Master) OUT | S/PDIF channel 1 input, I²S output |0x10, 0x80, 0x65, 0x10, 0x03|
| 4 | S/PDIF2 IN-I²S(Master) OUT | S/PDIF channel 2 input, I²S output |0x00, 0x80, 0x65, 0x10, 0x04|
| 5 | S/PDIF3 IN-I²S(Master) OUT | S/PDIF channel 3 input, I²S output |0x00, 0x80, 0xc5, 0x08, 0x05|
| 6 | I²S(slave) in-I²S(Master) OUT | I²S slave mode input, I²S output |0x00, 0x82, 0xd5, 0x81, 0x06|
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF87621Q_VB1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 S/PDIF in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
#### 2.2.4 I²S(slave) in → I²S(Master) out Mode
**Input/Output Sampling Rate Support:**
| Interface | Audio Format | Supported Sampling Rates |
|:-----|:---------|:-------------|
| **I²S Input (Slave Mode)** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
| **I²S Output (Master Mode)** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**ASRC (Asynchronous Sample Rate Conversion) Function:**
* Internal ASRC conversion supported, input device may not provide master clock (MClock)
**ASRC Performance Specifications:**
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥135dB
## 3. Pin Configuration and Functions
### 3.1 HF87621_VB1/HF87621Q_VB1 Pin Layout
<figure markdown="span">
![HF87621-VB1 Pin Diagram](/assets/images/hifi_audio/a316_1926v1_module_pin_define.png "HF87621-VB1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF87621-VB1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 HF87621_VB1/HF87621Q_VB1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | GND | P | Module Ground |
| 2 | 3V3 | P | Module 3.3V Power Supply |
| 3 | X1D11 | I/O | Connect to Pin 16 MCLK |
| 4 | X1D10 | I/O | I²S_IN_BCLK(SLAVE) |
| 5 | X1D09 | I/O | NC |
| 6 | X1D01 | I/O | I²S_IN_DATA0(SLAVE) |
| 7 | X1D00 | I/O | I²S_IN_LRCLK(SLAVE) |
| 8 | X0D11 | I/O | UART_RX, connect to MCU_TX |
| 9 | X0D00 | I/O | UART_TX, connect to MCU_RX |
| 10 | X0D31 | I/O | NC |
| 11 | X0D30 | I/O | CTL_MUTE |
| 12 | X1D34 | I/O | S/PDIF channel 3 input |
| 13 | X0D43 | I/O | NC |
| 14 | X0D41 | I/O | NC |
| 15 | X0D42 | I/O | NC |
| 16 | MCLK | I/O | Active crystal 49.152/45.1584MHz clock output |
| 17 | X0D40 | I/O | NC |
| 18 | X0D38 | I/O | I²S_OUT_DATA0(Master) |
| 19 | X0D37 | I/O | NC |
| 20 | X0D36 | I/O | I²S_OUT_LRCLK(Master) |
| 21 | X0D35 | I/O | I²S_OUT_BCLK(MASTER) |
| 22 | X0D29 | I/O | NC |
| 23 | X1D22 | I/O | S/PDIF channel 2 input |
| 24 | X1D19 | I/O | NC |
| 25 | X1D16 | I/O | NC |
| 26 | USB_DP | I/O | USB Data Positive |
| 27 | USB_DM | I/O | USB Data Negative |
| 28 | X1D18 | I/O | NC |
| 29 | X1D17 | I/O | NC |
| 30 | X1D13 | I/O | S/PDIF channel 1 input |
!!! info "Pin Type Description"
- I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:---------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-09-19 | Initial Release | |
| | | | |
| | | | |
## 5. Consultation & Feedback
<details>
<summary>Click to Expand Consultation & Feedback Form</summary>
--8<-- "common/customer_form.md"
</details>

233
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---
title: HF87621_VC1/HF87621Q_VC1 768KHz/DSD512 USB Multi-channel and Multi-interface HiFi Audio Decoder
description: HF87621_VC1/HF87621Q_VC1 High-Performance Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# HF87621_VC1/HF87621Q_VC1
__Multi-channel PCM 768KHz/DSD512 USB HiFi Decoder with USB/I2S/3CH SPDIF Input and I2S Output__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
HF87621_VC1/HF87621Q_VC1 is a USB multi-channel and multi-interface HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for HiFi decoder audio applications.
HF87621_VC1/HF87621Q_VC1 supports various standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF and I²S interfaces. The flexible audio interfaces allow HF87621_VC1/HF87621Q_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
HF87621_VC1/HF87621Q_VC1 provides multiple input and output modes, including USB input/I²S output, S/PDIF input/I²S output, I²S(slave) input/I²S(MASTER) output, meeting the requirements of different application scenarios.
!!! warning "Important Notice"
**HF87621Q_VC1 model supports MQA audio decoding, while HF87621_VC1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **HF87621Q_VC1 supports MQA decoding**
- Built-in SSRC and ASRC modules, support conversion between different interfaces and different sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
- Supports 3-channel S/PDIF input
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S slave mode audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio input
- Supports UART configuration interface
**USB Functional Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, can upgrade MCU firmware via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems such as Windows, Linux, Android, macOS and iOS
### 1.3 Application Scenarios
- USB HiFi Decoder
- USB HiFi Audio Interface
- USB HiFi Digital Player
### 1.4 Product Block Diagram
<figure markdown="span">
![HF87621 Block Diagram](/assets/images/hifi_audio/HF87621_diagram.png "HF87621 Block Diagram"){width="600"}
<figcaption>Figure 1: HF87621_VC1/HF87621Q_VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| HF87621_VC1 | HF87621-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | |
| HF87621Q_VC1 | HF87621Q-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 |**Supports MQA Decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input and Output Modes
| Mode Number | Input/Output Mode | Description |Mode Switch Command Value (Refer to Product Configuration Protocol 0x03 and 0x23 Commands)|
|:--------:|:------------------------|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |0x00, 0x80, 0xa9, 0x00, 0x01|
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |0x00, 0x80, 0x01, 0x00, 0x02|
| 3 | S/PDIF1 IN-I²S(Master) OUT | S/PDIF channel 1 input, I²S output |0x10, 0x80, 0x65, 0x10, 0x03|
| 4 | S/PDIF2 IN-I²S(Master) OUT | S/PDIF channel 2 input, I²S output |0x00, 0x80, 0x65, 0x10, 0x04|
| 5 | S/PDIF3 IN-I²S(Master) OUT | S/PDIF channel 3 input, I²S output |0x00, 0x80, 0xc5, 0x08, 0x05|
| 6 | I²S(slave) in-I²S(Master) OUT | I²S slave mode input, I²S output |0x00, 0x82, 0xd5, 0x81, 0x06|
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | HF87621Q_VC1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 S/PDIF in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
#### 2.2.4 I²S(slave) in → I²S(MASTER) out Mode
**Input/Output Sampling Rate Support:**
| Interface | Audio Format | Supported Sampling Rates |
|:-----|:---------|:-------------|
| **I²S Input (Slave Mode)** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
| **I²S Output (Master Mode)** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**ASRC (Asynchronous Sample Rate Conversion) Function:**
* Internal ASRC conversion supported, input device may not provide master clock (MClock)
**ASRC Performance Specifications:**
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥135dB
## 3. Pin Configuration and Functions
### 3.1 HF87621_VC1/HF87621Q_VC1 Pin Layout
<figure markdown="span">
![HF87621-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "HF87621-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: HF87621_VC1/HF87621Q_VC1 Pin Arrangement Diagram</figcaption>
</figure>
### 3.2 HF87621_VC1/HF87621Q_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V Power Supply |
| 2 | X1D13 | I/O | S/PDIF channel 1 input |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module Ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | S/PDIF channel 2 input |
| 9 | X0D29 | I/O | NC |
| 10 | X0D35 | I/O | I²S_OUT_BCLK(MASTER) |
| 11 | X0D36 | I/O | I²S_OUT_LRCLK(MASTER) |
| 12 | X0D37 | I/O | NC |
| 13 | X0D38 | I/O | I²S_OUT_DATA0(MASTER) |
| 14 | X0D40 | I/O | NC |
| 15 | X0D39 | I/O | I²S_OUT_MCLK(MASTER) |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | I/O | S/PDIF channel 3 input |
| 20 | GND | P | Module Ground |
| 21 | X0D30 | I/O | CTL_MUTE |
| 22 | X0D31 | I/O | NC |
| 23 | X0D32 | I/O | NC |
| 24 | X0D32 | I/O | NC |
| 25 | GND | P | Module Ground |
| 26 | GND | P | Module Ground |
| 27 | GND | P | Module Ground |
| 28 | X0D00 | I/O | UART_TX, connect to MCU_RX |
| 29 | X0D11 | I/O | UART_RX, connect to MCU_TX |
| 30 | X1D00 | I/O | I²S_IN_LRCLK(SLAVE) |
| 31 | X1D01 | I/O | I²S_IN_DATA0(SLAVE) |
| 32 | GND | P | Module Ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | I²S_IN_BCLK(SLAVE) |
| 35 | X1D11 | I/O | Connect to Pin 15 X0D39 |
| 36 | GND | P | Module Ground |
| 37 | GND | P | Module Ground |
| 38 | TDI | I/O | XTAG Debug PIN |
| 39 | TDO | I/O | XTAG Debug PIN |
| 40 | TMS | I/O | XTAG Debug PIN |
| 41 | TCK | I/O | XTAG Debug PIN |
| 42 | RST_N | I/O | System reset, active low |
| 43 | 1.8V | P | Module 1.8V Power Supply |
| 44 | GND | P | Module Ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module Ground |
| 48 | 0.9V | P | Module 0.9V Power Supply |
| 49 | GND | P | Module Ground |
| 50 | GND | P | Module Ground |
| 51 | GND | P | Module Ground |
| 52 | GND | P | Module Ground |
!!! info "Pin Type Description"
I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:---------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-09-19 | Initial Release | |
| | | | |
| | | | |
## 5. Consultation & Feedback
<details>
<summary>Click to Expand Consultation & Feedback Form</summary>
--8<-- "common/customer_form.md"
</details>

389
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@@ -0,0 +1,389 @@
---
title: XMAU7118-VC1 16-Channel PDM to I²S/TDM Audio Converter with Dual PDM Clock Outputs and UART/I²C Configuration Interface
description: XMAU7118-VC1 16-Channel PDM to I²S/TDM Audio Converter Datasheet
author: Technical Documentation Department
date: 2025-01-15
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# XMAU7118-VC1
__16-Channel PDM to I²S/TDM Audio Converter with Dual PDM Clock Outputs and UART/I²C Configuration Interface__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
XMAU7118 is a professional-grade 16-channel PDM to I²S/TDM audio converter developed based on XMOS high-performance chips, designed specifically for digital microphone array applications. This product supports 16-channel PDM digital microphone inputs, providing 32-bit audio resolution and exceptional audio performance.
- The product integrates powerful digital signal processing capabilities, supporting simultaneous input from 16 PDM microphones, with output sampling rates ranging from 4kHz to 192kHz, meeting the requirements of various audio acquisition application scenarios.
- It supports standard I²S and TDM audio output formats, providing 8 independent SDATA output channels, and can operate in Master or Slave mode, offering extremely high flexibility for system integration.
- The product features excellent audio performance specifications, with THD+N less than -110dB and dynamic range up to 140dB. Complete parameter configuration is achieved through UART/I²C interface, providing audio equipment manufacturers with a professional-grade multi-channel audio acquisition solution.
### 1.2 Product Features
<div class="grid cards" markdown>
- :material-microphone-variant:{ .lg .middle } __Multi-Channel Audio Processing Capability__
---
**16-Channel PDM Digital Microphone Input**
- Supports simultaneous input from 16 PDM digital microphones
- Provides 32-bit audio resolution processing precision
- Achieves <-110dB THD+N and 140dB dynamic range
**Flexible Sampling Rate Configuration**
- Output sampling rate covers 4kHz to 192kHz range
- Automatically detects and adapts to different sampling rates
- Supports sampling rate configuration via I²C/UART interface
- :material-clock-fast:{ .lg .middle } __Intelligent Clock Management__
---
**Integrated PDM Clock Output Function (PDM_CLK)**
- Clock frequency: 3.072MHz (typical)
- Can drive 16 PDM microphones
- Single clock design simplifies routing
**Supports Automatic PDM Clock Generation Mechanism**
- No external clock source required
- Automatic clock synchronization
- :material-waveform:{ .lg .middle } __Standard Audio Output Interface__
---
**Supports I²S and TDM Audio Output Formats**
- Standard I²S format support
- TDM multi-channel format support
- 8 independent SDATA output channels
**Supports Master/Slave Operating Modes**
- I²S Master mode
- I²S Slave mode
- TDM Master mode
- TDM Slave mode
- :material-cog:{ .lg .middle } __Flexible Configuration Interface__
---
**I²C/UART Configuration Interface**
- Select interface type via pin pull-up/pull-down
- Pull-up: UART mode
- Pull-down: I²C mode
**Configurable Parameters**
- I²S/TDM format switching
- Sampling rate configuration (4kHz~192kHz)
- Master/Slave mode switching
- Dynamic switching between multiple operating modes
</div>
### 1.3 Application Scenarios
<div class="grid cards" markdown>
- :material-speaker:{ .lg .middle } __Smart Speakers and Voice Assistant Systems__
---
- Far-field pickup arrays in smart speakers
- Multi-microphone noise reduction in voice assistant devices
- Voice recognition in smart home control centers
- :material-video:{ .lg .middle } __Professional Conference and Video Communication Equipment__
---
- Multi-point pickup in video conferencing systems
- Omnidirectional pickup in remote collaboration devices
- Array microphone processing in conference phones
- :material-factory:{ .lg .middle } __Industrial Audio Monitoring and Security Systems__
---
- Multi-point acquisition in industrial equipment acoustic monitoring
- Sound source localization in security systems
- Multi-channel acquisition in environmental noise monitoring
- :material-car:{ .lg .middle } __Automotive Audio and In-Vehicle Communication Systems__
---
- Microphone arrays in in-vehicle voice recognition systems
- Multi-microphone processing in in-vehicle call noise reduction
- Voice interaction in smart cockpits
</div>
### 1.4 Product Functional Block Diagram
<figure markdown="span">
![XMAU7118 Block Diagram](/assets/images/hifi_audio/xmau7118_diagram.png "XMAU7118-VC1 Block Diagram"){width=700}
<figcaption>Figure 1: XMAU7118-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| XMAU7118-VC1 | XMAU7118-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | 16-channel PDM to I²S/TDM audio converter, supports 4kHz~192kHz sampling rate, 8-channel SDATA output |
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
XMAU7118-VC1 supports 4 operating modes, which can be configured and switched via I²C/UART interface:
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | 16-Channel PDM In → I²S Master Out (8 SDATA) | 16-channel PDM microphone input, I²S Master mode output, 8 independent SDATA outputs |
| 2 | 16-Channel PDM In → I²S Slave Out (8 SDATA) | 16-channel PDM microphone input, I²S Slave mode output, 8 independent SDATA outputs |
| 3 | 16-Channel PDM In → TDM Master Out | 16-channel PDM microphone input, TDM Master mode output |
| 4 | 16-Channel PDM In → TDM Slave Out | 16-channel PDM microphone input, TDM Slave mode output |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 Mode 1: 16-Channel PDM → I²S Master Output Mode
**Input/Output Parameters:**
| Parameter | Input | Output |
|:---------|:-------------|:-------------|
| **Interface** | PDM (16 channels) | I²S Master (8 SDATA) |
| **Audio Format** | PDM | PCM |
| **Sampling Rate** | - | 4kHz~192kHz (configurable) |
| **Bit Depth** | - | 32bit |
| **Channels** | 16 | 16 (2 channels per SDATA output) |
**PDM Clock Configuration:**
- PDM_CLK: 3.072MHz (typical)
- PDM_CLK can connect to 16 PDM microphones
- Single clock design simplifies routing
#### 2.2.2 Mode 2: 16-Channel PDM → I²S Slave Output Mode
**Input/Output Parameters:**
| Parameter | Input | Output |
|:---------|:-------------|:-------------|
| **Interface** | PDM (16 channels) | I²S Slave (8 SDATA) |
| **Audio Format** | PDM | PCM |
| **Sampling Rate** | - | 4kHz~192kHz (provided by external master device) |
| **Bit Depth** | - | 32bit |
| **Channels** | 16 | 16 (2 channels per SDATA output) |
#### 2.2.3 Mode 3: 16-Channel PDM → TDM Master Output Mode
**Input/Output Parameters:**
| Parameter | Input | Output |
|:---------|:-------------|:-------------|
| **Interface** | PDM (16 channels) | TDM Master |
| **Audio Format** | PDM | PCM |
| **Sampling Rate** | - | 4kHz~192kHz (configurable) |
| **Bit Depth** | - | 32bit |
| **Channels** | 16 | 16 (TDM time-division multiplexing) |
|
#### 2.2.4 Mode 4: 16-Channel PDM → TDM Slave Output Mode
**Input/Output Parameters:**
| Parameter | Input | Output |
|:---------|:-------------|:-------------|
| **Interface** | PDM (16 channels) | TDM Slave |
| **Audio Format** | PDM | PCM |
| **Sampling Rate** | - | 4kHz~192kHz (provided by external master device) |
| **Bit Depth** | - | 32bit |
| **Channels** | 16 | 16 (TDM time-division multiplexing) |
### 2.3 Audio Performance Specifications
| Performance Specification | Specification | Notes |
|:---------|:-----|:-----|
| THD+N | < -110dB | @1kHz, 0dBFS |
| Dynamic Range | 140dB | A-weighted |
| Audio Resolution | 32bit | - |
| Sampling Rate Range | 4kHz~192kHz | Configurable |
| PDM Input Channels | 16 | - |
| I²S/TDM Output Channels | 16 | - |
### 2.4 Feature Comparison
!!! info ""
<div class="sticky-column" markdown>
| Feature | XMAU7118 | ADAU7118 | Advantage |
|:-----:|:--------:|:-------:|:----:|
| PDM Input Channels | 16 channels | 8 channels | 2x channel count |
| Audio Sampling Rate and Bit Depth | 4KHz~192KHz/32bit | 4KHz~192KHz/24bit | Higher bit depth |
| Dynamic Range | 140dB | 126dB | 14dB improvement |
| Control Interface | UART+I²C | I²C | More control interfaces |
| I²S Operating Mode | Master/Slave | Slave | More operating modes |
</div>
## 3. Pin Configuration and Functions
### 3.1 XMAU7118_VC1 Pin Layout
<figure markdown="span">
![XMAU7118-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "XMAU7118-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: XMAU7118_VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 XMAU7118_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | O | TDM_OUT2 (TDM data output 2) |
| 3 | X1D16 | - | Reserved |
| 4 | GND | P | Module ground |
| 5 | X1D17 | - | Reserved |
| 6 | X1D18 | - | Reserved |
| 7 | X1D19 | - | Reserved |
| 8 | X1D22 | I/O | UART_RX/I2C_SDA (UART receive/I2C data) |
| 9 | X0D29 | - | Reserved |
| 10 | X0D35 | O | PDM_CLK (PDM clock output) |
| 11 | X0D36 | I | PDM_DATA1_2 (PDM microphone 1 and 2 data input) |
| 12 | X0D37 | I | PDM_DATA3_4 (PDM microphone 3 and 4 data input) |
| 13 | X0D38 | I | PDM_DATA5_6 (PDM microphone 5 and 6 data input) |
| 14 | X0D40 | I | PDM_DATA9_10 (PDM microphone 9 and 10 data input) |
| 15 | X0D39 | I | PDM_DATA7_8 (PDM microphone 7 and 8 data input) |
| 16 | X0D42 | I | PDM_DATA13_14 (PDM microphone 13 and 14 data input) |
| 17 | X0D41 | I | PDM_DATA11_12 (PDM microphone 11 and 12 data input) |
| 18 | X0D43 | I | PDM_DATA15_16 (PDM microphone 15 and 16 data input) |
| 19 | X1D34 | I/O | UART_TX'/I2C_SCL (UART transmit/I2C clock) |
| 20 | GND | P | Module ground |
| 21 | X0D30 | - | Reserved |
| 22 | X0D31 | - | Reserved |
| 23 | X0D32 | - | Reserved |
| 24 | X0D33 | - | Reserved |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | - | Reserved |
| 29 | X0D11 | O | MCLK (Master clock output) |
| 30 | X1D00 | O | TDM_LRCK (TDM frame sync) |
| 31 | X1D01 | O | TDM_OUT1 (TDM data output 1) |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | UART_I2C_SEL (UART/I2C selection) |
| 34 | X1D10 | O | TDM_BCLK (TDM bit clock) |
| 35 | X1D11 | O | MCLK (Master clock output) |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug pin |
| 39 | TDO | I/O | XTAG debug pin |
| 40 | TMS | I/O | XTAG debug pin |
| 41 | TCK | I/O | XTAG debug pin |
| 42 | RST_N | I | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM (Reserved, not used) |
| 46 | USB_DP | I/O | USB_DP (Reserved, not used) |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Definitions"
I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
!!! warning "Important Notes"
- PDM_CLK output frequency is 3.072MHz (typical), can connect to 16 PDM microphones
- Pin 8 (X1D22) and Pin 19 (X1D34) are UART/I2C communication interfaces
- Pin 33 (X1D09) is used to select UART or I2C mode
- Pin 29 (X0D11) and Pin 35 (X1D11) are both MCLK master clock outputs
- USB_DM and USB_DP are reserved pins, not used in current version
## 4. Configuration Interface Description
### 4.1 I²C/UART Interface Selection
The interface type is selected via pull-up/pull-down resistor configuration on Pin 33 (X1D09):
| Configuration | Pin 33 (X1D09) | Communication Interface | Description |
|:--------|:-------------|:---------|:-----|
| Pull-up | UART_I2C_SEL | UART mode | Pin 8 (X1D22)=UART_RX, Pin 19 (X1D34)=UART_TX |
| Pull-down | UART_I2C_SEL | I²C mode | Pin 8 (X1D22)=I2C_SDA, Pin 19 (X1D34)=I2C_SCL |
### 4.2 Configurable Parameters
The following parameters can be configured via I²C or UART interface:
| Parameter Type | Configuration Options | Description |
|:--------|:---------|:-----|
| Output Format | I²S / TDM | Select I²S or TDM output format |
| Operating Mode | Master / Slave | Select Master or Slave operating mode |
| Sampling Rate | 4kHz~192kHz | Configure output sampling rate |
!!! note "Configuration Notes"
- All configurations take effect after system reset
- For detailed configuration commands, please refer to the configuration protocol documentation
## 5. Hardware Parameters
### 5.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 5.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 5.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption>Figure 3: A316-Mini-V1 Package Diagram</figcaption>
</figure>
## 6. Minimal System Reference Design
<figure markdown="span">
![A316-Mini-V1 Minimal System Reference Design](/assets/download/a316_mini_v1/a316_mini_v1_mini_ref_design.png "A316-Mini-V1 Minimal System Reference Design"){width=800}
<figcaption></figcaption>
</figure>
## 7. Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 8. Revision History
| Version | Date | Description | Revised By |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-01-15 | Initial version release | |
| | | | |
## 9. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

68
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@@ -20,12 +20,12 @@ tags:
PH73211L_VC1/PH73211LQ_VC1 is a USB low-power HiFi audio decoder supporting up to PCM 384KHz/DSD256, specifically designed for portable HiFi decoder audio applications.
PH73211L_VC1/PH73211LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0 and I²S interface. The flexible audio interface allows PH73211L_VC1/PH73211LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, as well as digital signal processors.
PH73211L_VC1/PH73211LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0 and I²S interfaces. The flexible audio interface allows PH73211L_VC1/PH73211LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requirements of high-quality audio application scenarios.
!!! warning "Important Note"
**The PH73211LQ_VC1 model supports MQA audio decoding, while the PH73211L_VC1 model does not support this feature.**
!!! warning "Important Notice"
**PH73211LQ_VC1 model supports MQA audio decoding, while PH73211L_VC1 model does not support this feature.**
### 1.2 Product Features
@@ -34,7 +34,7 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
- Supports input and output sampling rates up to 384kHz
- Supports DSD64/128/256 formats
- **PH73211LQ_VC1 supports MQA decoding**
- Built-in SSRC and ASRC modules, supporting conversion between different interfaces and sampling rates
- Built-in SSRC and ASRC modules supporting conversion between different interfaces and sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
@@ -46,18 +46,18 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
- Supports I²S master mode audio output
- Supports UART configuration interface
**USB Features**
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
- Supports HID for MCU firmware upgrade
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
- UAC 2.0 protocol with ASIO support
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
@@ -75,7 +75,7 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| PH73211L_VC1 | PH73211L-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | |
| PH73211LQ_VC1 | PH73211LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA decoding**|
| PH73211LQ_VC1 | PH73211LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA Decoding**|
## 2. Modes and Specifications
@@ -84,8 +84,8 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0, maximum support for 384KHz/DSD256 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0, fixed at 48KHz |
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0, supports up to 384KHz/DSD256 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0, fixed 48KHz |
### 2.2 Detailed Parameters for Each Operating Mode
@@ -98,7 +98,7 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz |
| **DSD Native** | DSD64, DSD128, DSD256 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | Only supported by PH73211LQ_VC1 |
| **MQA** | PH73211LQ_VC1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
@@ -108,13 +108,13 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
|:---------|:-------------|
| **PCM** | 48kHz |
## 3. Pin Configuration and Function
## 3. Pin Configuration and Functions
### 3.1 PH73211L_VC1/PH73211LQ_VC1 Pin Layout
<figure markdown="span">
![PH73211L-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "PH73211L-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: PH73211L-VC1 Pin Layout Diagram</figcaption>
<figcaption>Figure 2: PH73211L-VC1 Pin Layout Schematic</figcaption>
</figure>
### 3.2 PH73211L_VC1/PH73211LQ_VC1 Pin Description
@@ -180,17 +180,47 @@ PH73211L_VC1/PH73211LQ_VC1 provides USB input/I²S output mode, meeting the requ
## 4. Revision History
| Version | Date | Description | Revised by |
| Version | Date | Description | Revised By |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial version release | |
| V1.0 | 2025-05-07 | Initial release | |
| | | | |
| | | | |
## Consultation and Feedback
## 5. Inquiry and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>
</details>
<!--
## Technical Specifications
### Audio Specifications
- Sampling rate: 44.1kHz, 48kHz, 88.2kHz, 96kHz
- Bit depth: 16/24/32bit
- Signal-to-noise ratio: >110dB
- Total harmonic distortion: <0.001%
### Interfaces
- USB Type-C interface
- 3.5mm audio output interface
### Power Requirements
- USB power supply: 5V
- Power consumption: <100mA
## Application Scenarios
- Portable audio devices
- External sound card for laptops
- Mobile device audio extension
## Technical Support
For technical support, please contact our technical support team:
- Email: support@phaten-audio.com
- Phone: +86-755-XXXXXXXX -->

69
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View File

@@ -20,14 +20,14 @@ tags:
PH73311L_VC1/PH73311LQ_VC1 is a USB low-power HiFi audio decoder supporting up to PCM 384KHz/DSD256, specifically designed for portable HiFi decoder audio applications.
PH73311L_VC1/PH73311LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interface allows PH73311L_VC1/PH73311LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, as well as digital signal processors.
PH73311L_VC1/PH73311LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interface allows PH73311L_VC1/PH73311LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB input/I²S output and USB input/S/PDIF output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The PH73311LQ_VC1 model supports MQA audio decoding, while the PH73311L_VC1 model does not support this feature.**
!!! warning "Important Notice"
**PH73311LQ_VC1 model supports MQA audio decoding, while PH73311L_VC1 model does not support this feature.**
### 1.2 Product Features
@@ -36,7 +36,7 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
- Supports input and output sampling rates up to 384kHz
- Supports DSD64/128/256 formats
- **PH73311LQ_VC1 supports MQA decoding**
- Built-in SSRC and ASRC modules, supporting conversion between different interfaces and sampling rates
- Built-in SSRC and ASRC modules supporting conversion between different interfaces and sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- ASRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 135dB
- Supports 16-32bit audio data formats
@@ -49,18 +49,18 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
- Supports S/PDIF audio output
- Supports UART configuration interface
**USB Features**
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
- Supports HID for MCU firmware upgrade
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
- UAC 2.0 protocol with ASIO support
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
@@ -80,7 +80,7 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| PH73311L_VC1 | PH73311L-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | |
| PH73311LQ_VC1 | PH73311LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA decoding**|
| PH73311LQ_VC1 | PH73311LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA Decoding**|
## 2. Modes and Specifications
@@ -89,9 +89,9 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0, maximum support for 384KHz/DSD256 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0, fixed at 48KHz |
| 3 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0, maximum input 384KHz, output 192KHz |
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0, supports up to 384KHz/DSD256 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0, fixed 48KHz |
| 3 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0, max input 384KHz, output 192KHz |
### 2.2 Detailed Parameters for Each Operating Mode
@@ -104,7 +104,7 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz |
| **DSD Native** | DSD64, DSD128, DSD256 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | Only supported by PH73311LQ_VC1 |
| **MQA** | PH73311LQ_VC1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
@@ -141,13 +141,13 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
|:---------|:-------------|
| **PCM** | 48kHz |
## 3. Pin Configuration and Function
## 3. Pin Configuration and Functions
### 3.1 PH73311L_VC1/PH73311LQ_VC1 Pin Layout
<figure markdown="span">
![PH73311L-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "PH73311L-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: PH73311L-VC1 Pin Layout Diagram</figcaption>
<figcaption>Figure 2: PH73311L-VC1 Pin Layout Schematic</figcaption>
</figure>
### 3.2 PH73311L_VC1/PH73311LQ_VC1 Pin Description
@@ -213,17 +213,44 @@ PH73311L_VC1/PH73311LQ_VC1 provides multiple input/output modes, including USB i
## 4. Revision History
| Version | Date | Description | Revised by |
| Version | Date | Description | Revised By |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial version release | |
| V1.0 | 2025-05-07 | Initial release | |
| | | | |
| | | | |
## Consultation and Feedback
## 5. Inquiry and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>
</details>
<!-- ## Technical Specifications
### Audio Specifications
- Sampling rate: 44.1kHz, 48kHz, 88.2kHz, 96kHz
- Bit depth: 16/24/32bit
- Signal-to-noise ratio: >110dB
- Total harmonic distortion: <0.001%
### Interfaces
- USB Type-C interface
- 3.5mm audio output interface
### Power Requirements
- USB power supply: 5V
- Power consumption: <100mA
## Application Scenarios
- Portable audio devices
- External sound card for laptops
- Mobile device audio extension
## Technical Support
For technical support, please contact our technical support team:
- Email: support@phaten-audio.com
- Phone: +86-755-XXXXXXXX -->

63
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View File

@@ -20,12 +20,12 @@ tags:
PH83211L_VC1/PH83211LQ_VC1 is a USB low-power HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for portable HiFi decoder audio applications.
PH83211L_VC1/PH83211LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0 and I²S interface. The flexible audio interface allows PH83211L_VC1/PH83211LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, as well as digital signal processors.
PH83211L_VC1/PH83211LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0 and I²S interfaces. The flexible audio interface allows PH83211L_VC1/PH83211LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, and digital signal processors.
PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requirements of high-quality audio application scenarios.
!!! warning "Important Note"
**The PH83211LQ_VC1 model supports MQA audio decoding, while the PH83211L_VC1 model does not support this feature.**
!!! warning "Important Notice"
**PH83211LQ_VC1 model supports MQA audio decoding, while PH83211L_VC1 model does not support this feature.**
### 1.2 Product Features
@@ -34,7 +34,7 @@ PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requ
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **PH83211LQ_VC1 supports MQA decoding**
- Built-in SSRC module, supporting conversion between different interfaces and sampling rates
- Built-in SSRC module supporting conversion between different interfaces and sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- Supports 16-32bit audio data formats
@@ -45,18 +45,18 @@ PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requ
- Supports I²S master mode audio output
- Supports UART configuration interface
**USB Features**
**USB Function Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
- Supports HID for MCU firmware upgrade
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
- UAC 2.0 protocol with ASIO support
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
@@ -74,7 +74,7 @@ PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requ
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| PH83211L_VC1 | PH83211L-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | |
| PH83211LQ_VC1 | PH83211LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA decoding**|
| PH83211LQ_VC1 | PH83211LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA Decoding**|
## 2. Modes and Specifications
@@ -97,7 +97,7 @@ PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requ
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | Only supported by PH83211LQ_VC1 |
| **MQA** | PH83211LQ_VC1 only |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
@@ -107,13 +107,13 @@ PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requ
|:---------|:-------------|
| **PCM** | 48kHz |
## 3. Pin Configuration and Function
## 3. Pin Configuration and Functions
### 3.1 PH83211L_VC1/PH83211LQ_VC1 Pin Layout
<figure markdown="span">
![PH83211L-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "PH83211L-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: PH83211L-VC1 Pin Layout Diagram</figcaption>
<figcaption>Figure 2: PH83211L-VC1 Pin Layout Schematic</figcaption>
</figure>
### 3.2 PH83211L_VC1/PH83211LQ_VC1 Pin Description
@@ -179,17 +179,44 @@ PH83211L_VC1/PH83211LQ_VC1 provides USB input/I²S output mode, meeting the requ
## 4. Revision History
| Version | Date | Description | Revised by |
| Version | Date | Description | Revised By |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial version release | |
| V1.0 | 2025-05-07 | Initial release | |
| | | | |
| | | | |
## Consultation and Feedback
## 5. Inquiry and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>
</details>
<!-- ## Technical Specifications
### Audio Specifications
- Sampling rate: 44.1kHz, 48kHz, 88.2kHz, 96kHz
- Bit depth: 16/24/32bit
- Signal-to-noise ratio: >110dB
- Total harmonic distortion: <0.001%
### Interfaces
- USB Type-C interface
- 3.5mm audio output interface
### Power Requirements
- USB power supply: 5V
- Power consumption: <100mA
## Application Scenarios
- Portable audio devices
- External sound card for laptops
- Mobile device audio extension
## Technical Support
For technical support, please contact our technical support team:
- Email: support@phaten-audio.com
- Phone: +86-755-XXXXXXXX -->

226
en/docs/dev_doc/datasheet/std_product/phifi_audio/ph83311l_vc1.md
View File

@@ -1,226 +0,0 @@
---
title: PH83311L_VC1/PH83311LQ_VC1 768KHz/DSD512 USB Low-Power HiFi Audio Decoder
description: PH83311L_VC1/PH83311LQ_VC1 Low-Power Audio Decoder Technical Documentation
author: Technical Documentation Department
date: 2025-05-07
print_page: true
tags:
- Audio Decoder
- XMOS
- USB HiFi
- MQA
---
# PH83311L_VC1/PH83311LQ_VC1 768KHz/DSD512 USB Low-Power HiFi Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
## 1. Introduction
### 1.1 Product Description
PH83311L_VC1/PH83311LQ_VC1 is a USB low-power HiFi audio decoder supporting up to PCM 768KHz/DSD512, specifically designed for portable HiFi decoder audio applications.
PH83311L_VC1/PH83311LQ_VC1 supports multiple standard audio formats, including USB Audio Class 1.0/2.0, S/PDIF, and I²S interfaces. The flexible audio interface allows PH83311L_VC1/PH83311LQ_VC1 to connect to various audio data converters, digital audio receivers and transmitters, as well as digital signal processors.
Compatible with AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 digital audio interfaces.
PH83311L_VC1/PH83311LQ_VC1 provides multiple input/output modes, including USB input/I²S output and USB input/S/PDIF output, meeting the requirements of different application scenarios.
!!! warning "Important Note"
**The PH83311LQ_VC1 model supports MQA audio decoding, while the PH83311L_VC1 model does not support this feature.**
### 1.2 Product Features
**Audio Performance Features**
- Supports input and output sampling rates up to 768kHz
- Supports DSD64/128/256/512 formats
- **PH83311LQ_VC1 supports MQA decoding**
- Built-in SSRC module, supporting conversion between different interfaces and sampling rates
- SSRC specifications: THD+N (@1kHz, 0dBFs) < -130dB, SNR: > 140dB
- Supports 16-32bit audio data formats
**Interface Support Features**
- **Multiple Digital Interface Support**
- Supports USB audio input
- Supports I²S master mode audio output
- Supports S/PDIF audio output
- Supports UART configuration interface
**USB Features**
- **USB Interface Features**
- Supports UAC 1.0
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports HID, allowing MCU firmware upgrade via HID
**System Compatibility**
- UAC 2.0 protocol, supports ASIO
- Supports multiple operating systems, such as Windows, Linux, Android, macOS, and iOS
### 1.3 Application Scenarios
- USB Low-Power HiFi Decoder (USB Portable HiFi Decoder)
### 1.4 Product Function Block Diagram
<figure markdown="span">
![PH83311L Block Diagram](/assets/images/hifi_audio/ph83311l_diagram.png "PH83311L Block Diagram"){width="600"}
<figcaption>Figure 1: PH83311L_VC1/PH83311LQ_VC1 Product Function Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| PH83311L_VC1 | PH83311L-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | |
| PH83311LQ_VC1 | PH83311LQ-VC1 | SMT STAMP-30 | 13x13mm | A316-Mini-V1 | **Supports MQA decoding**|
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) in-I²S(Master) out | USB input, I²S output, UAC2.0 |
| 2 | USB(UAC1.0) in-I²S(Master) out | USB input, I²S output, UAC1.0 |
| 3 | USB IN(UAC2.0)-SPDIF OUT | USB input, S/PDIF output, UAC2.0 |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz, 705.6kHz, 768KHz |
| **DSD Native** | DSD64, DSD128, DSD256, DSD512 |
| **DOP** | DOP64, DOP128, DOP256 |
| **MQA** | Only supported by PH83311LQ_VC1 |
#### 2.2.2 USB(UAC1.0) in → I²S out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
#### 2.2.3 USB(UAC2.0) in → S/PDIF out Mode
**Input/Output Sampling Rate Support:**
| Interface | Audio Format | Supported Sampling Rates |
|:-----|:---------|:-------------|
| **USB Input** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz, 352.8kHz, 384kHz |
| **S/PDIF Output** | PCM | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
**SSRC (Synchronous Sample Rate Conversion) Function:**
* Input sampling rate ≤ 192kHz: Output at original sampling rate
* Input sampling rate > 192kHz: Output at 192kHz after SSRC conversion
**SSRC Performance Specifications:**
* THD+N (@1kHz, 0dBFs): ≤-130dB
* SNR: ≥140dB
#### 2.2.4 USB(UAC1.0) in → S/PDIF out Mode
**Supported Audio Formats and Sampling Rates:**
| Audio Format | Supported Sampling Rates |
|:---------|:-------------|
| **PCM** | 48kHz |
## 3. Pin Configuration and Function
### 3.1 PH83311L_VC1/PH83311LQ_VC1 Pin Layout
<figure markdown="span">
![PH83311L-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "PH83311L-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: PH83311L-VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 PH83311L_VC1/PH83311LQ_VC1 Pin Description
| Module Pin Number | Name | Type | Function |
| :------: | :------: | :------: | :------ |
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I/O | Multi-function GPIO |
| 3 | X1D16 | I/O | Multi-function GPIO |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | Multi-function GPIO |
| 6 | X1D18 | I/O | Multi-function GPIO |
| 7 | X1D19 | I/O | Multi-function GPIO |
| 8 | X1D22 | I/O | Multi-function GPIO |
| 9 | X0D29 | I/O | Multi-function GPIO |
| 10 | X0D35 | I/O | Multi-function GPIO |
| 11 | X0D36 | I/O | Multi-function GPIO |
| 12 | X0D37 | I/O | Multi-function GPIO |
| 13 | X0D38 | I/O | Multi-function GPIO |
| 14 | X0D40 | I/O | Multi-function GPIO |
| 15 | X0D39 | I/O | Multi-function GPIO |
| 16 | X0D42 | I/O | Multi-function GPIO |
| 17 | X0D41 | I/O | Multi-function GPIO |
| 18 | X0D43 | I/O | Multi-function GPIO |
| 19 | X1D34 | I/O | Multi-function GPIO |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | Multi-function GPIO |
| 22 | X0D31 | I/O | Multi-function GPIO |
| 23 | X0D32 | I/O | Multi-function GPIO |
| 24 | X0D32 | I/O | Multi-function GPIO |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | Multi-function GPIO |
| 29 | X0D11 | I/O | Multi-function GPIO |
| 30 | X1D00 | I/O | Multi-function GPIO |
| 31 | X1D01 | I/O | Multi-function GPIO |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | Multi-function GPIO |
| 34 | X1D10 | I/O | Multi-function GPIO |
| 35 | X1D11 | I/O | Multi-function GPIO/XU316 internal clock output |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | Multi-function GPIO |
| 39 | TDO | I/O | Multi-function GPIO |
| 40 | TMS | I/O | Multi-function GPIO |
| 41 | TCK | I/O | Multi-function GPIO |
| 42 | RST_N | I/O | Multi-function GPIO |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
- I/O type definitions in the table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
| Version | Date | Description | Revised by |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-07 | Initial version release | |
| | | | |
| | | | |
## Consultation and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
--8<-- "common/customer_form.md"
</details>

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---
title: XMSRC4194-VC1 4-Channel 192KHz ASRC Audio Sample Rate Converter with 2x S/PDIF and 2x I2S Interfaces and TDM Cascade Mode
description: XMSRC4194-VC1 4-Channel Asynchronous Sample Rate Converter Datasheet
author: Technical Documentation Department
date: 2025-01-15
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# XMSRC4194-VC1
__4-Channel 192KHz ASRC Audio Sample Rate Converter with 2x S/PDIF and 2x I2S Interfaces and TDM Cascade Mode__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
XMSRC4194 is a high-performance 4-channel asynchronous sample rate converter based on XMOS chip architecture. The product is fully compatible with the core functional specifications of SRC4194, including 16:1 to 1:16 wide-range sample rate conversion, 144dB dynamic range, and comprehensive support for various digital audio formats such as I2S, Left-justified, Right-justified, and TDM.
- Compared to SRC4194, the core advantage of XMSRC4194 is the integration of two additional S/PDIF input interfaces, providing users with more flexible signal source selection. Users can flexibly switch between I2S input and S/PDIF input according to application requirements, significantly enhancing system connectivity and adaptability.
- The XMOS chip architecture ensures high reliability and excellent audio processing performance, providing professional audio equipment manufacturers with a more competitive solution.
- Dual SRC module architecture, with each module processing 2 audio channels, can operate independently, enabling simultaneous processing of 4-channel audio sample rate conversion.
### 1.2 Product Features
<div class="grid cards" markdown>
- :material-audio-input-stereo-minijack:{ .lg .middle } __Four-Channel SRC Audio Sample Rate Conversion__
---
- Dual SRC Module Architecture (SRC_A + SRC_B)
- Each module processes 2 audio signals
- Independently configurable input sources
- Total capability to simultaneously process 4-channel audio sample rate conversion
- Flexible Signal Routing
- SRC_A options: I2S_A_IN or S/PDIF_A (select one)
- SRC_B options: I2S_B_IN or S/PDIF_B (select one)
- Supports multiple operating mode combinations
- :material-sine-wave:{ .lg .middle } __Ultra-High Sample Rate Conversion Support__
---
- ASRC (Asynchronous Sample Rate Conversion)
- Supports sample rate conversion between 44.1KHz-192KHz
- Supports 16:1 to 1:16 wide-range input-output sample rate ratios
- Automatic input-output sample rate detection
- Audio Data Processing
- Supports 16bit/24bit/32bit audio data processing
- 144dB dynamic range
- THD+N: -140dB
- :material-connection:{ .lg .middle } __Multi-Interface Support__
---
- S/PDIF Interface
- 2 S/PDIF input interfaces (S/PDIF_A, S/PDIF_B)
- Each SRC module can independently select S/PDIF input
- Compatible with AES3, IEC 60958, and EIAJ CP-1201 standards
- I²S Interface
- 4 I²S interfaces (2 inputs + 2 outputs)
- Supports Master/Slave mode (independently configurable)
- :material-file-document-multiple:{ .lg .middle } __Comprehensive Digital Audio Format Support__
---
- Supports I2S, Left-Justified, Right-Justified formats
- Complete TDM time-division multiplexing format support, cascadable up to 4 devices
- Supports 16bit/24bit/32bit audio data processing
- All output data dithered from internal 28-bit data path
- :material-cog:{ .lg .middle } __Flexible Configuration Interface__
---
- I²C/UART Configuration Interface
- Supports both I²C and UART dual-protocol configuration
- Configurable Parameters
- SRC_A and SRC_B input source selection (I²S or S/PDIF)
- I²S sample rate configuration (Master mode)
- Master/Slave mode switching
- I²S audio format (I²S/Left-Justified/Right-Justified)
- TDM mode configuration
- :material-clock-outline:{ .lg .middle } __Intelligent Clock Management__
---
- Master Clock Output (MCLK)
- Supports 128fs, 256fs, 512fs, 1024fs reference clock
- Clock Domain Constraints
- One port in Master mode, the other port in Slave mode
- Or both ports in Slave mode
- Master mode port requires valid RCKI reference clock
</div>
### 1.3 Application Scenarios
<div class="grid cards" markdown>
- :material-microphone:{ .lg .middle } __Professional Recording Studios__
---
- High-precision sample rate conversion in multi-track recording equipment
- Processing audio materials with different sample rates in audio workstations
- Achieving audio signal format unification in mixer systems
- :material-broadcast:{ .lg .middle } __Broadcasting and Television__
---
- Real-time audio signal processing in broadcast equipment
- Synchronized processing of audio from different sources in television production
- Optimized audio signal conversion in live streaming systems
- :material-speaker:{ .lg .middle } __Digital Audio Systems__
---
- Audio signal preprocessing in amplifier equipment
- Multi-channel signal conversion in audio processors
- Signal optimization in speaker management systems
- :material-car:{ .lg .middle } __Automotive Audio__
---
- Audio format conversion in in-car entertainment systems
- Audio quality optimization processing in high-end audio systems
- Signal processing in noise reduction systems
- :material-home:{ .lg .middle } __Consumer Electronics__
---
- Audio signal processing in high-end audio equipment
- Multi-channel processing in home theater systems
- Signal conversion in professional audio interfaces
- :material-factory:{ .lg .middle } __Industrial Applications__
---
- Signal standardization in audio test equipment
- Data processing in audio analysis instruments
- Format conversion in professional signal processing equipment
</div>
### 1.4 Product Block Diagram
<figure markdown="span">
![XMSRC4194 Block Diagram](/assets/images/hifi_audio/xmsrc4194_diagram.png "XMSRC4194-VC1 Block Diagram"){width=700}
<figcaption>Figure 1: XMSRC4194-VC1 Functional Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| XMSRC4194-VC1 | XMSRC4194-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | 4-channel 192KHz ASRC sample rate converter, dual SRC modules, 2x S/PDIF inputs, TDM cascade |
## 2. Modes and Specifications
### 2.1 Supported Input-Output Modes
XMSRC4194-VC1 employs a flexible modular design where two SRC modules (SRC_A and SRC_B) can be independently configured for input sources. The following lists typical application modes:
| Mode Number | SRC_A Configuration | SRC_B Configuration | Description |
|:--------:|:----------|:----------|:-----|
| 1 | S/PDIF_A → SRC_A → I²S_A_OUT (Master) | S/PDIF_B → SRC_B → I²S_B_OUT (Master) | Dual S/PDIF to I²S output |
| 2 | I²S_A_IN (Slave) → SRC_A → I²S_A_OUT (Master) | I²S_B_IN (Slave) → SRC_B → I²S_B_OUT (Master) | Independent dual-channel sample rate conversion |
| 3 | I²S_A_IN (Slave) → SRC_A → TDM_OUT | I²S_B_IN (Slave) → SRC_B → TDM_OUT | TDM cascade output mode |
| 4 | S/PDIF_A → SRC_A → TDM_OUT | S/PDIF_B → SRC_B → TDM_OUT | S/PDIF to TDM cascade output |
!!! note "Mode Configuration Notes"
- SRC_A optional input sources: I²S_A_IN or S/PDIF_A (select one)
- SRC_B optional input sources: I²S_B_IN or S/PDIF_B (select one)
- TDM mode supports cascading up to 4 devices
- Configuration dynamically switchable via I²C/UART interface
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 Mode 1: Dual S/PDIF Input → Dual I²S Output
**Application Scenario**: S/PDIF signal conversion to dual I²S output, suitable for digital audio systems
**Signal Flow**:
```
S/PDIF_A ──→ SRC_A ──→ I²S_A_OUT (Master)
S/PDIF_B ──→ SRC_B ──→ I²S_B_OUT (Master)
```
**Parameter Configuration**:
| Parameter | SRC_A | SRC_B |
|:-----|:------|:------|
| **Input Source** | S/PDIF_A | S/PDIF_B |
| **Input Format** | S/PDIF | S/PDIF |
| **Output Interface** | I²S_A (Master) | I²S_B (Slave) |
| **Sample Rate** | 44.1KHz~192KHz (ASRC) | 44.1KHz~192KHz (ASRC) |
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
#### 2.2.2 Mode 2: Dual I²S Input → Dual I²S Output
**Application Scenario**: Independent dual-channel sample rate conversion, suitable for multi-track recording equipment
**Signal Flow**:
```
I²S_A_IN (Slave) ──→ SRC_A ──→ I²S_A_OUT (Master)
I²S_B_IN (Slave) ──→ SRC_B ──→ I²S_B_OUT (Slave)
```
**Parameter Configuration**:
| Parameter | SRC_A | SRC_B |
|:-----|:------|:------|
| **Input Source** | I²S_A_IN (Slave) | I²S_B_IN (Slave) |
| **Output Interface** | I²S_A (Master) | I²S_B (Slave) |
| **Sample Rate** | 44.1KHz~192KHz (ASRC) | 44.1KHz~192KHz (ASRC) |
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
#### 2.2.3 TDM Cascade Mode (Mode 3/4)
**Application Scenario**: Multi-device cascading, suitable for professional multi-channel audio systems
**TDM Frame Format**:
- Frame rate = output sample frequency (fs)
- Bit clock frequency (BCKO) = N × 64fs (N = number of cascaded devices)
- Each subframe = 64 bits (left channel 32 bits + right channel 32 bits)
- Audio data left-aligned, MSB first
**Cascade Capability**:
```
Number of cascaded devices = (BCKO frequency / fs) / 64
Maximum BCKO = 27MHz
Maximum fs = 212KHz
```
**Typical Configuration Examples**:
| Output Sample Rate | BCKO Frequency | Maximum Cascade |
|:----------|:---------|:----------|
| 48kHz | 12.288MHz | 4 devices |
| 96kHz | 24.576MHz | 4 devices |
| 192kHz | 24.576MHz | 2 devices |
### 2.3 Audio Performance Specifications
| Performance Metric | ASRC Mode | Test Conditions |
|:---------|:---------|:---------|
| Resolution | 16-32 bit | - |
| Input Sample Frequency | 44.1kHz ~ 192kHz | - |
| Output Sample Frequency | 44.1kHz ~ 192kHz | - |
| Dynamic Range | 144dB | -60dBFS input, A-weighted |
| THD+N | -140dB | 0dBFS input, 20Hz~fs/2 |
### 2.4 Feature Comparison
!!! info ""
<div class="sticky-column" markdown>
| Feature | XMSRC4194 | SRC4194 | Advantage |
|:-----:|:--------:|:-------:|:----:|
| SRC Channels | 4 channels | 4 channels | Same processing capability |
| SRC Modules | 2 independent modules | 2 modules | 2x processing capability |
| S/PDIF Input | 2 channels | Not supported | More input interfaces |
| Maximum Sample Rate (ASRC) | 192 KHz | 216 KHz | Comparable performance |
| External Clock Reference | No external clock required | Requires external clock | Saves external crystal cost |
| Scalability | Expandable | Not expandable | More flexible |
| TDM Cascade | Supports 4 devices | Supports 4 devices | Same cascade capability |
</div>
## 3. Pin Configuration and Functions
### 3.1 XMSRC4194_VC1 Pin Layout
<figure markdown="span">
![XMSRC4194-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "XMSRC4194-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: XMSRC4194_VC1 Pin Layout Diagram (A316-Mini-V1 Package)</figcaption>
</figure>
### 3.2 XMSRC4194_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I | S/PDIF_IB (S/PDIF input B) |
| 3 | X1D16 | I/O | LRCKOB (I²S_B output frame sync, Master output/Slave input) |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | BCKOB (I²S_B output bit clock, Master output/Slave input) |
| 6 | X1D18 | - | Reserved |
| 7 | X1D19 | - | Reserved |
| 8 | X1D22 | - | Reserved |
| 9 | X0D29 | I/O | UART_RX/I2C_SDA (UART receive/I2C data) |
| 10 | X0D35 | I/O | BCKIA (I²S_A input bit clock, Master output/Slave input) |
| 11 | X0D36 | I/O | LRCKIA (I²S_A input frame sync, Master output/Slave input) |
| 12 | X0D37 | I | SDINA (I²S_A data input) |
| 13 | X0D38 | I | TDMIA (TDM data input A, TDM mode only) |
| 14 | X0D40 | I/O | LRCKOA (I²S_A output frame sync, Master output/Slave input) |
| 15 | X0D39 | O | MCLK_OUT (Master clock output) |
| 16 | X0D42 | - | Reserved |
| 17 | X0D41 | I/O | BCKOA (I²S_A output bit clock, Master output/Slave input) |
| 18 | X0D43 | - | Reserved |
| 19 | X1D34 | I | SDINB (I²S_B data input) |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | I2C_SCL (I2C clock) |
| 22 | X0D31 | I/O | UART_I2C_SEL (UART/I2C selection) |
| 23 | X0D32 | I/O | UART_TX (UART transmit) |
| 24 | X0D33 | - | Reserved |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I | S/PDIF_IA (S/PDIF input A) |
| 29 | X0D11 | O | SDOUTA (I²S_A data output) |
| 30 | X1D00 | I/O | LRCKIB (I²S_B input frame sync, Master output/Slave input) |
| 31 | X1D01 | I | TDMIB (TDM data input B, TDM mode only) |
| 32 | GND | P | Module ground |
| 33 | X1D09 | O | SDOUTB (I²S_B data output) |
| 34 | X1D10 | I/O | BCKIB (I²S_B input bit clock, Master output/Slave input) |
| 35 | X1D11 | O | MCLK_OUT (Master clock output) |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | JTAG debug interface |
| 39 | TDO | I/O | JTAG debug interface |
| 40 | TMS | I/O | JTAG debug interface |
| 41 | TCK | I/O | JTAG debug interface |
| 42 | RST_N | I | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM (Reserved, not used) |
| 46 | USB_DP | I/O | USB_DP (Reserved, not used) |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Definition"
I/O types in the table: I=Input, O=Output, P=Power, I/O=Input/Output
!!! warning "Important Notes"
- **S/PDIF Inputs**: Each SRC module corresponds to one S/PDIF input
- Pin 28(X0D00): S/PDIF_IA (corresponds to SRC_A)
- Pin 2(X1D13): S/PDIF_IB (corresponds to SRC_B)
- **I²S_A Interface**:
- Input: BCKIA(X0D35), LRCKIA(X0D36), SDINA(X0D37), TDMIA(X0D38)
- Output: BCKOA(X0D41), LRCKOA(X0D40), SDOUTA(X0D11)
- **I²S_B Interface**:
- Input: BCKIB(X1D10), LRCKIB(X1D00), SDINB(X1D34), TDMIB(X1D01)
- Output: BCKOB(X1D17), LRCKOB(X1D16), SDOUTB(X1D09)
- **UART/I2C Interface Selection**: Interface type selected via pin 22(X0D31) UART_I2C_SEL signal
- UART mode: Pin 9(X0D29)=UART_RX, Pin 23(X0D32)=UART_TX
- I2C mode: Pin 9(X0D29)=I2C_SDA, Pin 21(X0D30)=I2C_SCL
- **MCLK Output**: Pin 15(X0D39) and Pin 35(X1D11)
- Required for Master mode, supports 128fs/256fs/512fs/1024fs
- **TDM Input**: TDMIA(X0D38) and TDMIB(X1D01) used only in TDM mode for cascading
- **Clock Constraints**: All Master I2S ports must be in the same clock domain, i.e., either all in 44.1KHz clock domain or all in 48KHz clock domain
## 4. Configuration Interface Description
### 4.1 I²C/UART Configuration Interface
XMSRC4194-VC1 supports both I²C and UART dual-protocol configuration, providing flexible configuration methods. The UART_I2C_SEL signal on pin 22(X0D31) can be used to select which configuration interface to use:
| Configuration Method | Pin 22(X0D31) | Communication Interface | Description |
|:--------|:-------------|:---------|:-----|
| Pull-up | UART_I2C_SEL | UART mode | Pin 9(X0D29)=UART_RX, Pin 23(X0D32)=UART_TX |
| Pull-down | UART_I2C_SEL | I²C mode | Pin 9(X0D29)=I2C_SDA, Pin 21(X0D30)=I2C_SCL |
### 4.2 Configurable Parameters
The following parameters can be configured via I²C or UART interface:
| Parameter Type | Configuration Options | Description |
|:--------|:---------|:-----|
| SRC_A Input Source | I²S_A_IN / S/PDIF_A | Select input source for SRC_A module (select one) |
| SRC_B Input Source | I²S_B_IN / S/PDIF_B | Select input source for SRC_B module (select one) |
| I²S_A Mode | Master / Slave | I²S_A operating mode |
| I²S_B Mode | Master / Slave | I²S_B operating mode |
| I²S_A Sample Rate | 4kHz~192kHz | |
| I²S_B Sample Rate | 4kHz~192kHz | |
| I²S_A Input Format | I²S/Left-Justified/Right-Justified | Audio data format |
| I²S_B Input Format | I²S/Left-Justified/Right-Justified | Audio data format |
| I²S_A Output Format | I²S/Left-Justified/Right-Justified/TDM | Audio data format |
| I²S_B Output Format | I²S/Left-Justified/Right-Justified/TDM | Audio data format |
| Output Word Length | 16/24/32 bits | |
!!! note "Configuration Notes"
- Master mode constraint: All Master I2S ports must be in the same clock domain, i.e., either all in 44.1KHz clock domain or all in 48KHz clock domain
- For detailed configuration commands, please refer to the configuration protocol documentation
### 4.3 MCLK Configuration
- Master mode ports require MCLK for generating LRCK and BCK:
- MCLK supports 128fs/256fs/512fs/1024fs
## 5. Hardware Parameters
### 5.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 5.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 5.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption>Figure 3: A316-Mini-V1 Package Diagram</figcaption>
</figure>
## 6. Minimum System Reference Design
<figure markdown="span">
![A316-Mini-V1 Minimum System Reference Design](/assets/download/a316_mini_v1/a316_mini_v1_mini_ref_design.png "A316-Mini-V1 Minimum System Reference Design"){width=800}
<figcaption></figcaption>
</figure>
## 7. Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 8. Revision History
| Version | Date | Description | Revised By |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-10-6 | Initial release | Technical Documentation Department |
| | | | |
## 9. Contact and Feedback
<details>
<summary>Click to expand contact and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

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---
title: XMSRC4392-VC1 4-Channel 192KHz ASRC and 768KHz SSRC Audio Sample Rate Converter with Integrated S/PDIF Transceiver and Dual I2S Master/Slave Interfaces
description: XMSRC4392-VC1 4-Channel Audio Sample Rate Converter Datasheet
author: Technical Documentation Department
date: 2025-01-15
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# XMSRC4392-VC1
__4-Channel 192KHz ASRC and 768KHz SSRC Audio Sample Rate Converter with Integrated S/PDIF Transceiver and Dual I2S Master/Slave Interfaces__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
XMSRC4392 is a high-performance four-channel asynchronous audio sample rate converter based on XMOS high-performance chips, specifically designed for professional audio applications. Compared to the SRC4392's dual-channel SRC solution, this product provides double the processing capability while achieving significant optimization in both cost and performance.
- The product integrates two independent SRC modules (SRC_A and SRC_B), each capable of processing two audio channels, supporting ultra-high sampling rates up to 768KHz, providing exceptional flexibility and high-performance audio sample rate conversion for various digital audio systems.
- Supports SSRC sample rate conversion between 44.1KHz-768KHz, ASRC sample rate conversion between 44.1KHz-192KHz, and processes 16bit/24bit/32bit audio data.
- The product features excellent audio performance specifications, with both SSRC and ASRC THD+N (@1kHz, 0dBFs) ≤ -130dB, providing audio equipment manufacturers with professional-grade audio processing solutions.
### 1.2 Product Features
<div class="grid cards" markdown>
- :material-music-circle: __Four-Channel SRC Audio Sample Rate Conversion__
---
- Dual SRC Module Architecture (SRC_A + SRC_B)
- Each module processes 2 audio channels
- Independently configurable input sources
- Total simultaneous processing of 4 audio channels for sample rate conversion
- Flexible Signal Routing
- Each SRC module can independently select input sources
- Supports multiple operational mode combinations
- Freely configurable when no conflicts exist
- :material-speedometer: __Ultra-High Sample Rate Conversion Support__
---
- SSRC (Synchronous Sample Rate Conversion)
- Supports sample rate conversion between 44.1KHz-768KHz
- Ultra-high sampling rate support up to 768KHz
- ASRC (Asynchronous Sample Rate Conversion)
- Supports sample rate conversion between 44.1KHz-192KHz
- No external clock reference required
- Audio Data Processing
- Supports 16bit/24bit/32bit audio data processing
- High-precision digital signal processing
- :material-cable-data: __Multiple Interface Support__
---
- S/PDIF Interface
- 4 S/PDIF input interfaces (4-to-1 switching)
- 2 S/PDIF output interfaces (including loop-through output)
- Compatible with AES3, IEC 60958, and EIAJ CP-1201 standards
- Only supports 44.1KHz~192KHz (ASRC mode)
- I²S Interface
- 2 I²S interfaces (I²S_A and I²S_B)
- Supports Master/Slave mode (independently configurable)
- Flexible master/slave mode switching
- :material-chart-line: __High Performance Specifications__
---
- SSRC: THD+N (@1kHz, 0dBFs) ≤ -130dB
- ASRC: THD+N (@1kHz, 0dBFs) ≤ -130dB
- Professional-grade audio performance
- :material-cog-outline: __Flexible Configuration Interface__
---
- I²C/UART Configuration Interface
- Supports dual-protocol configuration via I²C and UART
- Configurable Parameters
- SRC module input source selection
- I²S sampling rate configuration
- Master/Slave mode switching
- S/PDIF input source switching (4-to-1)
- MCLK clock configuration (128fs/256fs/512fs/1024fs)
- :material-clock-outline: __Intelligent Clock Management__
---
- Master Clock Output (MCLK_OUT)
- Supports 44.1KHz clock domain and 48KHz clock domain
- Clock Domain Restrictions
- Shared MCLK in dual I²S Master mode
- Must use the same clock domain (44.1KHz or 48KHz)
- Mute Indication
- Automatic mute during sampling rate switching
- Mute protection during configuration changes
</div>
### 1.3 Application Scenarios
<div class="grid cards" markdown>
- :material-microphone: __Professional Recording Studios__
---
High-precision sample rate conversion requirements for multi-track recording equipment, audio workstations, and mixing console systems
- :material-broadcast: __Broadcasting and Television__
---
Real-time audio signal processing in broadcasting equipment, television production, and live streaming systems
- :material-speaker: __Digital Audio Systems__
---
Signal optimization for amplifier equipment, audio processors, and speaker management systems
- :material-car: __Automotive Audio__
---
Audio processing for in-vehicle entertainment systems, premium audio systems, and noise reduction systems
- :material-home: __Consumer Electronics__
---
High-end audio equipment, home theater systems, and professional audio interface products
- :material-factory: __Industrial Applications__
---
Test equipment, audio analysis instruments, and signal processing systems
</div>
### 1.4 Product Block Diagram
<figure markdown="span">
![XMSRC4392 Block Diagram](/assets/images/hifi_audio/xmsrc4392_diagram.png "XMSRC4392-VC1 Block Diagram"){width=700}
<figcaption>Figure 1: XMSRC4392-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| XMSRC4392-VC1 | XMSRC4392-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | 4-channel sample rate converter, supports SSRC 768KHz/ASRC 192KHz, dual SRC modules with independent configuration |
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
XMSRC4392-VC1 employs a flexible input/output routing architecture, supporting multiple audio processing modes. The following lists typical application modes from a data flow perspective:
| Mode | Input Interface | SRC Processing | Output Interface | Description |
|:----:|:--------|:-------|:--------|:-----|
| 1 | S/PDIF_IN | SRC_A + SRC_B | I²S_A_OUT + I²S_B_OUT | Single S/PDIF to I²S output |
| 2 | I²S_A_IN | SRC_A | I²S_A_OUT + I²S_B_OUT | Single input pass-through + converted dual output |
| 3 | I²S_A_IN + I²S_B_IN | SRC_A + SRC_B | I²S_A_OUT + I²S_B_OUT | Dual-channel cross sample rate conversion |
| 4 | S/PDIF_IN + I²S_B_IN | SRC_A + SRC_B | I²S_A_OUT + S/PDIF_OUT | S/PDIF and I²S bidirectional conversion |
| 5 | I²S_A_IN + I²S_B_IN | SRC_A | S/PDIF_OUT + I²S_B_OUT | I²S to S/PDIF, other channel pass-through |
!!! note "Architecture Description"
- **Input Interfaces**: S/PDIF_IN (4-to-1), I²S_A_DATA_IN, I²S_B_DATA_IN
- **Output Interfaces**: S/PDIF_OUT, I²S_A_DATA_OUT, I²S_B_DATA_OUT
- **SRC Modules**: 2 independent SRC modules (SRC_A, SRC_B), flexibly configurable for input sources and output destinations
- **Pass-Through Mode**: Data can pass directly from input to output without SRC processing (sample rate unchanged)
- **I²S Interfaces**: Each I²S interface is uniformly configured as Master or Slave; dual Master requires the same clock domain
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 Mode 1: Single S/PDIF to I²S Output
**Application Scenario**: Converting two S/PDIF signals to I²S output, suitable for digital audio systems
**Data Flow**:
| Channel | Input Interface | SRC Processing | Output Interface |
|:----:|:--------|:-------|:--------|
| Channel 1 | S/PDIF_IN (4-to-1) | SRC_A processing | I²S_A_DATA_OUT (Master) |
| Channel 2 | S/PDIF_IN (4-to-1) | SRC_B processing | I²S_B_DATA_OUT (Master) |
**Signal Flow Diagram**:
```
┌→ SRC_A ──→ I²S_A_DATA_OUT (Master)
S/PDIF_IN (4-to-1) ┤
└→ SRC_B ──→ I²S_B_DATA_OUT (Master)
```
**Parameter Description**:
| Parameter | Channel 1 | Channel 2 |
|:-----|:------|:------|
| **Input** | S/PDIF_IN | S/PDIF_IN |
| **SRC** | SRC_A | SRC_B |
| **Output** | I²S_A_OUT (Master) | I²S_B_OUT (Master) |
| **Sample Rate** | 44.1KHz~192KHz (ASRC) | 44.1KHz~192KHz (ASRC) |
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
!!! note "Configuration Key Points"
- Both I²S outputs operate in Master mode and must belong to the same clock family (44.1KHz series or 48KHz series)
#### 2.2.2 Mode 2: Single I²S Input Dual Output (Pass-Through + Conversion)
**Application Scenario**: I²S_A input signal simultaneously passes through to output and is output from I²S_B after SRC conversion, suitable for scenarios where one source signal requires two different output sample rates
**Data Flow**:
| Data Path | Input Interface | SRC Processing | Output Interface |
|:--------:|:--------|:-------|:--------|
| Path 1 | I²S_A_DATA_IN (Slave) | Without SRC (pass-through) | I²S_A_DATA_OUT (Slave) |
| Path 2 | I²S_A_DATA_IN (Slave) | SRC_A processing | I²S_B_DATA_OUT (Master) |
**Signal Flow Diagram**:
```
┌→ I²S_A_DATA_OUT (Slave, pass-through)
I²S_A_DATA_IN (Slave) ┤
└→ SRC_A ──→ I²S_B_DATA_OUT (Master)
```
**Parameter Description**:
| Parameter | Path 1 (Pass-Through) | Path 2 (Conversion) |
|:-----|:-----------|:-----------|
| **Input** | I²S_A_IN (Slave) | I²S_A_IN (Slave) |
| **SRC** | Not used (direct) | SRC_A |
| **Output** | I²S_A_OUT (Slave) | I²S_B_OUT (Master) |
| **Sample Rate** | Same as input (pass-through) | 44.1KHz~192KHz (ASRC) |
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
!!! note "Configuration Key Points"
- I²S_A input is sent to two paths simultaneously: directly passed through to I²S_A output, and fed into SRC_A for processing
- Pass-through path does not change sample rate; conversion path can configure target sample rate
#### 2.2.3 Mode 3: Dual I²S Input Cross Conversion Output
**Application Scenario**: Two I²S inputs are cross-output after SRC conversion, suitable for scenarios where dual audio channels need simultaneous conversion with swapped output interfaces
**Data Flow**:
| Channel | Input Interface | SRC Processing | Output Interface |
|:----:|:--------|:-------|:--------|
| Channel 1 | I²S_A_DATA_IN (Slave/Master) | SRC_A processing | I²S_B_DATA_OUT (Master/Slave) |
| Channel 2 | I²S_B_DATA_IN (Slave/Master) | SRC_B processing | I²S_A_DATA_OUT (Master/Slave) |
**Signal Flow Diagram**:
```
I²S_A_DATA_IN ──→ SRC_A ──┐
├→ I²S_B_DATA_OUT
I²S_B_DATA_IN ──→ SRC_B ──┤
└→ I²S_A_DATA_OUT
```
**Parameter Description**:
| Parameter | Channel 1 | Channel 2 |
|:-----|:------|:------|
| **Input** | I²S_A_IN (Slave/Master) | I²S_B_IN (Slave/Master) |
| **SRC** | SRC_A | SRC_B |
| **Output** | I²S_B_OUT (Master/Slave) | I²S_A_OUT (Master/Slave) |
| **Sample Rate** | 44.1KHz~192KHz (ASRC)<br> 44.1KHz~768KHz (SSRC) | 44.1KHz~192KHz (ASRC)<br> 44.1KHz~768KHz (SSRC)|
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
!!! note "Configuration Key Points"
- Cross routing of two inputs: I²S_A input → SRC_A → I²S_B output, I²S_B input → SRC_B → I²S_A output
- Two SRC modules operate independently and can be set to different target sample rates
- SSRC requirement: Both I²S interfaces (input and output) must be configured in Master mode and must belong to the same clock family (44.1KHz series or 48KHz series)
#### 2.2.4 Mode 4: S/PDIF and I²S Bidirectional Conversion
**Application Scenario**: S/PDIF input converts to I²S output while I²S input converts to S/PDIF output, suitable for digital audio format bidirectional conversion applications
**Data Flow**:
| Channel | Input Interface | SRC Processing | Output Interface |
|:----:|:--------|:-------|:--------|
| Channel 1 | S/PDIF_IN (4-to-1) | SRC_A processing | I²S_A_DATA_OUT (Master) |
| Channel 2 | I²S_B_DATA_IN (Slave) | SRC_B processing | S/PDIF_OUT |
**Signal Flow Diagram**:
```
S/PDIF_IN (4-to-1) ──→ SRC_A ──→ I²S_A_DATA_OUT (Master)
I²S_B_DATA_IN (Slave) ──→ SRC_B ──→ S/PDIF_OUT
```
**Parameter Description**:
| Parameter | Channel 1 | Channel 2 |
|:-----|:------|:------|
| **Input** | S/PDIF_IN | I²S_B_IN (Slave) |
| **SRC** | SRC_A | SRC_B |
| **Output** | I²S_A_OUT (Master) | S/PDIF_OUT |
| **Sample Rate** | 44.1KHz~192KHz (ASRC) | 44.1KHz~192KHz (ASRC) |
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
!!! note "Configuration Key Points"
- Implements bidirectional conversion between S/PDIF and I²S formats
#### 2.2.5 Mode 5: I²S to S/PDIF Output + Other I²S Pass-Through
**Application Scenario**: I²S_A input converts to S/PDIF output, I²S_B independently passes through, suitable for applications where one channel requires format conversion and the other passes directly
**Data Flow**:
| Channel | Input Interface | SRC Processing | Output Interface |
|:----:|:--------|:-------|:--------|
| Channel 1 | I²S_A_DATA_IN (Slave) | SRC_A processing | S/PDIF_OUT |
| Channel 2 | I²S_B_DATA_IN (Master) | Without SRC (pass-through) | I²S_B_DATA_OUT (Master) |
**Signal Flow Diagram**:
```
I²S_A_DATA_IN (Slave) ──→ SRC_A ──→ S/PDIF_OUT
I²S_B_DATA_IN (Master) ──→ I²S_B_DATA_OUT (Master, pass-through)
```
**Parameter Description**:
| Parameter | Channel 1 (Conversion) | Channel 2 (Pass-Through) |
|:-----|:-----------|:-----------|
| **Input** | I²S_A_IN (Slave) | I²S_B_IN (Master) |
| **SRC** | SRC_A | Not used (direct) |
| **Output** | S/PDIF_OUT | I²S_B_OUT (Master) |
| **Sample Rate** | 44.1KHz~192KHz (ASRC) | Same as input (pass-through) |
| **Bit Depth** | 16/24/32bit | 16/24/32bit |
!!! note "Configuration Key Points"
- I²S_B input passes directly to output without SRC processing, sample rate unchanged
### 2.3 Audio Performance Specifications
| Performance Specification | SSRC Mode | ASRC Mode | Notes |
|:---------|:---------|:---------|:-----|
| THD+N | ≤ -130dB | ≤ -130dB | @1kHz, 0dBFs |
| Sample Rate Range | 44.1KHz~768KHz | 44.1KHz~192KHz | - |
| Audio Resolution | 16/24/32bit | 16/24/32bit | - |
| SRC Channels | 4 channels | 4 channels | 2 channels per dual module |
| SRC Modules | 2 independent modules | 2 independent modules | SRC_A + SRC_B |
!!! warning "SSRC Mode Limitations"
**SSRC Mode Usage Conditions**:
- Input and output interfaces must be I²S Master
- Multiple I²S Masters must operate in the same clock domain (all in 44.1KHz series or all in 48KHz series)
**If the above conditions are not met, only ASRC mode can be used (sample rate limited to 44.1KHz~192KHz)**
### 2.4 Feature Comparison
!!! info ""
<div class="sticky-column" markdown>
| Feature | XMSRC4392 | SRC4392 | Advantage |
|:-----:|:--------:|:-------:|:----:|
| SRC Channels | 4 channels | 2 channels | 2x processing capability |
| SRC Modules | 2 independent modules | 1 module | 2x processing capability |
| Maximum Sample Rate (SSRC) | 768 KHz | 216 KHz | 3.5x performance improvement |
| Maximum Sample Rate (ASRC) | 192 KHz | 216 KHz | Equivalent performance |
| External Clock Reference | No external clock required | Requires external clock | Saves external crystal cost |
| Scalability | Expandable | Not expandable | More flexible |
</div>
## 3. Pin Configuration and Functions
### 3.1 XMSRC4392_VC1 Pin Layout
<figure markdown="span">
![XMSRC4392-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "XMSRC4392-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: XMSRC4392_VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 XMSRC4392_VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | - | Reserved |
| 3 | X1D16 | - | Reserved |
| 4 | GND | P | Module ground |
| 5 | X1D17 | - | Reserved |
| 6 | X1D18 | - | Reserved |
| 7 | X1D19 | - | Reserved |
| 8 | X1D22 | O | SP_OUT (S/PDIF output, source selectable from SRC_A or SRC_B) |
| 9 | X0D29 | I/O | UART_RX/I2C_SDA (UART receive/I2C data) |
| 10 | X0D35 | I/O | BCK_A (I²S_A bit clock, Master output/Slave input) |
| 11 | X0D36 | I/O | LRCK_A (I²S_A frame sync, Master output/Slave input) |
| 12 | X0D37 | I/O | SDIN_A (I²S_A data input) |
| 13 | X0D38 | O | SDOUT_A (I²S_A data output) |
| 14 | X0D40 | I | SP_IN_2 (S/PDIF input 2) |
| 15 | X0D39 | O | MCLK (Master clock output, Master mode) |
| 16 | X0D42 | I | SP_IN_4 (S/PDIF input 4) |
| 17 | X0D41 | I | SP_IN_3 (S/PDIF input 3) |
| 18 | X0D43 | - | Reserved |
| 19 | X1D34 | I/O | SDIN_B (I²S_B data input) |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | I2C_SCL (I2C clock) |
| 22 | X0D31 | I/O | UART_I2C_SEL (UART/I2C selection) |
| 23 | X0D32 | I/O | UART_TX (UART transmit) |
| 24 | X0D33 | O | MUTE (Mute indication output) |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | O | SP_LOOP_OUT (S/PDIF loop-through output, direct pass-through of selected input) |
| 29 | X0D11 | I | SP_IN_1 (S/PDIF input 1) |
| 30 | X1D00 | I/O | LRCK_B (I²S_B frame sync, Master output/Slave input) |
| 31 | X1D01 | O | SDOUT_B (I²S_B data output) |
| 32 | GND | P | Module ground |
| 33 | X1D09 | - | Reserved |
| 34 | X1D10 | I/O | BCK_B (I²S_B bit clock, Master output/Slave input) |
| 35 | X1D11 | O | MCLK (Master clock output) |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug pin |
| 39 | TDO | I/O | XTAG debug pin |
| 40 | TMS | I/O | XTAG debug pin |
| 41 | TCK | I/O | XTAG debug pin |
| 42 | RST_N | I | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM (Reserved, not used) |
| 46 | USB_DP | I/O | USB_DP (Reserved, not used) |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
Pin types in table: I=Input, O=Output, P=Power, I/O=Input/Output
!!! warning "Important Notes"
- **S/PDIF Inputs**: 4 inputs (SP_IN_1~SP_IN_4) switchable via 4-to-1 configuration
- Pin 29 (X0D11): SP_IN_1
- Pin 14 (X0D40): SP_IN_2
- Pin 17 (X0D41): SP_IN_3
- Pin 16 (X0D42): SP_IN_4
- **SP_LOOP_OUT**: Pin 28 (X0D00), directly loops back the selected S/PDIF input without SRC processing
- **S/PDIF Output**: Pin 8 (X1D22), configurable to select SRC_A or SRC_B output (choose one)
- **UART/I2C Interface Selection**: Interface type selected via pin 22 (X0D31) UART_I2C_SEL signal
- UART mode: Pin 9 (X0D29) = UART_RX, Pin 23 (X0D32) = UART_TX
- I2C mode: Pin 9 (X0D29) = I2C_SDA, Pin 21 (X0D30) = I2C_SCL
- **MCLK Output**: Pin 15 (X0D39) and Pin 35 (X1D11)
- Frequency: 128fs/256fs/512fs/1024fs
- **Dual Master Limitation**: When both I²S_A and I²S_B are in Master mode, they must use the same clock domain
- **MUTE Signal**: Pin 24 (X0D33), outputs mute indication during sample rate or configuration switching
## 4. Configuration Interface Description
### 4.1 I²C/UART Configuration Interface
XMSRC4392-VC1 supports both I²C and UART dual-protocol configuration, providing flexible configuration methods. The configuration interface type can be selected via pin 22 (X0D31) UART_I2C_SEL signal:
| Configuration Method | Pin 22 (X0D31) | Communication Interface | Description |
|:--------|:-------------|:---------|:-----|
| Pull-up | UART_I2C_SEL | UART mode | Pin 9 (X0D29) = UART_RX, Pin 23 (X0D32) = UART_TX |
| Pull-down | UART_I2C_SEL | I²C mode | Pin 9 (X0D29) = I2C_SDA, Pin 21 (X0D30) = I2C_SCL |
### 4.2 Configurable Parameters
The following parameters can be configured via I²C or UART interface:
| Parameter Type | Configuration Options | Description |
|:--------|:---------|:-----|
| SRC_A Input Source | S/PDIF_IN / I²S_A_IN / I²S_B_IN | Select input source for SRC_A module |
| SRC_B Input Source | S/PDIF_IN / I²S_A_IN / I²S_B_IN | Select input source for SRC_B module |
| S/PDIF Input Selection | SP_IN_1 / SP_IN_2 / SP_IN_3 / SP_IN_4 | 4-to-1 switching |
| I²S_A Mode | Master / Slave | I²S_A operating mode |
| I²S_B Mode | Master / Slave | I²S_B operating mode |
| I²S_A Sample Rate | 44.1KHz~768KHz | Configuration in Master mode |
| I²S_B Sample Rate | 44.1KHz~768KHz | Configuration in Master mode |
| MCLK Clock Configuration | 128fs/256fs/512fs/1024fs | MCLK output multiplier selection |
!!! note "Configuration Notes"
- Configuration switching triggers the MUTE signal
- In dual Master mode, the same clock domain must be configured (44.1KHz or 48KHz)
- Refer to configuration protocol documentation for detailed configuration commands
### 4.3 MCLK Output Frequency Configuration
MCLK_OUT frequency is determined by the clock domain and configured multiplier (128fs/256fs/512fs/1024fs).
| Clock Domain | MCLK Configuration | Output Frequency Examples |
|:------|:---------|:------------|
| 44.1KHz | 128fs/256fs/512fs/1024fs | 5.6448MHz ~ 45.158MHz |
| 48KHz | 128fs/256fs/512fs/1024fs | 6.144MHz ~ 49.152MHz |
!!! warning "Clock Domain Restrictions"
When both I²S_A and I²S_B operate in Master mode:
- ✅ **Allowed**: Both in 44.1KHz domain OR both in 48KHz domain
- ❌ **Not Allowed**: One in 44.1KHz domain, the other in 48KHz domain
## 5. Hardware Parameters
### 5.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 5.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 5.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption>Figure 3: A316-Mini-V1 Package Diagram</figcaption>
</figure>
## 6. Minimum System Reference Design
<figure markdown="span">
![A316-Mini-V1 Minimum System Reference Design](/assets/download/a316_mini_v1/a316_mini_v1_mini_ref_design.png "A316-Mini-V1 Minimum System Reference Design"){width=800}
<figcaption></figcaption>
</figure>
## 7. Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 8. Revision History
| Version | Date | Description | Author |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-10-5 | Initial version release | |
| | | | |
## 9. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>

148
en/docs/dev_doc/datasheet/std_product/usb_otg/ot82111_vc1.md
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@@ -1,71 +1,74 @@
---
title: OT82111_VC1 USB1.0 to I²S(Slave) Audio Decoder
description: OT82111_VC1 Audio Decoder Technical Documentation
title: OT82111-VC1 4-Channel ASRC OTG 48KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface
description: OT82111-VC1 4-Channel ASRC OTG 48KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface Technical Documentation
author: Technical Documentation Department
date: 2025-05-14
print_page: true
---
# OT82111_VC1 USB1.0 to I²S(Slave) Audio Decoder
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# OT82111-VC1
__4-Channel ASRC OTG 48KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
OT82111_VC1 is a USB1.0 to I²S(Slave) audio decoder designed for simplified HiFi audio applications. This product is developed based on the a316-mini-v1 module, providing fixed input format (PCM48KHz/16bit) and flexible output formats (PCM:44.1KHz-192KHz/32bit).
OT82111-VC1 is a high-performance 4-channel ASRC audio sample rate converter designed for mobile audio devices, integrating USB OTG interface and 2-channel I²S slave interface functionality. This product is developed based on XMOS high-performance chips, specifically optimized for applications such as streaming sound cards and mobile audio interfaces.
OT82111_VC1 uses USB Audio Class 1.0 interface as input and I²S(Slave) interface as output, suitable for applications requiring stable low-latency audio transmission. Through its simplified design, this product offers a cost-effective audio solution while maintaining excellent audio performance.
- The product features built-in high-precision 2 independent dual-channel ASRC sample rate converters, supporting conversion between 44.1kHz~192kHz and 48KHz sampling rates, ensuring seamless audio signal conversion between different sampling rates.
- Through the USB OTG interface, the device can directly connect to smartphones, tablets, and other mobile devices, implementing plug-and-play functionality using UAC2.0 adaptive mode, compatible with various platforms including Windows, Linux, Android, macOS, and iOS.
- The product features excellent audio performance specifications with THD+N less than -130dB and SNR greater than 135dB, providing audio equipment manufacturers with professional-grade audio processing solutions.
### 1.2 Product Features
**Audio Performance Characteristics**
**Audio Performance Features**
- Fixed input format: PCM 48kHz/16bit
- Flexible output format: PCM 44.1kHz-192kHz/32bit
- Supports high-precision audio transmission
- Low-latency audio processing
- Supports 16-32bit audio data formats
- Exceptional Audio Quality
- THD+N < -130dB, SNR > 135dB
- ASRC supports conversion between 44.1kHz~192kHz and 48KHz
- Dynamic range ≥110dB, professional-grade audio performance
- 4-Channel ASRC
- Built-in 2 independent dual-channel ASRC units
- Can simultaneously process 2-channel upstream and 2-channel downstream ASRC conversion
- Supports I²S Slave mode audio interface
**Interface Support Features**
**USB Interface Features**
- **Digital Interface Support**
- Supports USB1.0 audio input
- Supports I²S slave mode audio output
- Supports UART configuration interface
**USB Functionality**
- **USB Interface Features**
- Supports UAC 1.0
- Supports firmware upgrade via USB
- Compatible with USB Full Speed mode
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports OTG connection
**System Compatibility**
- UAC 1.0 protocol, plug-and-play
- Supports multiple operating systems such as Windows, Linux, Android, macOS, and iOS
- No special drivers required
- Supports multiple operating systems including Windows, Linux, Android, macOS, and iOS
- No special driver installation required
### 1.3 Application Scenarios
- Entry-level USB audio decoder
- Portable USB audio interface
- Low-cost digital audio solution
- Smart audio peripherals
- Audio educational equipment
### 1.4 Product Function Diagram
- Phone Accompaniment/Streaming
- Plays background music through phone OTG while performing audio processing. Provides low-latency, high-fidelity audio experience
- Car Audio Players
- Phone connects to car audio player USB, playing songs through car audio player
### 1.4 Product Block Diagram
<figure markdown="span">
![OT82111 Diagram](/assets/images/hifi_audio/ot82111_diagram.png "OT82111 Diagram"){width="600"}
<figcaption>Figure 1: OT82111_VC1 Function Diagram</figcaption>
<figcaption>Figure 1: OT82111-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| OT82111_VC1 | OT82111-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | Fixed input PCM48KHz/16bit, output PCM:44.1KHz-192KHz/32bit |
| OT82111 | OT82111-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | 4-Channel ASRC OTG 48KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface |
## 2. Modes and Specifications
@@ -73,43 +76,42 @@ OT82111_VC1 uses USB Audio Class 1.0 interface as input and I²S(Slave) interfac
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC1.0) in-I²S(SLAVE) out | USB input, I²S(Slave) output, UAC1.0 |
| 1 | USB(UAC2.0) ←→I²S(SLAVE) | Supports USB and I²S(Slave) bidirectional data input/output with internal ASRC conversion |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC1.0) in → I²S(SLAVE) out Mode
#### 2.2.1 USB(UAC2.0) ←→ I²S(SLAVE) Mode
**Input/Output Parameters:**
| Parameter | Input | Output |
| Parameter | Input/Output | Input/Output |
|:---------|:-------------|:-------------|
| **Interface** | USB Audio Class 1.0 | I²S(Slave) |
| **Interface** | USB Audio Class 2.0 | I²S(Slave) |
| **Audio Format** | PCM | PCM |
| **Sampling Rate** | Fixed 48kHz | 44.1kHz, 48kHz, 88.2kHz, 96kHz, 176.4kHz, 192kHz |
| **Bit Depth** | Fixed 16bit | 16bit, 24bit, 32bit |
| **Sampling Rate** | Fixed 48kHz | 44.1kHz~192kHz |
| **Bit Depth** | Fixed 24bit | Fixed 32bit |
**Clock Characteristics:**
* I²S interface operates in slave mode, requiring external MCLK, BCLK, and LRCK clock signals
* I²S interface operates in Slave mode, requires external BCLK and LRCK signals
* Supports 44.1kHz and 48kHz series sampling rates (i.e., 44.1kHz, 88.2kHz, 176.4kHz and 48kHz, 96kHz, 192kHz)
* Supports automatic clock detection and matching
**Audio Performance Metrics:**
**Audio Performance Specifications:**
* THD+N (@1kHz, 0dBFs): ≤-100dB
* SNR: ≥110dB
* Dynamic Range: ≥110dB
* THD+N < -130dB
* SNR > 135dB
## 3. Pin Configuration and Functions
### 3.1 OT82111_VC1 Pin Layout
### 3.1 OT82111-VC1 Pin Layout
<figure markdown="span">
![OT82111-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "OT82111-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: OT82111_VC1 Pin Arrangement Diagram</figcaption>
<figcaption>Figure 2: OT82111-VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 OT82111_VC1 Pin Description
### 3.2 OT82111-VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
@@ -124,10 +126,10 @@ OT82111_VC1 uses USB Audio Class 1.0 interface as input and I²S(Slave) interfac
| 9 | X0D29 | I/O | NC |
| 10 | X0D35 | I | I²S_IN_SCLK(SLAVE) |
| 11 | X0D36 | I | I²S_IN_LRCLK(SLAVE) |
| 12 | X0D37 | I/O | NC |
| 12 | X0D37 | I/O | I²S_IN_DATA0(SLAVE) |
| 13 | X0D38 | O | I²S_OUT_DATA0(SLAVE) |
| 14 | X0D40 | I/O | NC |
| 15 | X0D39 | I | I²S_IN_MCLK(SLAVE) |
| 15 | X0D39 | I | XU316 clock input, connected to X1D11 |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
@@ -136,18 +138,18 @@ OT82111_VC1 uses USB Audio Class 1.0 interface as input and I²S(Slave) interfac
| 21 | X0D30 | I/O | NC |
| 22 | X0D31 | I/O | NC |
| 23 | X0D32 | I/O | NC |
| 24 | X0D32 | I/O | NC |
| 24 | X0D33 | I/O | NC |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | UART_TX, connect to MCU_RX |
| 29 | X0D11 | I/O | UART_RX, connect to MCU_TX |
| 28 | X0D00 | I/O | NC |
| 29 | X0D11 | I/O | NC |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | NC |
| 35 | X1D11 | I/O | XU316 internal clock output |
| 35 | X1D11 | I/O | XU316 internal clock output, connected to X0D39 |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug PIN |
@@ -167,21 +169,37 @@ OT82111_VC1 uses USB Audio Class 1.0 interface as input and I²S(Slave) interfac
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O types defined in the table: I=Input, O=Output, P=Power, I/O=Input/Output
I/O type definitions in table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Revision History
## 4. Hardware Parameters
| Version | Date | Description | Revised by |
### 4.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Reviser |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-05-14 | Initial version release | |
| V1.1 | 2025-08-10 | Revision | |
| | | | |
| | | | |
## Consultation and Feedback
## 7. Inquiry and Feedback
<details>
<summary>Click to expand consultation feedback form</summary>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>
</details>

206
en/docs/dev_doc/datasheet/std_product/usb_otg/ot83211_vc1.md Normal file
View File

@@ -0,0 +1,206 @@
---
title: OT83211-VC1 4-Channel ASRC OTG 44.1KHz~192KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface
description: OT83211-VC1 4-Channel ASRC OTG 44.1KHz~192KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface Technical Documentation
author: Technical Documentation Department
date: 2025-05-14
print_page: true
---
--8<-- "common/phaten_xmos_support_img.md"
<div class="grid" markdown>
<div class="card-wide" markdown>
# OT83211-VC1
__4-Channel ASRC OTG 44.1KHz~192KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface__
</div>
</div>
## 1. Introduction
### 1.1 Product Description
OT83211-VC1 is a high-performance 4-channel ASRC audio sample rate converter designed for mobile audio devices, integrating USB OTG interface and 2-channel I²S slave interface functionality. This product is developed based on XMOS high-performance chips, specifically optimized for applications such as streaming sound cards and mobile audio interfaces.
- The product features built-in high-precision 2 independent dual-channel ASRC sample rate converters, supporting conversion between 44.1kHz~192kHz sampling rates, ensuring seamless audio signal conversion between different sampling rates.
- Through the USB OTG interface, the device can directly connect to smartphones, tablets, and other mobile devices, implementing plug-and-play functionality using UAC 2.0, compatible with various platforms including Windows, Linux, Android, macOS, and iOS.
- The product features excellent audio performance specifications with THD+N less than -130dB and SNR greater than 135dB, providing audio equipment manufacturers with professional-grade audio processing solutions.
### 1.2 Product Features
**Audio Performance Features**
- Exceptional Audio Quality
- THD+N < -130dB, SNR > 135dB
- ASRC supports conversion between 44.1kHz~192kHz
- Dynamic range ≥110dB, professional-grade audio performance
- 4-Channel ASRC
- Built-in 2 independent dual-channel ASRC units
- Can simultaneously process 2-channel upstream and 2-channel downstream ASRC conversion
- Supports I²S Slave mode audio interface
**USB Interface Features**
- Supports UAC 2.0
- Supports firmware upgrade via USB
- Supports OTG connection
**System Compatibility**
- Supports multiple operating systems including Windows, Linux, Android, macOS, and iOS
- No special driver installation required
### 1.3 Application Scenarios
- Phone Accompaniment/Streaming
- Plays background music through phone OTG while performing audio processing. Provides low-latency, high-fidelity audio experience
- Car Audio Players
- Phone connects to car audio player USB, playing songs through car audio player
### 1.4 Product Block Diagram
<figure markdown="span">
![OT83211 Diagram](/assets/images/hifi_audio/ot83211_diagram.png "OT83211 Diagram"){width="600"}
<figcaption>Figure 1: OT83211-VC1 Block Diagram</figcaption>
</figure>
### 1.5 Ordering Information
| PRODUCT MODEL | ORDERING NUMBER | PACKAGE BODY | SIZE (NOM) | Hardware Model | Comments |
|:--------|:----------------|:-------------|:-----------|:------------|:------------|
| OT83211 | OT83211-VC1 | SMT LGA-52 | 13x13mm | A316-Mini-V1 | 4-Channel ASRC OTG 44.1KHz~192KHz Audio Sample Rate Converter with Integrated 2-Channel I2S Slave Interface |
## 2. Modes and Specifications
### 2.1 Supported Input/Output Modes
| Mode Number | Input/Output Mode | Description |
|:--------:|:------------------------|:------------------------|
| 1 | USB(UAC2.0) ←→I²S(SLAVE) | Supports USB and I²S(Slave) bidirectional data input/output with internal ASRC conversion |
### 2.2 Detailed Parameters for Each Operating Mode
#### 2.2.1 USB(UAC2.0) ←→ I²S(SLAVE) Mode
**Input/Output Parameters:**
| Parameter | Input/Output | Input/Output |
|:---------|:-------------|:-------------|
| **Interface** | USB Audio Class 2.0 | I²S(Slave) |
| **Audio Format** | PCM | PCM |
| **Sampling Rate** | 44.1kHz~192kHz | 44.1kHz~192kHz |
| **Bit Depth** | Fixed 24bit | Fixed 32bit |
**Clock Characteristics:**
* I²S interface operates in Slave mode, requires external BCLK and LRCK signals
* Supports 44.1kHz and 48kHz series sampling rates (i.e., 44.1kHz, 88.2kHz, 176.4kHz and 48kHz, 96kHz, 192kHz)
* Supports automatic clock detection and matching
**Audio Performance Specifications:**
* THD+N < -130dB
* SNR > 135dB
## 3. Pin Configuration and Functions
### 3.1 OT83211-VC1 Pin Layout
<figure markdown="span">
![OT83211-VC1 Pin Diagram](/assets/images/hifi_audio/a316_pin.png "OT83211-VC1 Pin Diagram"){width=400}
<figcaption>Figure 2: OT83211-VC1 Pin Layout Diagram</figcaption>
</figure>
### 3.2 OT83211-VC1 Pin Description
| Pin Number | Name | Type | Function |
|:--------:|:----------|:------|:-----------------------------|
| 1 | 3.3V | P | Module 3.3V power supply |
| 2 | X1D13 | I/O | NC |
| 3 | X1D16 | I/O | NC |
| 4 | GND | P | Module ground |
| 5 | X1D17 | I/O | NC |
| 6 | X1D18 | I/O | NC |
| 7 | X1D19 | I/O | NC |
| 8 | X1D22 | I/O | NC |
| 9 | X0D29 | I/O | NC |
| 10 | X0D35 | I | I²S_IN_SCLK(SLAVE) |
| 11 | X0D36 | I | I²S_IN_LRCLK(SLAVE) |
| 12 | X0D37 | I/O | I²S_IN_DATA0(SLAVE) |
| 13 | X0D38 | O | I²S_OUT_DATA0(SLAVE) |
| 14 | X0D40 | I/O | NC |
| 15 | X0D39 | I | XU316 clock input, connected to X1D11 |
| 16 | X0D42 | I/O | NC |
| 17 | X0D41 | I/O | NC |
| 18 | X0D43 | I/O | NC |
| 19 | X1D34 | I/O | NC |
| 20 | GND | P | Module ground |
| 21 | X0D30 | I/O | NC |
| 22 | X0D31 | I/O | NC |
| 23 | X0D32 | I/O | NC |
| 24 | X0D33 | I/O | NC |
| 25 | GND | P | Module ground |
| 26 | GND | P | Module ground |
| 27 | GND | P | Module ground |
| 28 | X0D00 | I/O | NC |
| 29 | X0D11 | I/O | NC |
| 30 | X1D00 | I/O | NC |
| 31 | X1D01 | I/O | NC |
| 32 | GND | P | Module ground |
| 33 | X1D09 | I/O | NC |
| 34 | X1D10 | I/O | NC |
| 35 | X1D11 | I/O | XU316 internal clock output, connected to X0D39 |
| 36 | GND | P | Module ground |
| 37 | GND | P | Module ground |
| 38 | TDI | I/O | XTAG debug PIN |
| 39 | TDO | I/O | XTAG debug PIN |
| 40 | TMS | I/O | XTAG debug PIN |
| 41 | TCK | I/O | XTAG debug PIN |
| 42 | RST_N | I/O | System reset, active low |
| 43 | 1.8V | P | Module 1.8V power supply |
| 44 | GND | P | Module ground |
| 45 | USB_DM | I/O | USB_DM |
| 46 | USB_DP | I/O | USB_DP |
| 47 | GND | P | Module ground |
| 48 | 0.9V | P | Module 0.9V power supply |
| 49 | GND | P | Module ground |
| 50 | GND | P | Module ground |
| 51 | GND | P | Module ground |
| 52 | GND | P | Module ground |
!!! info "Pin Type Description"
I/O type definitions in table: I=Input, O=Output, P=Power, I/O=Input/Output
## 4. Hardware Parameters
### 4.1 Normal Operating Conditions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:op"
### 4.2 Product Dimensions
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:size"
### 4.3 Module Package Diagram
<figure markdown="span">
![A316-Mini-V1 Package Diagram](/assets/images/hifi_audio/a316_size.png "A316-Mini-V1 Package Diagram"){width=400}
<figcaption></figcaption>
</figure>
## 5 Product Packaging Information
--8<-- "dev_doc/datasheet/modules/a316_mini_v1_datasheet.md:package"
## 6. Revision History
| Version | Date | Description | Reviser |
|:------|:-------------|:---------------------------------------|:-------------|
| V1.0 | 2025-08-10 | Initial version release | |
| | | | |
## 7. Inquiry and Feedback
<details>
<summary>Click to expand inquiry and feedback form</summary>
--8<-- "common/customer_form.md"
</details>