添加en和zh

This commit is contained in:
PhatenIoT-yan
2025-05-14 15:25:41 +08:00
parent 8c5ea7b9fd
commit 3a5820f4e9
1870 changed files with 96185 additions and 251 deletions

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xflash --boot-partition-size 0x180000 bin/boot_0x1/phaten_module_boot_0x1.xe --loader loader.o --upgrade 1 bin/boot_0x1/phaten_module_boot_0x1.xe --upgrade 0x80a900 bin/2AMi0o2xxxxxxw32r768_0x80a900/phaten_module_2AMi0o2xxxxxxw32r768_0x80a900.xe --upgrade 0x800100 bin/1AMi0o0xsxxxxw16r48_0x800100/phaten_module_1AMi0o0xsxxxxw16r48_0x800100.xe --upgrade 0x10806510 bin/2AMi0o0xsxxxxw24r192_0x10806510/phaten_module_2AMi0o0xsxxxxw24r192_0x10806510.xe --upgrade 0x806510 bin/2AMi0o0xsxxxxw24r192_0x806510/phaten_module_2AMi0o0xsxxxxw24r192_0x806510.xe --upgrade 0x80c508 bin/2AMi0o2xxsxxxw24r192_0x80c508/phaten_module_2AMi0o2xxsxxxw24r192_0x80c508.xe --upgrade 0x82d581 bin/2AMi2o2xxxxxxw32r192_mqa_0x82d581/phaten_module_2AMi2o2xxxxxxw32r192_mqa_0x82d581.xe --upgrade 0x20806510 bin/2AMi0o0xsxxxxw24r192_0x20806510/phaten_module_2AMi0o0xsxxxxw24r192_0x20806510.xe -o $1

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<?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.xmos.com http://www.xmos.com" ManuallySpecifiedRouting="true">
<Type>Board</Type>
<Name>XS3 MC Audio</Name>
<Declarations>
<Declaration>tileref tile[2]</Declaration>
<Declaration>tileref usb_tile</Declaration>
</Declarations>
<Packages>
<Package id="0" Type="XS3-UnA-1024-QF60A">
<Nodes>
<Node Id="0" InPackageId="0" Type="XS3-L16A-1024" Oscillator="24MHz" SystemFrequency="600MHz" referencefrequency="100MHz">
<Boot>
<Source Location="SPI:bootFlash"/>
</Boot>
<Tile Number="0" Reference="tile[0]">
<Port Location="XS1_PORT_1B" Name="PORT_SQI_CS"/>
<Port Location="XS1_PORT_1C" Name="PORT_SQI_SCLK"/>
<Port Location="XS1_PORT_4B" Name="PORT_SQI_SIO"/>
<!-- GPIO Ports -->
<!-- Audio Ports -->
<Port Location="XS1_PORT_1P" Name="PORT_MCLK_IN"/>
<Port Location="XS1_PORT_1M" Name="PORT_I2S_LRCLK"/>
<Port Location="XS1_PORT_1L" Name="PORT_I2S_BCLK"/>
<Port Location="XS1_PORT_1O" Name="PORT_I2S_DAC0"/>
<Port Location="XS1_PORT_1L" Name="PORT_UART_LOG"/>
<Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT"/>
<Port Location="XS1_PORT_16B" Name="PORT_MCLK_COUNT_2"/>
<!-- UART Ports -->
<Port Location="XS1_PORT_1A" Name="PORT_UART_TX"/>
<Port Location="XS1_PORT_1D" Name="PORT_UART_RX"/>
<Port Location="XS1_PORT_4D" Name="PORT_MQA_RATE"/>
<Port Location="XS1_PORT_4A" Name="PORT_MQA_AUTH_STATE"/>
<Port Location="XS1_PORT_1K" Name="PORT_PLL_REF"/>
</Tile>
<Tile Number="1" Reference="tile[1]">
<Port Location="XS1_PORT_1A" Name="PORT_I2S_IN_LRCLK"/>
<Port Location="XS1_PORT_1C" Name="PORT_I2S_IN_BCLK"/>
<Port Location="XS1_PORT_1B" Name="PORT_I2S_IN_DATA0"/>
<Port Location="XS1_PORT_1F" Name="PORT_OPT_IN"/>
<Port Location="XS1_PORT_1G" Name="PORT_COAX_IN"/>
<Port Location="XS1_PORT_1K" Name="PORT_SPDIF_OUT"/>
<Port Location="XS1_PORT_1K" Name="PORT_HDMI_IN"/>
<Port Location="XS1_PORT_1D" Name="PORT_MCLK_IN_SPDIF_TX"/>
</Tile>
</Node>
</Nodes>
</Package>
</Packages>
<Nodes>
<Node Id="2" Type="device:" RoutingId="0x8000">
<Service Id="0" Proto="xscope_host_data(chanend c);">
<Chanend Identifier="c" end="3"/>
</Service>
</Node>
</Nodes>
<Links>
<Link Encoding="2wire" Delays="4,4" Flags="XSCOPE">
<LinkEndpoint NodeId="0" Link="XL0"/>
<LinkEndpoint NodeId="2" Chanend="1"/>
</Link>
</Links>
<ExternalDevices>
<Device NodeId="0" Tile="0" Class="SQIFlash" Name="bootFlash" Type="S25FL116K" PageSize="256" SectorSize="4096" NumPages="16384">
<Attribute Name="PORT_SQI_CS" Value="PORT_SQI_CS"/>
<Attribute Name="PORT_SQI_SCLK" Value="PORT_SQI_SCLK"/>
<Attribute Name="PORT_SQI_SIO" Value="PORT_SQI_SIO"/>
<Attribute Name="QE_REGISTER" Value="flash_qe_location_status_reg_0"/>
<Attribute Name="QE_BIT" Value="flash_qe_bit_6"/>
</Device>
</ExternalDevices>
<JTAGChain>
<JTAGDevice NodeId="0"/>
</JTAGChain>
</Network>

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//左后 // ccb85e5bf4e9
// 右后 // ccb85e5bf4e4
// 左前 // 0cc119b12530
// 右前 // 0cc119b125c3
// 中前 // ccb85e5bf554
// 低重音 // ccb85e5bf4f3

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